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1. 发明授权

US08354292B2 CMOS image sensor having a crosstalk prevention structure and method of manufacturing the same 有权
标题翻译：具有串扰防止结构的CMOS图像传感器及其制造方法
公开(公告)号：US08354292B2
公开(公告)日：2013-01-15
申请号：US13413137
申请日：2012-03-06
申请人： Won-Je Park , Young-Hoon Park , Ui-Sik Kim , Dae-Cheol Seong , Yeo-Ju Yoon , Bo-Bae Kang
发明人： Won-Je Park , Young-Hoon Park , Ui-Sik Kim , Dae-Cheol Seong , Yeo-Ju Yoon , Bo-Bae Kang
IPC分类号： H01L21/339
CPC分类号： H01L27/1463 , H01L27/14603
摘要： In a method of manufacturing a CMOS image sensor, a P type epitaxial layer is formed on an N type substrate. A deep P+ type well layer is formed in the P type epitaxial layer. An N type deep guardring well is formed in a photodiode guardring region. The N type deep guardring region makes contact with the N type substrate and also be connected with an operational voltage terminal. A triple well is formed in a photodiode region and a peripheral circuit region. The triple well is used for forming a PMOS and an NMOS having different operational voltages. An isolation region is formed in the photodiode region. The isolation region in the photodiode region has a depth different from a depth of an isolation region in the peripheral circuit region.
摘要翻译：在CMOS图像传感器的制造方法中，在N型基板上形成P型外延层。在P型外延层中形成深P +型阱层。在光电二极管防护区域内形成N型深护卫阱。 N型深护卫区与N型基板接触，并与工作电压端子连接。三重阱形成在光电二极管区域和外围电路区域中。三阱用于形成具有不同工作电压的PMOS和NMOS。在光电二极管区域中形成隔离区。光电二极管区域中的隔离区域具有与外围电路区域中的隔离区域的深度不同的深度。

2. 发明申请

US20120164783A1 CMOS IMAGE SENSOR HAVING A CROSSTALK PREVENTION STRUCTURE AND METHOD OF MANUFACTUREING THE SAME 有权
标题翻译：具有CROSSTALK预防结构的CMOS图像传感器及其制造方法
公开(公告)号：US20120164783A1
公开(公告)日：2012-06-28
申请号：US13413137
申请日：2012-03-06
申请人： Won-Je Park , Young-Hoon Park , Ui-Sik Kim , Dae-Cheol Seong , Yeo-Ju Yoon , Bo-Bae Kang
发明人： Won-Je Park , Young-Hoon Park , Ui-Sik Kim , Dae-Cheol Seong , Yeo-Ju Yoon , Bo-Bae Kang
IPC分类号： H01L31/18
CPC分类号： H01L27/1463 , H01L27/14603
摘要： In a method of manufacturing a CMOS image sensor, a P type epitaxial layer is formed on an N type substrate. A deep P+ type well layer is formed in the P type epitaxial layer. An N type deep guardring well is formed in a photodiode guardring region. The N type deep guardring region makes contact with the N type substrate and also be connected with an operational voltage terminal. A triple well is formed in a photodiode region and a peripheral circuit region. The triple well is used for forming a PMOS and an NMOS having different operational voltages. An isolation region is formed in the photodiode region. The isolation region in the photodiode region has a depth different from a depth of an isolation region in the peripheral circuit region.
摘要翻译：在CMOS图像传感器的制造方法中，在N型基板上形成P型外延层。在P型外延层中形成深P +型阱层。在光电二极管防护区域内形成N型深护卫阱。 N型深护卫区与N型基板接触，并与工作电压端子连接。三重阱形成在光电二极管区域和外围电路区域中。三阱用于形成具有不同工作电压的PMOS和NMOS。在光电二极管区域中形成隔离区。光电二极管区域中的隔离区域具有与外围电路区域中的隔离区域的深度不同的深度。

3. 发明授权

US08143142B2 Method of fabricating epi-wafer, epi-wafer fabricated by the method, and image sensor fabricated using the epi-wafer 失效
标题翻译：通过该方法制造外延晶片，外延晶片的方法和使用外延晶片制造的图像传感器
公开(公告)号：US08143142B2
公开(公告)日：2012-03-27
申请号：US12723882
申请日：2010-03-15
申请人： Young-Soo Park , Gi-Jung Kim , Won-Je Park , Jae-Sik Bae
发明人： Young-Soo Park , Gi-Jung Kim , Won-Je Park , Jae-Sik Bae
IPC分类号： H01L21/322
CPC分类号： H01L21/22 , H01L21/02532 , H01L21/02639 , H01L21/02658 , H01L21/324 , H01L27/14603 , H01L27/14612 , H01L27/14618 , H01L27/1463 , H01L27/14643 , H01L27/14689 , H01L2224/48095 , H01L2224/48227 , H01L2924/00014
摘要： A method of fabricating an epi-wafer includes providing a wafer including boron by cutting a single crystal silicon ingot, growing an insulating layer on one surface of the wafer, performing thermal treatment of the wafer, removing the insulating layer formed on one surface of the wafer, mirror-surface-grinding one surface of the wafer, and growing an epitaxial layer on one surface of the wafer and forming a high-density boron layer within the wafer that corresponds to the interface between the wafer and the epitaxial layer.
摘要翻译：制造外延晶片的方法包括通过切割单晶硅锭来提供包括硼的晶片，在晶片的一个表面上生长绝缘层，对晶片进行热处理，去除形成在晶片的一个表面上的绝缘层晶片，镜面研磨晶片的一个表面，以及在晶片的一个表面上生长外延层，并且在晶片内形成与晶片和外延层之间的界面相对应的高密度硼层。

4. 发明授权

US08138530B2 CMOS image sensor having a crosstalk prevention structure 有权
标题翻译：具有串扰防止结构的CMOS图像传感器
公开(公告)号：US08138530B2
公开(公告)日：2012-03-20
申请号：US12482960
申请日：2009-06-11
申请人： Won-Je Park , Young-Hoon Park , Ui-Sik Kim , Dae-Cheol Seong , Yeo-Ju Yoon , Bo-Bae Keang
发明人： Won-Je Park , Young-Hoon Park , Ui-Sik Kim , Dae-Cheol Seong , Yeo-Ju Yoon , Bo-Bae Keang
IPC分类号： H01L31/062
CPC分类号： H01L27/1463 , H01L27/14603
摘要： In a method of manufacturing a CMOS image sensor, a P type epitaxial layer is formed on an N type substrate. A deep P+ type well layer is formed in the P type epitaxial layer. An N type deep guardring well is formed in a photodiode guardring region. The N type deep guardring region makes contact with the N type substrate and also be connected with an operational voltage terminal. A triple well is formed in a photodiode region and a peripheral circuit region. The triple well is used for forming a PMOS and an NMOS having different operational voltages. An isolation region is formed in the photodiode region. The isolation region in the photodiode region has a depth different from a depth of an isolation region in the peripheral circuit region.
摘要翻译：在CMOS图像传感器的制造方法中，在N型基板上形成P型外延层。在P型外延层中形成深P +型阱层。在光电二极管防护区域内形成N型深护卫阱。 N型深护卫区与N型基板接触，并与工作电压端子连接。三重阱形成在光电二极管区域和外围电路区域中。三阱用于形成具有不同工作电压的PMOS和NMOS。在光电二极管区域中形成隔离区。光电二极管区域中的隔离区域具有与外围电路区域中的隔离区域的深度不同的深度。

5. 发明申请

US20110204468A1 Image sensor and method of manufacturing the same 审中-公开
公开(公告)号：US20110204468A1
公开(公告)日：2011-08-25
申请号：US13064914
申请日：2011-04-26
申请人： Jae-ho Song , Chan Park , Young-hoon Park , Sang-il Jung , Jong-wook Hong , Keo-sung Park , Eun-soo Kim , Won-je Park , Jin-Hyeong Park , Dae-cheol Seong , Won-jeong Lee , Pu-ra Kim
发明人： Jae-ho Song , Chan Park , Young-hoon Park , Sang-il Jung , Jong-wook Hong , Keo-sung Park , Eun-soo Kim , Won-je Park , Jin-Hyeong Park , Dae-cheol Seong , Won-jeong Lee , Pu-ra Kim
IPC分类号： H01L27/146
CPC分类号： H01L27/14603 , H01L27/14609 , H01L27/14689
摘要： Example embodiments disclose an image sensor capable of preventing or reducing image lag and a method of manufacturing the same. Example methods may include forming a gate insulating film and a gate conductive film doped with a first-conductive-type dopant on a semiconductor substrate; forming a transfer gate pattern by patterning the gate insulating film and the gate conductive film; and fabricating a transfer gate electrode by forming a first-conductive-type photodiode in the semiconductor substrate adjacent to one region of the transfer gate pattern, by forming a second-conductive-type photodiode on the first-conductive-type photodiode, and by forming a first-conductive-type floating diffusion region in the semiconductor substrate adjacent to the other region of the transfer gate pattern.

6. 发明申请

US20110163363A1 COMS image sensors and methods of manufacturing the same 有权
标题翻译： COMS图像传感器及其制造方法
公开(公告)号：US20110163363A1
公开(公告)日：2011-07-07
申请号：US13064289
申请日：2011-03-16
申请人： Ui-Sik Kim , Young-Hoon Park , Won-Je Park , Dae-Cheol Seong , Yeo-Ju Yoon , Bo-Bae Kang
发明人： Ui-Sik Kim , Young-Hoon Park , Won-Je Park , Dae-Cheol Seong , Yeo-Ju Yoon , Bo-Bae Kang
IPC分类号： H01L27/146
CPC分类号： H01L27/14689 , H01L27/14603 , H01L27/14612 , H01L27/1463 , H01L27/14636
摘要： Complementary metal-oxide semiconductor (CMOS) image sensors (CIS) and methods of manufacturing the same are provided, the sensors include an epitaxial layer on a substrate in which a first, second, third and fourth region are defined. A photodiode may be formed at an upper portion of the epitaxial layer in the first region. A plurality of gate structures may be formed on the epitaxial layer in the second, third and fourth regions. A first blocking layer may be formed on the gate structures and the epitaxial layer in the first and second regions. A first impurity layer may be formed at an upper portion of the epitaxial layer adjacent to the gate structures in the second region, and a second impurity layer at upper portions of the epitaxial layer adjacent to the gate structures in the third and fourth regions. A color filter layer may be formed over the photodiode. A microlens may be formed on the color filter layer.
摘要翻译：提供互补金属氧化物半导体（CMOS）图像传感器（CIS）及其制造方法，传感器包括在其中限定了第一，第二，第三和第四区域的基板上的外延层。可以在第一区域中的外延层的上部形成光电二极管。可以在第二，第三和第四区域中的外延层上形成多个栅极结构。可以在栅极结构和第一和第二区域中的外延层上形成第一阻挡层。可以在与第二区域中的栅极结构相邻的外延层的上部形成第一杂质层，并且在第三和第四区域中与栅极结构相邻的外延层的上部处形成第二杂质层。可以在光电二极管上方形成滤色器层。可以在滤色器层上形成微透镜。

7. 发明申请

US20110163362A1 Methods of fabricating image sensors and image sensors fabricated thereby 有权
标题翻译：制造图像传感器和图像传感器的方法
公开(公告)号：US20110163362A1
公开(公告)日：2011-07-07
申请号：US13064176
申请日：2011-03-09
申请人： Won-je Park , Chan Park , Young-hoon Park , Jae-ho Song , Jong-wook Hong , Keo-sung Park
发明人： Won-je Park , Chan Park , Young-hoon Park , Jae-ho Song , Jong-wook Hong , Keo-sung Park
IPC分类号： H01L31/14
CPC分类号： H01L27/14643 , H01L27/14603 , H01L27/14609 , H01L27/14641 , H01L27/14689
摘要： A method of fabricating an image sensor may include providing a substrate including light-receiving and non-light-receiving regions; forming a plurality of gates on the non-light-receiving region; ion-implanting a first-conductivity-type dopant into the light-receiving region to form a first dopant region of a pinned photodiode; primarily ion-implanting a second-conductivity-type dopant, different from the first-conductivity-type dopant, into an entire surface of the substrate, using the gates as a first mask; forming spacers on both side walls of the gates; and secondarily ion-implanting the second-conductivity-type dopant into the entire surface of the substrate, using the plurality of gates including the spacers as a second mask, to complete a second dopant region of the pinned photodiode. An image sensor may include the substrate; a transfer gate formed on the non-light-receiving region; a first dopant region in the light-receiving region; and a second dopant region formed on a surface of the light-receiving region.
摘要翻译：制造图像传感器的方法可以包括提供包括光接收和非光接收区域的基板; 在非光接收区域上形成多个栅极; 将第一导电型掺杂剂离子注入到光接收区域中以形成钉扎光电二极管的第一掺杂区域; 主要使用栅极作为第一掩模，将与第一导电类型掺杂剂不同的第二导电型掺杂剂离子注入基板的整个表面; 在门的两个侧壁上形成间隔物; 并且其次使用包括间隔物的多个栅极作为第二掩模将第二导电型掺杂剂离子注入到基板的整个表面中，以完成被钉扎的光电二极管的第二掺杂区域。图像传感器可以包括基板; 形成在非光接收区域上的传输门; 在所述光接收区域中的第一掺杂剂区域; 以及形成在光接收区域的表面上的第二掺杂剂区域。

8. 发明申请

US20100233869A1 METHOD OF FABRICATING EPI-WAFER, EPI-WAFER FABRICATED BY THE METHOD, AND IMAGE SENSOR FABRICATED USING THE EPI-WAFER 失效
标题翻译：方法制作EPI-WAFER，EPI-WAFER的方法和使用EPI-WAFER制作的图像传感器
公开(公告)号：US20100233869A1
公开(公告)日：2010-09-16
申请号：US12723882
申请日：2010-03-15
申请人： Young-Soo PARK , Gi-Jung KIM , Won-Je PARK , Jae-Sik BAE
发明人： Young-Soo PARK , Gi-Jung KIM , Won-Je PARK , Jae-Sik BAE
IPC分类号： H01L21/322 , H01L21/20
CPC分类号： H01L21/22 , H01L21/02532 , H01L21/02639 , H01L21/02658 , H01L21/324 , H01L27/14603 , H01L27/14612 , H01L27/14618 , H01L27/1463 , H01L27/14643 , H01L27/14689 , H01L2224/48095 , H01L2224/48227 , H01L2924/00014
摘要： A method of fabricating an epi-wafer includes providing a wafer including boron by cutting a single crystal silicon ingot, growing an insulating layer on one surface of the wafer, performing thermal treatment of the wafer, removing the insulating layer formed on one surface of the wafer, mirror-surface-grinding one surface of the wafer, and growing an epitaxial layer on one surface of the wafer and forming a high-density boron layer within the wafer that corresponds to the interface between the wafer and the epitaxial layer.
摘要翻译：制造外延晶片的方法包括通过切割单晶硅锭来提供包括硼的晶片，在晶片的一个表面上生长绝缘层，对晶片进行热处理，去除形成在晶片的一个表面上的绝缘层晶片，镜面研磨晶片的一个表面，以及在晶片的一个表面上生长外延层，并且在晶片内形成与晶片和外延层之间的界面相对应的高密度硼层。

9. 发明授权

US07586140B2 CMOS image sensors including pickup regions 有权
标题翻译： CMOS图像传感器包括拾取区域
公开(公告)号：US07586140B2
公开(公告)日：2009-09-08
申请号：US11472058
申请日：2006-06-21
申请人： Won-Je Park
发明人： Won-Je Park
IPC分类号： H01L31/062 , H01L31/113
CPC分类号： H01L27/14643 , H01L27/14689
摘要： A CMOS image sensor includes a field isolation film defining first, second, and third active fields in a substrate having a first conductivity type, a photodiode region in the first active field, the photodiode region having a second conductivity type opposite the first conductivity type, and a floating diffusion region of the second conductivity type in the second active field. A source follower gate is conductively connected with the floating diffusion region and intersects the second active field. First and second source/drain regions of the second conductivity type are provided in the second active field at opposite sides of the source follower gate, and a pickup region is disposed in the third active field. The third active field may be adjacent a portion of the second active field where the first source/drain region or the second source/drain region is located, and the floating diffusion region may be isolated from the first and second source/drain regions.
摘要翻译： CMOS图像传感器包括在具有第一导电类型的衬底中限定第一，第二和第三有源场的场隔离膜，第一有源场中的光电二极管区域，具有与第一导电类型相反的第二导电类型的光电二极管区域，以及第二有源场中的第二导电类型的浮动扩散区。源极跟随器栅极与浮动扩散区域导电连接并与第二有源场相交。在源极跟随器栅极的相对侧的第二有源场中提供第二导电类型的第一和第二源极/漏极区域，并且拾取区域设置在第三有源场中。第三有源场可以与第一源极/漏极区或第二源极/漏极区所在的第二有源场的一部分相邻，并且浮动扩散区可以与第一和第二源极/漏极区隔离。

10. 发明申请

US20080081396A1 Method of fabricating image sensor having inner lens 有权
标题翻译：制造具有内透镜的图像传感器的方法
公开(公告)号：US20080081396A1
公开(公告)日：2008-04-03
申请号：US11882155
申请日：2007-07-31
申请人： Jong-Wook Hong , Tae-Seok Oh , Duk-Min Yi , Young-Mook Oh , Won-Je Park
发明人： Jong-Wook Hong , Tae-Seok Oh , Duk-Min Yi , Young-Mook Oh , Won-Je Park
IPC分类号： H01L21/00
CPC分类号： H01L27/14632 , H01L27/14621 , H01L27/14625 , H01L27/14636 , H01L27/14645 , H01L27/14687
摘要： A method of fabricating an image sensor according to example embodiments may include forming a photodiode in a photoelectric conversion region of a substrate and forming an etch stop layer on the substrate. The etch stop layer may be patterned to form an inner lens on the photoelectric conversion region and an etch stop layer pattern on a transistor region of the substrate. A metal interconnection structure may be formed on the inner lens and the etch stop layer pattern. Accordingly, the number of additional processes for fabricating an image sensor may be reduced.
摘要翻译：根据示例性实施例的制造图像传感器的方法可以包括在衬底的光电转换区域中形成光电二极管，并在衬底上形成蚀刻停止层。蚀刻停止层可以被图案化以在光电转换区域上形成内透镜，并且在衬底的晶体管区域上形成蚀刻停止层图案。可以在内透镜和蚀刻停止层图案上形成金属互连结构。因此，可以减少用于制造图像传感器的附加处理的数量。

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