专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US09628080B2 Voltage generating circuits based on a power-on control signal 有权
公开(公告)号：US09628080B2
公开(公告)日：2017-04-18
申请号：US13759718
申请日：2013-02-05
申请人： Wen-Han Wang
发明人： Wen-Han Wang
IPC分类号： H03L5/00 , H03L7/00 , H03K19/0185 , H03K17/22 , H03K17/687 , G06F1/24
CPC分类号： H03K17/223 , G06F1/24 , H03K17/6872 , H03K19/018521
摘要： A voltage generating circuit includes a first supply voltage node, a first switching device, a sub voltage generating circuit, and a second switching device. The first supply voltage node is configured to have a first supply voltage value, and is coupled with the first switching device. The sub voltage generating circuit is coupled in between the first switching device and the second switching device. The first switching circuit and the second switching circuit are configured to receive a control signal behaving based on the first supply voltage value and a second supply voltage value different from the first supply voltage value.

2. 发明申请

US20140002172A1 VOLTAGE GENERATING CIRCUITS BASED ON A POWER-ON CONTROL SIGNAL 有权
标题翻译：基于上电控制信号的电压发生电路
公开(公告)号：US20140002172A1
公开(公告)日：2014-01-02
申请号：US13759718
申请日：2013-02-05
申请人： Wen-Han WANG
发明人： Wen-Han WANG
IPC分类号： H03K19/0185 , H03K17/687
CPC分类号： H03K17/223 , G06F1/24 , H03K17/6872 , H03K19/018521
摘要： A voltage generating circuit includes a first supply voltage node, a first switching device, a sub voltage generating circuit, and a second switching device. The first supply voltage node is configured to have a first supply voltage value, and is coupled with the first switching device. The sub voltage generating circuit is coupled in between the first switching device and the second switching device. The first switching circuit and the second switching circuit are configured to receive a control signal behaving based on the first supply voltage value and a second supply voltage value different from the first supply voltage value.
摘要翻译：电压产生电路包括第一电源电压节点，第一开关装置，副电压产生电路和第二开关装置。第一电源电压节点被配置为具有第一电源电压值，并且与第一开关装置耦合。子电压发生电路耦合在第一开关器件和第二开关器件之间。第一开关电路和第二开关电路被配置为接收基于第一电源电压值和与第一电源电压值不同的第二电源电压值的控制信号。

3. 发明授权

US07923286B2 Method of fabricating a phase-change memory 有权
标题翻译：制造相变存储器的方法
公开(公告)号：US07923286B2
公开(公告)日：2011-04-12
申请号：US12611066
申请日：2009-11-02
申请人： Yi-Chan Chen , Wen-Han Wang
发明人： Yi-Chan Chen , Wen-Han Wang
IPC分类号： H01L21/06
CPC分类号： H01L45/124 , H01L27/2463 , H01L45/06 , H01L45/144 , H01L45/1691
摘要： A phase-change memory comprises a bottom electrode formed on a substrate. A first isolation layer is formed on the bottom electrode. A top electrode is formed on the isolation layer. A first phase-change material is formed in the first isolation layer, wherein the top electrode and the bottom electrode are electrically connected via the first phase-change material. Since the phase-change material can have a diameter less than the resolution limit of the photolithography process, an operating current for a state conversion of the phase-change material pattern may be reduced so as to decrease a power dissipation of the phase-change memory device.
摘要翻译：相变存储器包括形成在基板上的底部电极。在底部电极上形成第一隔离层。顶部电极形成在隔离层上。第一相变材料形成在第一隔离层中，其中顶部电极和底部电极经由第一相变材料电连接。由于相变材料的直径可以小于光刻工艺的分辨率极限，所以可以减小相变材料图案的状态转换的工作电流，从而降低相变存储器的功耗设备。

4. 发明授权

US07835177B2 Phase change memory cell and method of fabricating 有权
标题翻译：相变存储单元及其制造方法
公开(公告)号：US07835177B2
公开(公告)日：2010-11-16
申请号：US11493595
申请日：2006-07-27
申请人： Hong-Hui Hsu , Chien-Min Lee , Wen-Han Wang , Min-Hung Lee , Te-Sheng Chao , Yen Chuo , Yi-Chan Chen , Wei-Su Chen
发明人： Hong-Hui Hsu , Chien-Min Lee , Wen-Han Wang , Min-Hung Lee , Te-Sheng Chao , Yen Chuo , Yi-Chan Chen , Wei-Su Chen
IPC分类号： G11C11/00
CPC分类号： H01L45/1675 , G11C2213/52 , H01L45/06 , H01L45/1233 , H01L45/126 , H01L45/144
摘要： A phase change memory (PCM) cell fabricated by etching a tapered structure into a phase change layer, and planarizing a dielectric layer on the phase change layer until a tip of the tapered structure is exposed for contacting a heating electrode. Therefore, the area of the exposed tip of the phase change layer is controlled to be of an extremely small size, the contact area between the phase change layer and the heating electrode is reduced, thereby lowering the operation current.
摘要翻译：通过将锥形结构蚀刻成相变层而制造的相变存储器（PCM）单元，并且平坦化相变层上的电介质层直到锥形结构的尖端暴露以接触加热电极。因此，相变层的露出端的面积被控制为极小的尺寸，相变层和加热电极之间的接触面积减小，从而降低了工作电流。

5. 发明授权

US07670871B2 Method of fabricating a phase-change memory 有权
标题翻译：制造相变存储器的方法
公开(公告)号：US07670871B2
公开(公告)日：2010-03-02
申请号：US12187345
申请日：2008-08-06
申请人： Yi-Chan Chen , Wen-Han Wang
发明人： Yi-Chan Chen , Wen-Han Wang
IPC分类号： H01L21/06
CPC分类号： H01L45/124 , H01L27/2463 , H01L45/06 , H01L45/144 , H01L45/1691
摘要： A phase-change memory comprises a bottom electrode formed on a substrate. A first isolation layer is formed on the bottom electrode. A top electrode is formed on the isolation layer. A first phase-change material is formed in the first isolation layer, wherein the top electrode and the bottom electrode are electrically connected via the first phase-change material. Since the phase-change material can have a diameter less than the resolution limit of the photolithography process, an operating current for a state conversion of the phase-change material pattern may be reduced so as to decrease a power dissipation of the phase-change memory device.
摘要翻译：相变存储器包括形成在基板上的底部电极。在底部电极上形成第一隔离层。顶部电极形成在隔离层上。第一相变材料形成在第一隔离层中，其中顶部电极和底部电极经由第一相变材料电连接。由于相变材料的直径可以小于光刻工艺的分辨率极限，所以可以减小相变材料图案的状态转换的工作电流，从而降低相变存储器的功耗设备。

6. 发明申请

US20070290185A1 Phase change memory cells and methods for fabricating the same 审中-公开
标题翻译：相变存储单元及其制造方法
公开(公告)号：US20070290185A1
公开(公告)日：2007-12-20
申请号：US11525286
申请日：2006-09-22
申请人： Wen-Han Wang
发明人： Wen-Han Wang
IPC分类号： H01L29/04
CPC分类号： H01L45/1273 , H01L27/2463 , H01L45/06 , H01L45/1233 , H01L45/144 , H01L45/148 , H01L45/1675
摘要： Phase change memory cells and methods for fabricating the same are provided. In an exemplary embodiment, a phase change memory cell comprises a first electrode disposed over a substrate along a first direction. A first dielectric layer is formed over the first electrode. A conductive contact is formed in the first dielectric layer, electrically contacting the first electrode, wherein the conductive contact has an L-shaped or reverse L-shaped () cross section. A second dielectric layer is formed over the first dielectric layer. A phase change layer is partially formed over the first and the second dielectric layers, electrically contacting the conductive contact. A third dielectric layer is formed over the phase change layer and the first and second dielectric layers with an opening therein. A second electrode layer is formed over the third dielectric layer and fills the opening to electrically contact the phase change layer.
摘要翻译：提供了相变存储单元及其制造方法。在示例性实施例中，相变存储单元包括沿着第一方向设置在衬底上的第一电极。第一电介质层形成在第一电极上。导电接触形成在第一电介质层中，与第一电极电接触，其中导电接触具有L形或反向L形（）横截面。在第一电介质层上形成第二电介质层。相变层部分地形成在第一和第二介电层上，与导电接触电接触。第三电介质层形成在相变层上，第一和第二电介质层在其中具有开口。在第三电介质层上形成第二电极层，并填充开口以与相变层电接触。

7. 发明申请

US20070249083A1 Multilevel phase-change memory element and operating method 审中-公开
标题翻译：多级相变存储元件及操作方法
公开(公告)号：US20070249083A1
公开(公告)日：2007-10-25
申请号：US11819063
申请日：2007-06-25
申请人： Chien-Ming Li , Wen-Han Wang , Kuei-Hung Shen
发明人： Chien-Ming Li , Wen-Han Wang , Kuei-Hung Shen
IPC分类号： H01L31/0376
CPC分类号： G11C11/56 , G11C11/5678 , G11C13/0004 , G11C13/003 , G11C13/0069 , G11C2013/008 , G11C2013/009 , G11C2213/78 , H01L45/06 , H01L45/1233 , H01L45/126 , H01L45/144 , H01L45/165
摘要： A multilevel phase-change memory, operating method and manufacturing method thereof. The phase-change memory includes two phase-change layers and electrodes, which are configured in a parallel structure to form a memory cell. A voltage-drive mode is employed to control and drive the memory such that multilevel memory states may be achieved by imposing different voltage levels. The provided multilevel phase-change memory has more bits and higher capacity than that of the memory with a single phase-change layer.
摘要翻译：多级相变存储器，其操作方法及其制造方法。相变存储器包括两个相变层和电极，其被配置成并联结构以形成存储单元。使用电压驱动模式来控制和驱动存储器，使得可以通过施加不同的电压电平来实现多电平存储器状态。所提供的多电平相变存储器具有比具有单个相变层的存储器更多的位和更高的容量。

8. 发明申请

US20070148862A1 Phase-change memory layer and method of manufacturing the same and phase-change memory cell 审中-公开
标题翻译：相变存储层及其制造方法和相变存储单元
公开(公告)号：US20070148862A1
公开(公告)日：2007-06-28
申请号：US11437661
申请日：2006-05-22
申请人： Yi-Chan Chen , Hong-Hui Hsu , Chien-Min Lee , Yen Chuo , Te-Sheng Chao , Wen-Han Wang , Wei-Su Chen , Min-Hung Lee
发明人： Yi-Chan Chen , Hong-Hui Hsu , Chien-Min Lee , Yen Chuo , Te-Sheng Chao , Wen-Han Wang , Wei-Su Chen , Min-Hung Lee
IPC分类号： H01L21/336
CPC分类号： H01L45/165 , H01L45/06 , H01L45/1233 , H01L45/126 , H01L45/144 , H01L45/1641
摘要： A phase-change memory layer and method for manufacturing the same and a phase-change memory cell are provided. The phase-change memory layer is crystallized by adding one or more heterogeneous crystals that do not react with phase-change materials as the crystal nucleus, so as to reduce the time for transforming to the crystalline state from the amorphous state.
摘要翻译：提供了一种相变存储器层及其制造方法和相变存储单元。通过加入与相变材料不反应的一种或多种非晶体晶体作为晶核，相变记忆层结晶，从而减少从非晶态转变为结晶态的时间。

9. 发明授权

US5682516A Computer system that maintains system wide cache coherency during deferred communication transactions 失效
标题翻译：计算机系统在延迟通信事务期间维持系统级缓存一致性
公开(公告)号：US5682516A
公开(公告)日：1997-10-28
申请号：US205023
申请日：1994-03-01
申请人： Nitin V. Sarangdhar , Wen Han Wang , Michael W. Rhodehamel , James M. Brayton , Amit Merchant , Matthew A. Fisch
发明人： Nitin V. Sarangdhar , Wen Han Wang , Michael W. Rhodehamel , James M. Brayton , Amit Merchant , Matthew A. Fisch
IPC分类号： G06F12/08 , G06F13/368 , H04L29/06 , G06F13/18
CPC分类号： G06F12/0831 , G06F13/368 , H04L29/06 , G06F12/0813
摘要： A computer system is disclosed having a requesting bus agent that issues a communication transaction over a bus and an addressed bus agent that defers the communication transaction to avoid high bus latency. The addressed bus agent later issues a deferred reply transaction over the bus to complete the communication transaction. Special snoop ownership and cache state transition rules maintain cache coherency and processor consistency during deferred communication transactions.
摘要翻译：公开了一种计算机系统，其具有通过总线发布通信事务的请求总线代理和用于延迟通信事务以避免高总线等待时间的寻址总线代理。所处理的总线代理商随后通过总线发出延迟回复交易，以完成通信交易。特殊侦听所有权和缓存状态转换规则在延迟通信事务期间保持缓存一致性和处理器一致性。

10. 发明申请

US20130001704A1 Resistors Formed Based on Metal-Oxide-Semiconductor Structures 有权
标题翻译：基于金属氧化物半导体结构形成的电阻器
公开(公告)号：US20130001704A1
公开(公告)日：2013-01-03
申请号：US13170751
申请日：2011-06-28
申请人： Wen-Han Wang , Chen-Chih Wu , Sheng-Fang Cheng , Kuo-Ji Chen
发明人： Wen-Han Wang , Chen-Chih Wu , Sheng-Fang Cheng , Kuo-Ji Chen
IPC分类号： H01L27/06
CPC分类号： H01L28/20 , H01L27/0629
摘要： A device includes a metal-oxide-semiconductor (MOS) device, which includes a gate electrode and a source/drain region adjacent the gate electrode. A first and a second contact plug are formed directly over and electrically connected to two portions of a same MOS component, wherein the same MOS component is one of the gate electrode and the source/drain region. The same MOS component is configured to be used as a resistor that is connected between the first and the second contact plugs.
摘要翻译：一种器件包括金属氧化物半导体（MOS）器件，其包括栅电极和与栅电极相邻的源/漏区。第一和第二接触插塞形成在相同的MOS部件的两部分上方并电连接，其中相同的MOS部件是栅极电极和源极/漏极区域之一。相同的MOS部件被配置为用作连接在第一和第二接触插塞之间的电阻器。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式