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1. 发明申请

US20080094169A1 Chip-Shaped Electronic Part 有权
标题翻译：芯片形电子零件
公开(公告)号：US20080094169A1
公开(公告)日：2008-04-24
申请号：US11662200
申请日：2005-09-09
申请人： Yasuharu Kinoshita , Toshiki Matsukawa , Naoki Shibuya , Shoji Hoshitoku
发明人： Yasuharu Kinoshita , Toshiki Matsukawa , Naoki Shibuya , Shoji Hoshitoku
IPC分类号： H01C1/142 , H05K7/02
CPC分类号： H01C1/142 , H01C1/06 , H01C7/003 , H01C17/006
摘要： A chip-shaped electronic part includes: a substrate; a pair of upper surface electrodes formed on an upper surface of the substrate; a functional element formed to be electrically connected to the upper surface electrode pair; a pair of lower surface electrodes formed on a lower surface of the substrate at positions opposing the upper surface electrode pair; a pair of end surface electrodes formed on end surfaces of the substrate so that each of the end surface electrode pair is electrically connected to one of the upper surface electrode pair, and to one of the lower surface electrode pair corresponding to the one upper surface electrode; a protective film formed in such a manner as to cover at least the functional element; and a plated layer formed in such a manner as to cover at least each of the upper surface electrode pair, wherein the protective film or the plated layer has at least two points of application at which a load from above the substrate is exerted.
摘要翻译：芯片形电子部件包括：基板; 形成在所述基板的上表面上的一对上表面电极; 形成为与上表面电极对电连接的功能元件; 一对下表面电极，形成在与上表面电极对相对的位置的基板的下表面上; 形成在所述基板的端面上的一对端面电极，使得所述端面电极对中的每一个电连接到所述上表面电极对中的一个，并且与所述一个上表面电极对应的一个下表面电极对 ; 形成为至少覆盖功能元件的保护膜; 以及形成为覆盖上表面电极对中的至少每一个的镀层，其中保护膜或镀层具有至少两个施加点，在该点处施加来自基板上方的负载。

2. 发明授权

US07165315B2 Method for fabricating a resistor 有权
公开(公告)号：US07165315B2
公开(公告)日：2007-01-23
申请号：US11037533
申请日：2005-01-18
申请人： Masato Hashimoto , Yoshiro Morimoto , Akio Fukuoka , Hiroaki Kaito , Hiroyuki Saikawa , Toshiki Matsukawa , Junichi Hayase
发明人： Masato Hashimoto , Yoshiro Morimoto , Akio Fukuoka , Hiroaki Kaito , Hiroyuki Saikawa , Toshiki Matsukawa , Junichi Hayase
IPC分类号： H01C17/00
CPC分类号： H01C17/006 , H01C1/14 , H01C1/148 , H01C7/001 , H01C17/075 , H01C17/283 , H01C17/288 , Y10T29/49082 , Y10T29/49083 , Y10T29/49098 , Y10T29/49099 , Y10T29/49101
摘要： An inexpensive fine resistor which do not require dimensional classifications of discrete substrates, eliminating a process of replacing a mask according to a dimensional ranking of each discrete substrate as in the prior art. The resistor includes discrete substrate made into pieces by dividing an insulated substrate sheet along a first slit dividing portion and a second dividing portion perpendicular to the first dividing portion; top electrode layer formed on a top face of discrete substrate; resistor layer formed such that a part of resistor layer overlaps top electrode layer; protective layers formed so as to cover resistor layer; side electrode layer formed on a side face of discrete substrate such that side electrode layer is electrically coupled to top electrode layer.

3. 发明授权

US07334318B2 Method for fabricating a resistor 有权
标题翻译：制造电阻的方法
公开(公告)号：US07334318B2
公开(公告)日：2008-02-26
申请号：US11037935
申请日：2005-01-18
申请人： Masato Hashimoto , Yoshiro Morimoto , Akio Fukuoka , Hiroaki Kaito , Hiroyuki Saikawa , Toshiki Matsukawa , Junichi Hayase
发明人： Masato Hashimoto , Yoshiro Morimoto , Akio Fukuoka , Hiroaki Kaito , Hiroyuki Saikawa , Toshiki Matsukawa , Junichi Hayase
IPC分类号： H01C17/00
CPC分类号： H01C17/006 , H01C1/14 , H01C1/148 , H01C7/001 , H01C17/075 , H01C17/283 , H01C17/288 , Y10T29/49082 , Y10T29/49083 , Y10T29/49098 , Y10T29/49099 , Y10T29/49101
摘要： A method of manufacturing an inexpensive fine resistor which do not require dimensional classifications of discrete substrates is disclosed. The method eliminates a process of replacing a mask according to a dimensional ranking of each discrete substrate. The method includes: dividing an insulated substrate sheet along a first slit dividing portion and a second dividing portion perpendicular to the first dividing portion; forming a top electrode layer on a top face of the discrete substrate; forming a resistor layer such that a part of the resistor layer overlaps the top electrode layer; forming protective layers so as to cover the resistor layer; and forming side electrode layer on a side face of the discrete substrate such that the side electrode layer is electrically coupled to the top electrode layer.
摘要翻译：公开了一种制造不需要分立衬底的尺寸分类的廉价的精细电阻器的方法。该方法消除了根据每个离散衬底的尺寸排列来替换掩模的过程。该方法包括：沿着第一狭缝分割部和垂直于第一分割部的第二分割部分绝缘基板; 在所述离散基板的顶面上形成顶部电极层; 形成电阻层，使得电阻层的一部分与顶部电极层重叠; 形成保护层以覆盖电阻层; 以及在所述分立衬底的侧面上形成侧电极层，使得所述侧电极层电耦合到所述顶电极层。

4. 发明授权

US07772961B2 Chip-shaped electronic part 有权
标题翻译：芯片形电子零件
公开(公告)号：US07772961B2
公开(公告)日：2010-08-10
申请号：US11662200
申请日：2005-09-09
申请人： Yasuharu Kinoshita , Toshiki Matsukawa , Naoki Shibuya , Shoji Hoshitoku
发明人： Yasuharu Kinoshita , Toshiki Matsukawa , Naoki Shibuya , Shoji Hoshitoku
IPC分类号： H01C1/012
CPC分类号： H01C1/142 , H01C1/06 , H01C7/003 , H01C17/006
摘要： A chip-shaped electronic part includes: a substrate; a pair of upper surface electrodes formed on an upper surface of the substrate; a functional element formed to be electrically connected to the upper surface electrode pair; a pair of lower surface electrodes formed on a lower surface of the substrate at positions opposing the upper surface electrode pair; a pair of end surface electrodes formed on end surfaces of the substrate so that each of the end surface electrode pair is electrically connected to one of the upper surface electrode pair, and to one of the lower surface electrode pair corresponding to the one upper surface electrode; a protective film formed in such a manner as to cover at least the functional element; and a plated layer formed in such a manner as to cover at least each of the upper surface electrode pair, wherein the protective film or the plated layer has at least two points of application at which a load from above the substrate is exerted.
摘要翻译：芯片形电子部件包括：基板; 形成在所述基板的上表面上的一对上表面电极; 形成为与上表面电极对电连接的功能元件; 一对下表面电极，形成在与上表面电极对相对的位置的基板的下表面上; 形成在所述基板的端面上的一对端面电极，使得所述端面电极对中的每一个电连接到所述上表面电极对中的一个，并且与所述一个上表面电极对应的一个下表面电极对 ; 形成为至少覆盖功能元件的保护膜; 以及形成为覆盖上表面电极对中的至少每一个的镀层，其中保护膜或镀层具有至少两个施加点，在该点处施加来自基板上方的负载。

5. 发明授权

US07237324B2 Method for manufacturing chip resistor 失效
标题翻译：芯片电阻制造方法
公开(公告)号：US07237324B2
公开(公告)日：2007-07-03
申请号：US10474419
申请日：2003-01-14
申请人： Toshiki Matsukawa , Yasuharu Kinoshita , Shoji Hoshitoku , Masaharu Takahashi , Yoshinori Ando
发明人： Toshiki Matsukawa , Yasuharu Kinoshita , Shoji Hoshitoku , Masaharu Takahashi , Yoshinori Ando
IPC分类号： H01C17/06
CPC分类号： H01C7/003 , H01C1/142 , H01C17/006 , Y10T29/49082 , Y10T29/49099 , Y10T29/49101 , Y10T29/49789
摘要： A multiple chip resistor is manufactured in the following method. First electrode layers are formed on a first surface of a substrate. Resistor elements electrically connected to the first electrode layers, respectively, are formed on the first surface of the substrate. Slits are formed in the substrate for separating the first electrode layers. Edge electrodes connected to the first electrode layers at the edges of the slits, respectively, are formed on respective edges at the slits of the substrate. The substrate is divided at the slits into strip substrates. Portions of the edge electrodes are removed for electrically isolating the resistor elements from each other. The method provides the edge electrodes on each strip substrate with an improved dimensional accuracy, hence allowing the edge electrodes to be isolated electrically from each other. Consequently, the multiple chip resistor is prevented from being mounted defectively when the resistor is surface-mounted.
摘要翻译：以下方法制造多片式电阻器。第一电极层形成在基板的第一表面上。电连接到第一电极层的电阻元件分别形成在基板的第一表面上。在用于分离第一电极层的基板中形成狭缝。分别在狭缝的边缘处连接到第一电极层的边缘电极在基板的狭缝处的相应边缘上形成。基板在狭缝处分成带状基板。去除边缘电极的一部分，以将电阻元件彼此电隔离。该方法提供了每个带状基板上的边缘电极具有改进的尺寸精度，因此允许边缘电极彼此电隔离。因此，当电阻器被表面安装时，防止多芯片电阻器被不正确地安装。

6. 发明授权

US06935016B2 Method for manufacturing a resistor 失效
标题翻译：制造电阻的方法
公开(公告)号：US06935016B2
公开(公告)日：2005-08-30
申请号：US10181306
申请日：2001-01-17
申请人： Masato Hashimoto , Yoshiro Morimoto , Akio Fukuoka , Hiroaki Kaito , Hiroyuki Saikawa , Toshiki Matsukawa , Junichi Hayase
发明人： Masato Hashimoto , Yoshiro Morimoto , Akio Fukuoka , Hiroaki Kaito , Hiroyuki Saikawa , Toshiki Matsukawa , Junichi Hayase
IPC分类号： H01C1/14 , H01C1/148 , H01C7/00 , H01C17/00 , H01C17/075 , H01C17/28
CPC分类号： H01C17/006 , H01C1/14 , H01C1/148 , H01C7/001 , H01C17/075 , H01C17/283 , H01C17/288 , Y10T29/49082 , Y10T29/49083 , Y10T29/49098 , Y10T29/49099 , Y10T29/49101
摘要： An inexpensive fine resistor which do not require dimensional classifications of discrete substrates, eliminating a process of replacing a mask according to a dimensional ranking of each discrete substrate as in the prior art. The resistor includes discrete substrate made into pieces by dividing an insulated substrate sheet along a first slit dividing portion and a second dividing portion perpendicular to the first dividing portion; top electrode layer formed on a top face of discrete substrate; resistor layer formed such that a part of resistor layer overlaps top electrode layer; protective layers formed so as to cover resistor layer; side electrode layer formed on a side face of discrete substrate such that side electrode layer is electrically coupled to top electrode layer.
摘要翻译：一种廉价的微型电阻器，其不需要离散衬底的尺寸分级，消除了像现有技术那样根据每个离散衬底的尺寸排列代替掩模的工艺。电阻器包括通过沿着第一狭缝分割部分分离绝缘基片并且垂直于第一分割部分的第二分割部分分成多个分立的基片; 形成在离散衬底的顶面上的顶部电极层; 电阻层形成为使得电阻层的一部分与顶部电极层重叠; 保护层形成为覆盖电阻层; 形成在离散基板的侧面上的侧面电极层，使得侧面电极层电耦合到顶部电极层。

7. 发明申请

US20050125991A1 Resistor and method for fabricating the same 有权
标题翻译：电阻及其制造方法
公开(公告)号：US20050125991A1
公开(公告)日：2005-06-16
申请号：US11037533
申请日：2005-01-18
申请人： Masato Hashimoto , Yoshiro Morimoto , Akio Fukuoka , Hiroaki Kaito , Hiroyuki Saikawa , Toshiki Matsukawa , Junichi Hayase
发明人： Masato Hashimoto , Yoshiro Morimoto , Akio Fukuoka , Hiroaki Kaito , Hiroyuki Saikawa , Toshiki Matsukawa , Junichi Hayase
IPC分类号： H01C1/14 , H01C1/148 , H01C7/00 , H01C17/00 , H01C17/075 , H01C17/28
CPC分类号： H01C17/006 , H01C1/14 , H01C1/148 , H01C7/001 , H01C17/075 , H01C17/283 , H01C17/288 , Y10T29/49082 , Y10T29/49083 , Y10T29/49098 , Y10T29/49099 , Y10T29/49101
摘要： An inexpensive fine resistor which do not require dimensional classifications of discrete substrates, eliminating a process of replacing a mask according to a dimensional ranking of each discrete substrate as in the prior art. The resistor includes discrete substrate made into pieces by dividing an insulated substrate sheet along a first slit dividing portion and a second dividing portion perpendicular to the first dividing portion; top electrode layer formed on a top face of discrete substrate; resistor layer formed such that a part of resistor layer overlaps top electrode layer; protective layers formed so as to cover resistor layer; side electrode layer formed on a side face of discrete substrate such that side electrode layer is electrically coupled to top electrode layer.
摘要翻译：一种廉价的微型电阻器，其不需要离散衬底的尺寸分级，消除了像现有技术那样根据每个离散衬底的尺寸排列代替掩模的工艺。电阻器包括通过沿着第一狭缝分割部分分离绝缘基片并且垂直于第一分割部分的第二分割部分分成多个分立的基片; 形成在离散衬底的顶面上的顶部电极层; 电阻层形成为使得电阻层的一部分与顶部电极层重叠; 保护层形成为覆盖电阻层; 形成在离散基板的侧面上的侧面电极层，使得侧面电极层电耦合到顶部电极层。

8. 发明授权

US07188404B2 Method for fabricating a resistor 失效
标题翻译：制造电阻的方法
公开(公告)号：US07188404B2
公开(公告)日：2007-03-13
申请号：US11037963
申请日：2005-01-18
申请人： Masato Hashimoto , Yoshiro Morimoto , Akio Fukuoka , Hiroaki Kaito , Hiroyuki Saikawa , Toshiki Matsukawa , Junichi Hayase
发明人： Masato Hashimoto , Yoshiro Morimoto , Akio Fukuoka , Hiroaki Kaito , Hiroyuki Saikawa , Toshiki Matsukawa , Junichi Hayase
IPC分类号： H01C17/00
CPC分类号： H01C17/006 , H01C1/14 , H01C1/148 , H01C7/001 , H01C17/075 , H01C17/283 , H01C17/288 , Y10T29/49082 , Y10T29/49083 , Y10T29/49098 , Y10T29/49099 , Y10T29/49101
摘要： An inexpensive fine resistor which do not require dimensional classifications of discrete substrates, eliminating a process of replacing a mask according to a dimensional ranking of each discrete substrate as in the prior art. The resistor includes discrete substrate made into pieces by dividing an insulated substrate sheet along a first slit dividing portion and a second dividing portion perpendicular to the first dividing portion; top electrode layer formed on a top face of discrete substrate; resistor layer formed such that a part of resistor layer overlaps top electrode layer; protective layers formed so as to cover resistor layer; side electrode layer formed on a side face of discrete substrate such that side electrode layer is electrically coupled to top electrode layer.
摘要翻译：一种廉价的微型电阻器，其不需要离散衬底的尺寸分级，消除了像现有技术那样根据每个离散衬底的尺寸排列代替掩模的过程。电阻器包括通过沿着第一狭缝分割部分分离绝缘基片并且垂直于第一分割部分的第二分割部分分成多个分立的基片; 形成在离散衬底的顶面上的顶部电极层; 电阻层形成为使得电阻层的一部分与顶部电极层重叠; 保护层形成为覆盖电阻层; 形成在离散基板的侧面上的侧面电极层，使得侧面电极层电耦合到顶部电极层。

9. 发明授权

US07071843B2 Navigation system and navigation equipment 有权
公开(公告)号：US07071843B2
公开(公告)日：2006-07-04
申请号：US10421856
申请日：2003-04-24
申请人： Masaya Hashida , Toshiki Matsukawa , Mayumi Naganuma
发明人： Masaya Hashida , Toshiki Matsukawa , Mayumi Naganuma
IPC分类号： G08G1/123
CPC分类号： G08G1/096811 , G01C21/34 , G08G1/096816
摘要： A navigation system and navigation equipment which reduce the time required for radio transmissions to implement fast navigational guidance. The navigation equipment communicates bi-directionally by radio with a navigation server, thereby providing navigational guidance. The navigation equipment transmits position data delivered by a GPS receiver to the navigation server through a communication device and acquires, from the communication device, map data for display indicative of a map of a surrounding area including a self-location provided by the position data sent back from the navigation server. The navigation equipment then performs map matching between road information contained in the acquired map data for display and the position information, thereby determining a current position on the road, thereby displaying a map in the form of an image on a display unit in accordance with the map data for display and displaying the current position determined by the map matching on the map displayed in the form of an image.

10. 发明授权

US07057490B2 Resistor and production method therefor 失效
标题翻译：电阻及其制作方法
公开(公告)号：US07057490B2
公开(公告)日：2006-06-06
申请号：US10362709
申请日：2001-08-30
申请人： Masato Hashimoto , Akio Fukuoka , Toshiki Matsukawa , Hiroyuki Saikawa , Tsutomu Nakanishi
发明人： Masato Hashimoto , Akio Fukuoka , Toshiki Matsukawa , Hiroyuki Saikawa , Tsutomu Nakanishi
IPC分类号： H01C1/012
CPC分类号： H01C17/006 , H01C1/142 , H01C17/288
摘要： A resistor having reliability in electrical connection between an upper surface electrode and a side face electrode, and in bonding strength between a first thin film and a second thin film is provided. The resistor includes upper surface electrodes formed on a main surface a substrate and side face electrodes disposed to side faces of the substrate and connected electrically to the pair of upper surface electrodes, respectively. The upper surface electrode includes a first upper surface electrode layer and a bonding layer overlying the first upper surface electrode layer. The side face electrode includes a first thin film disposed to a side face of the substrate, a second thin film composed of copper-base alloy film and connected electrically to the first thin film, a first plating film formed by nickel plating for covering the second thin film, and a second plating film covering the first plating film.
摘要翻译：提供了一种在上表面电极和侧面电极之间具有电连接的可靠性以及第一薄膜和第二薄膜之间的接合强度的电阻器。电阻器包括形成在基板的主表面上的上表面电极和设置在基板的侧面并分别与一对上表面电极电连接的侧面电极。上表面电极包括第一上表面电极层和覆盖第一上表面电极层的接合层。侧面电极包括设置在基板的侧面的第一薄膜，由铜基合金膜构成的与第一薄膜电连接的第二薄膜，通过镀镍形成的第一镀膜，用于覆盖第二薄膜薄膜和覆盖第一镀膜的第二镀膜。

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