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1. 发明申请

US20080094169A1 Chip-Shaped Electronic Part 有权
标题翻译：芯片形电子零件
公开(公告)号：US20080094169A1
公开(公告)日：2008-04-24
申请号：US11662200
申请日：2005-09-09
申请人： Yasuharu Kinoshita , Toshiki Matsukawa , Naoki Shibuya , Shoji Hoshitoku
发明人： Yasuharu Kinoshita , Toshiki Matsukawa , Naoki Shibuya , Shoji Hoshitoku
IPC分类号： H01C1/142 , H05K7/02
CPC分类号： H01C1/142 , H01C1/06 , H01C7/003 , H01C17/006
摘要： A chip-shaped electronic part includes: a substrate; a pair of upper surface electrodes formed on an upper surface of the substrate; a functional element formed to be electrically connected to the upper surface electrode pair; a pair of lower surface electrodes formed on a lower surface of the substrate at positions opposing the upper surface electrode pair; a pair of end surface electrodes formed on end surfaces of the substrate so that each of the end surface electrode pair is electrically connected to one of the upper surface electrode pair, and to one of the lower surface electrode pair corresponding to the one upper surface electrode; a protective film formed in such a manner as to cover at least the functional element; and a plated layer formed in such a manner as to cover at least each of the upper surface electrode pair, wherein the protective film or the plated layer has at least two points of application at which a load from above the substrate is exerted.
摘要翻译：芯片形电子部件包括：基板; 形成在所述基板的上表面上的一对上表面电极; 形成为与上表面电极对电连接的功能元件; 一对下表面电极，形成在与上表面电极对相对的位置的基板的下表面上; 形成在所述基板的端面上的一对端面电极，使得所述端面电极对中的每一个电连接到所述上表面电极对中的一个，并且与所述一个上表面电极对应的一个下表面电极对 ; 形成为至少覆盖功能元件的保护膜; 以及形成为覆盖上表面电极对中的至少每一个的镀层，其中保护膜或镀层具有至少两个施加点，在该点处施加来自基板上方的负载。

2. 发明授权

US07794628B2 Chip-shaped electronic component 有权
标题翻译：芯片形电子元件
公开(公告)号：US07794628B2
公开(公告)日：2010-09-14
申请号：US12067126
申请日：2006-08-28
申请人： Naohiro Takashima , Shoji Hoshitoku , Takasi Oobayasi , Mituru Harada
发明人： Naohiro Takashima , Shoji Hoshitoku , Takasi Oobayasi , Mituru Harada
IPC分类号： H01B1/06
CPC分类号： H01C1/148 , H01C1/142 , H01C7/003 , H01C17/006 , H01C17/283
摘要： A chip-shaped electronic component includes a substrate and an end face electrode layer provided on an end face of the substrate, in which the end face electrode layer contains a mixed material. The mixed material includes as a conductive particle, a carbon powder, a whisker-like inorganic filler coated with a conductive film, and a flake-like conductive powder. Additionally, an epoxy resin has a weight-average molecular weight between 1,000 and 80,000.
摘要翻译：片状电子部件包括基板和设置在基板的端面上的端面电极层，其中端面电极层包含混合材料。混合材料包括作为导电颗粒，碳粉末，涂覆有导电膜的晶须状无机填料和片状导电粉末。另外，环氧树脂的重均分子量为1,000〜80,000。

3. 发明申请

US20090134361A1 CHIP-SHAPED ELECTRONIC COMPONENT 有权
标题翻译：芯片形电子元件
公开(公告)号：US20090134361A1
公开(公告)日：2009-05-28
申请号：US12067126
申请日：2006-08-28
申请人： Naohiro Takashima , Shoji Hoshitoku , Takasi Oobayasi , Mituru Harada
发明人： Naohiro Takashima , Shoji Hoshitoku , Takasi Oobayasi , Mituru Harada
IPC分类号： H01B1/22 , H01B1/24 , H01B1/20
CPC分类号： H01C1/148 , H01C1/142 , H01C7/003 , H01C17/006 , H01C17/283
摘要： A chip-shaped electronic component comprising a substrate and an end face electrode layer provided on an end face of the substrate, in which the end face electrode layer contains a mixed material including, as a conductive particle, a carbon powder, a whisker-like inorganic filler coated with a conductive film, and a flake-like conductive powder, and an epoxy resin having a weight-average molecular weight between 1,000 and 80,000.
摘要翻译：一种片状电子元件，其特征在于，具有基板和设置在基板的端面上的端面电极层，其中端面电极层含有作为导电性粒子的碳粉，晶须状的混合材料涂覆有导电膜的无机填料和薄片状导电粉末以及重均分子量在1,000至80,000之间的环氧树脂。

4. 发明授权

US07772961B2 Chip-shaped electronic part 有权
标题翻译：芯片形电子零件
公开(公告)号：US07772961B2
公开(公告)日：2010-08-10
申请号：US11662200
申请日：2005-09-09
申请人： Yasuharu Kinoshita , Toshiki Matsukawa , Naoki Shibuya , Shoji Hoshitoku
发明人： Yasuharu Kinoshita , Toshiki Matsukawa , Naoki Shibuya , Shoji Hoshitoku
IPC分类号： H01C1/012
CPC分类号： H01C1/142 , H01C1/06 , H01C7/003 , H01C17/006
摘要： A chip-shaped electronic part includes: a substrate; a pair of upper surface electrodes formed on an upper surface of the substrate; a functional element formed to be electrically connected to the upper surface electrode pair; a pair of lower surface electrodes formed on a lower surface of the substrate at positions opposing the upper surface electrode pair; a pair of end surface electrodes formed on end surfaces of the substrate so that each of the end surface electrode pair is electrically connected to one of the upper surface electrode pair, and to one of the lower surface electrode pair corresponding to the one upper surface electrode; a protective film formed in such a manner as to cover at least the functional element; and a plated layer formed in such a manner as to cover at least each of the upper surface electrode pair, wherein the protective film or the plated layer has at least two points of application at which a load from above the substrate is exerted.
摘要翻译：芯片形电子部件包括：基板; 形成在所述基板的上表面上的一对上表面电极; 形成为与上表面电极对电连接的功能元件; 一对下表面电极，形成在与上表面电极对相对的位置的基板的下表面上; 形成在所述基板的端面上的一对端面电极，使得所述端面电极对中的每一个电连接到所述上表面电极对中的一个，并且与所述一个上表面电极对应的一个下表面电极对 ; 形成为至少覆盖功能元件的保护膜; 以及形成为覆盖上表面电极对中的至少每一个的镀层，其中保护膜或镀层具有至少两个施加点，在该点处施加来自基板上方的负载。

5. 发明授权

US07237324B2 Method for manufacturing chip resistor 失效
标题翻译：芯片电阻制造方法
公开(公告)号：US07237324B2
公开(公告)日：2007-07-03
申请号：US10474419
申请日：2003-01-14
申请人： Toshiki Matsukawa , Yasuharu Kinoshita , Shoji Hoshitoku , Masaharu Takahashi , Yoshinori Ando
发明人： Toshiki Matsukawa , Yasuharu Kinoshita , Shoji Hoshitoku , Masaharu Takahashi , Yoshinori Ando
IPC分类号： H01C17/06
CPC分类号： H01C7/003 , H01C1/142 , H01C17/006 , Y10T29/49082 , Y10T29/49099 , Y10T29/49101 , Y10T29/49789
摘要： A multiple chip resistor is manufactured in the following method. First electrode layers are formed on a first surface of a substrate. Resistor elements electrically connected to the first electrode layers, respectively, are formed on the first surface of the substrate. Slits are formed in the substrate for separating the first electrode layers. Edge electrodes connected to the first electrode layers at the edges of the slits, respectively, are formed on respective edges at the slits of the substrate. The substrate is divided at the slits into strip substrates. Portions of the edge electrodes are removed for electrically isolating the resistor elements from each other. The method provides the edge electrodes on each strip substrate with an improved dimensional accuracy, hence allowing the edge electrodes to be isolated electrically from each other. Consequently, the multiple chip resistor is prevented from being mounted defectively when the resistor is surface-mounted.
摘要翻译：以下方法制造多片式电阻器。第一电极层形成在基板的第一表面上。电连接到第一电极层的电阻元件分别形成在基板的第一表面上。在用于分离第一电极层的基板中形成狭缝。分别在狭缝的边缘处连接到第一电极层的边缘电极在基板的狭缝处的相应边缘上形成。基板在狭缝处分成带状基板。去除边缘电极的一部分，以将电阻元件彼此电隔离。该方法提供了每个带状基板上的边缘电极具有改进的尺寸精度，因此允许边缘电极彼此电隔离。因此，当电阻器被表面安装时，防止多芯片电阻器被不正确地安装。

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