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1. 发明申请

US20120252201A1 METHOD FOR FABRICATING SEMICONDUCTOR DEVICE 失效
标题翻译：制造半导体器件的方法
公开(公告)号：US20120252201A1
公开(公告)日：2012-10-04
申请号：US13234410
申请日：2011-09-16
申请人： Takuo OHASHI
发明人： Takuo OHASHI
IPC分类号： H01L21/28
CPC分类号： H01L27/11521
摘要： According to one embodiment, a method for fabricating a semiconductor device including a memory cell portion and a select gate portion, the method includes etching a charge accumulation layer, a tunnel insulating film, and a semiconductor substrate to make a trench, burying a first insulating film in the trench to contact with a side surface of the charge accumulation layer, performing heat processing to compress the first insulating film, forming a second insulating film on the charge accumulation layer and the first insulating film, etching the second insulating film in the select gate portion to expose a surface of the charge accumulation layer, forming a silicon layer to contact with the exposed surface of the charge accumulation layer, forming a metal layer on the silicon layer, and performing heat processing to silicide an entire boundary region between the charge accumulation layer and the tunnel insulating film.
摘要翻译：根据一个实施例，一种用于制造包括存储单元部分和选择栅极部分的半导体器件的方法，所述方法包括蚀刻电荷累积层，隧道绝缘膜和半导体衬底以形成沟槽，将第一绝缘体在所述沟槽中与所述电荷蓄积层的侧面接触的膜，进行热处理以压缩所述第一绝缘膜，在所述电荷累积层和所述第一绝缘膜上形成第二绝缘膜，在所述选择中蚀刻所述第二绝缘膜栅极部分，以暴露电荷累积层的表面，形成硅层与电荷累积层的暴露表面接触，在硅层上形成金属层，并进行热处理以使电荷之间的整个边界区域硅化堆积层和隧道绝缘膜。

2. 发明申请

US20100163821A1 VERTICAL DIODE AND METHOD FOR MANUFACTURING SAME AND SEMICONDUCTOR MEMORY DEVICE 有权
标题翻译：垂直二极管及其制造方法和半导体存储器件
公开(公告)号：US20100163821A1
公开(公告)日：2010-07-01
申请号：US12617650
申请日：2009-11-12
申请人： Takuo OHASHI
发明人： Takuo OHASHI
IPC分类号： H01L27/04 , H01L29/861 , H01L21/20
CPC分类号： H01L27/102 , G11C13/0007 , G11C2213/31 , G11C2213/32 , G11C2213/72 , H01L27/101 , H01L27/2409 , H01L27/2463 , H01L29/04 , H01L29/165 , H01L29/8615 , H01L45/04 , H01L45/06 , H01L45/1233 , H01L45/144 , H01L45/146 , H01L45/147
摘要： In a vertical diode, an N+-type layer, an N−-type layer, and a P+-type layer are stacked in this order on a lower electrode film, and an upper electrode film is provided thereon. The effective impurity concentration of the N−-type layer is lower than the effective impurity concentrations of the N+-type layer and the P+-type layer. At least one of the N+-type layer, the N−-type layer, and the P+-type layer is formed from a small grain size polycrystalline semiconductor whose each crystal grain does not penetrate each layer through its thickness.
摘要翻译：在垂直二极管中，N +型层，N型层和P +型层依次层叠在下电极膜上，在其上设置上电极膜。 N型层的有效杂质浓度低于N +型层和P +型层的有效杂质浓度。 N +型层，N型层和P +型层中的至少一层由小晶粒尺寸的多晶半导体形成，每个晶粒的每个晶粒不穿透其每个层的厚度。

3. 发明申请

US20080169520A1 DIELETRIC FILM LAYERED PRODUCT, SEMICONDUCTOR APPARATUS AND PRODUCTION METHODS OF THE SAME 有权
标题翻译： DIELETRIC FILM层状产品，半导体设备及其生产方法
公开(公告)号：US20080169520A1
公开(公告)日：2008-07-17
申请号：US11972729
申请日：2008-01-11
申请人： Takakazu KIYOMURA , Takuo Ohashi
发明人： Takakazu KIYOMURA , Takuo Ohashi
IPC分类号： H01L29/78 , H01L23/58 , H01L21/31 , H01L21/336
CPC分类号： H01L21/02148 , H01L21/022 , H01L21/02332 , H01L21/02337 , H01L21/0234 , H01L21/3141 , H01L21/3143 , H01L21/31604 , H01L21/31645 , H01L27/10814 , H01L27/10873 , H01L29/495 , H01L29/513 , H01L29/517
摘要： In order to provide a dielectric film which can avoid both boron leakage and an increase of the leak current, a semiconductor apparatus which has the dielectric film, a production method of the dielectric film and a production method of the semiconductor apparatus, a dielectric film layered product is applied which includes: a semiconductor substrate (2); a first hafnium-containing silicon oxide nitride layer (3a) made from a microcrystalline structure; a second hafnium-containing silicon oxide nitride layer (3b) made from a non-crystalline structure; and a layered film which is made from the first and second hafnium-containing silicon oxide nitride layers that are layered on the semiconductor substrate, and which has a nitrogen ratio of 15-40 atomic percent.
摘要翻译：为了提供能够避免硼泄漏和漏电流增加的电介质膜，具有电介质膜的半导体装置，电介质膜的制造方法以及半导体装置的制造方法，分层产品包括：半导体衬底（2）; 由微晶结构制成的第一含铪氧化硅氮化物层（3a）由非晶结构制成的第二含铪氧化硅氮化物层（3b）; 以及由层叠在半导体基板上的第一和第二含铪氧化硅氮化物层构成的层叠膜，氮比为15〜40原子％。

4. 发明申请

US20070284634A1 Semiconductor device and method of manufacturing the same 审中-公开
标题翻译：半导体装置及其制造方法
公开(公告)号：US20070284634A1
公开(公告)日：2007-12-13
申请号：US11785948
申请日：2007-04-23
申请人： Shigeyuki Yokoyama , Takuo Ohashi , Shiro Uchiyama
发明人： Shigeyuki Yokoyama , Takuo Ohashi , Shiro Uchiyama
IPC分类号： H01L29/94 , H01L21/336
CPC分类号： H01L29/7851 , H01L27/10873 , H01L27/10879 , H01L29/66818 , H01L29/7854
摘要： A semiconductor device includes a convex portion of a first conductive type protruding from a semiconductor substrate between insulating films formed on the semiconductor substrate in an upper direction than the insulating films. A gate insulating film contains nitrogen and is formed on at least a portion of the convex portion. A gate electrode is formed on the gate insulating film to contain an impurity of a same conductive type as the first conductive type.
摘要翻译：半导体器件包括在半导体衬底上形成在绝缘膜上方的半导体衬底上的绝缘膜上方的第一导电类型的凸部。栅绝缘膜包含氮，并形成在凸部的至少一部分上。栅极电极形成在栅极绝缘膜上，以包含与第一导电类型相同的导电类型的杂质。

5. 发明授权

US06214700B1 Semiconductor device and method for producing same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US06214700B1
公开(公告)日：2001-04-10
申请号：US09321885
申请日：1999-05-28
申请人： Takuo Ohashi , Tomohisa Kitano
发明人： Takuo Ohashi , Tomohisa Kitano
IPC分类号： H01L2176
CPC分类号： H01L21/76202 , H01L21/7621 , H01L21/76216
摘要： On the surface of a field oxide film (3 of FIG. 2e) formed on a substrate region where the effective thickness in the vertical direction of a substrate is diminished due to the presence of a crystal defect (2 of FIG. 1a), the field oxide film is etched by a predetermined thickness until a recess (4 of FIG. 2f) ascribable to the presence of the defect is exposed (step of FIG. 2f). A new oxide film then is formed in an amount corresponding to the above-mentioned thickness on the field oxide film (step of FIG. 3g) to diminish the depth of the recess ascribable to the presence of the defect. To provide a semiconductor device in which leakage between elements can be eliminated with a thin LOCOS oxide film thickness remaining unchanged.
摘要翻译：在由于存在晶体缺陷（图1a的2）而使衬底的垂直方向上的有效厚度减小的衬底区域上形成的场氧化膜（图2e的3）的表面上，以预定的厚度蚀刻场氧化膜，直到暴露出存在缺陷的凹陷（图2f的4）（图2f的步骤）。然后在场氧化膜上形成对应于上述厚度的量的新的氧化膜（图3g的步骤），以减少归因于存在缺陷的凹陷的深度。为了提供半导体器件，其中可以消除元件之间的泄漏，同时薄的LOCOS氧化物膜厚度保持不变。

6. 发明授权

US09027588B2 Pressure control device 有权
标题翻译：压力控制装置
公开(公告)号：US09027588B2
公开(公告)日：2015-05-12
申请号：US13454330
申请日：2012-04-24
申请人： Mari Kusunoki , Takuo Ohashi , Shinji Miyazaki , Norihiko Kamiura
发明人： Mari Kusunoki , Takuo Ohashi , Shinji Miyazaki , Norihiko Kamiura
IPC分类号： G05D16/20 , F16K31/10 , F16K31/04 , F16K31/44 , H01L21/67
CPC分类号： G05D16/2013 , F16K31/04 , F16K31/10 , F16K31/445 , H01L21/67253 , Y10T137/7761
摘要： A pressure control device according to an embodiment includes a solenoid portion for regulating a gate opening of a valve through a first shaft portion connected to the valve, a micrometer for regulating the gate opening through the first shaft portion and a second shaft portion having an axial direction which is parallel with that of the first shaft portion when the second shaft portion is connected to the first shaft portion, and a switching portion. The switching portion switches to cause the solenoid portion to regulate the gate opening or to cause the micrometer to regulate the gate opening.
摘要翻译：根据实施例的压力控制装置包括：螺线管部分，用于通过连接到阀的第一轴部分来调节阀门的开口;调节器，用于调节通过第一轴部分的门开口;以及第二轴部分，在第二轴部与第一轴部连接时与第一轴部的方向平行的方向和切换部。切换部分切换以使螺线管部分调节门开口或使千分尺调节门开口。

7. 发明申请

US20090309133A1 MANUFACTURING METHOD FOR SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE 失效
标题翻译：半导体器件和半导体器件的制造方法
公开(公告)号：US20090309133A1
公开(公告)日：2009-12-17
申请号：US12483728
申请日：2009-06-12
申请人： Takayuki Ito , Yusuke Oshiki , Kouji Matsuo , Kenichi Yoshino , Takaharu Itani , Takuo Ohashi , Toshihiko Iinuma , Kiyotaka Miyano , Kunihiro Miyazaki
发明人： Takayuki Ito , Yusuke Oshiki , Kouji Matsuo , Kenichi Yoshino , Takaharu Itani , Takuo Ohashi , Toshihiko Iinuma , Kiyotaka Miyano , Kunihiro Miyazaki
IPC分类号： H01L29/04 , H01L21/20
CPC分类号： H01L21/823807 , H01L21/2686 , H01L21/823814 , H01L21/823878 , H01L29/165 , H01L29/66636 , H01L29/78 , H01L29/7848
摘要： A manufacturing method for semiconductor device includes: forming an opening, in a surface of a semiconductor substrate being composed of first atom, the opening having an opening ratio y to an area of the surface of the semiconductor substrate ranging from 5 to 30%; forming an epitaxial layer in the opening, the epitaxial layer being made of a mixed crystal containing a second atom in a concentration ranging from 15 to 25%, and the second atom having a lattice constant different from a lattice constant of the first atom; implanting impurity ion into the epitaxial layer; and performing activation annealing at a predetermined temperature T, the predetermined temperature T being equal to or higher than 1150° C. and satisfies a relationship of y≦1E-5exp(21541/T).
摘要翻译：一种半导体装置的制造方法，其特征在于，在半导体基板的由第一原子构成的表面上形成有与半导体基板的表面的面积为5〜30％的开口率y的开口的开口部; 在所述开口中形成外延层，所述外延层由含有15〜25％的浓度的第二原子的混合晶体构成，所述第二原子的晶格常数不同于所述第一原子的晶格常数; 将杂质离子注入到外延层中; 并在预定温度T下进行活化退火，预定温度T等于或高于1150℃，并且满足y <= 1E-5exp（21541 / T）的关系。

8. 发明申请

US20070238316A1 METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE HAVING A NITROGEN-CONTAINING GATE INSULATING FILM 失效
标题翻译：制造具有含氮绝缘膜的半导体器件的方法
公开(公告)号：US20070238316A1
公开(公告)日：2007-10-11
申请号：US11697050
申请日：2007-04-05
申请人： Takuo Ohashi
发明人： Takuo Ohashi
IPC分类号： H01L21/31
CPC分类号： H01L21/0217 , H01L21/0214 , H01L21/02164 , H01L21/02238 , H01L21/02255 , H01L21/02274 , H01L21/0228 , H01L21/28202 , H01L21/3141 , H01L21/3144 , H01L21/3185
摘要： A method for manufacturing a semiconductor device includes the steps of: forming a SiO2 layer on a silicon substrate; forming on the SiO2 layer an SiN film having a N/Si composition ratio smaller than the stoichiometric composition ratio of SiN by using the ALD technique; and performing a plasma-nitriding process on the SiN layer at a substrate temperature of 550 degrees C. or below.
摘要翻译：一种制造半导体器件的方法包括以下步骤：在硅衬底上形成SiO 2层; 通过使用ALD技术在SiO 2层上形成N / Si组成比小于SiN的化学计量组成比的SiN膜; 以及在550℃或更低的衬底温度下在SiN层上进行等离子体氮化处理。

9. 发明申请

US20070099364A1 Method for manufacturing a semiconductor device having a polymetal gate electrode 审中-公开
标题翻译：一种具有多金属栅电极的半导体器件的制造方法
公开(公告)号：US20070099364A1
公开(公告)日：2007-05-03
申请号：US11586493
申请日：2006-10-26
申请人： Takuo Ohashi , Taishi Kubota , Toru Miyazaki , Shigetomi Michimata , Satoru Yamada
发明人： Takuo Ohashi , Taishi Kubota , Toru Miyazaki , Shigetomi Michimata , Satoru Yamada
IPC分类号： H01L21/8234 , H01L21/8242 , H01L21/336 , H01L21/3205 , H01L21/4763
CPC分类号： H01L27/10873 , H01L21/28061 , H01L21/28247 , H01L21/823828 , H01L21/823857
摘要： A method for forming a semiconductor device having a polymetal gate electrode includes the steps of forming a gate oxide film on a silicon substrate, forming a polysilicon film and a tungsten film on the gate oxide film, patterning the polysilicon film and tungsten film, and thermally oxidizing the polysilicon film in an oxidizing atmosphere including water and hydrogen at a substrate-surface temperature of 850 degrees C. and a water content of 7% to 20%.
摘要翻译：一种形成具有多金属栅电极的半导体器件的方法包括以下步骤：在硅衬底上形成栅极氧化膜，在栅极氧化膜上形成多晶硅膜和钨膜，对多晶硅膜和钨膜进行构图，在850℃的基板表面温度和7％〜20％的含水量下，在包括水和氢的氧化气氛中氧化多晶硅膜。

10. 发明授权

US07163871B2 Manufacturing method of semiconductor device and oxidization method of semiconductor substrate 有权
标题翻译：半导体器件的制造方法和半导体衬底的氧化方法
公开(公告)号：US07163871B2
公开(公告)日：2007-01-16
申请号：US10763244
申请日：2004-01-26
申请人： Taishi Kubota , Yoshihiro Kitamura , Takuo Ohashi , Susumu Sakurai , Takayuki Kanda , Shinichi Horibe
发明人： Taishi Kubota , Yoshihiro Kitamura , Takuo Ohashi , Susumu Sakurai , Takayuki Kanda , Shinichi Horibe
IPC分类号： H01L21/76
CPC分类号： H01L21/76232
摘要： A manufacturing method of a semiconductor device having a trench is provided to form, at a corner portion of the trench, an oxide film which is greater in thickness and smaller in stress than at other portions. When the trench formed in the semiconductor substrate is oxidized, it is oxidized in an oxygen environment containing dichloroethylene at a predetermined weight percent to allow the formation of an oxide film having a greater thickness at the corner portion of the trench than thickness at other portions, whereby the semiconductor device improving dielectric breakdown characteristics can be obtained.
摘要翻译：提供具有沟槽的半导体器件的制造方法，以在沟槽的角部形成厚度大于应力的氧化膜，其压力小于其它部分。当在半导体衬底中形成的沟槽被氧化时，其在含有二氯乙烯的氧环境中以预定的重量百分数被氧化，以允许在沟槽的角部比其它部分的厚度形成厚度更大的氧化膜，从而可以获得提高绝缘击穿特性的半导体器件。

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