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1. 发明申请

US20080224219A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20080224219A1
公开(公告)日：2008-09-18
申请号：US12126473
申请日：2008-05-23
申请人： Takayuki SAIKI , Kazuhiko Okawa
发明人： Takayuki SAIKI , Kazuhiko Okawa
IPC分类号： H01L23/62
CPC分类号： H01L27/0288
摘要： A semiconductor device is provided having a high performance resistance element. In an N-type well isolated by an insulating film, two higher concentration N-type regions are formed. An interlayer insulating film is also formed. In a plurality of openings in the interlayer insulating film, one electrode group having a plurality of electrodes is formed on one N-type region, while a second electrode group having a plurality of electrodes is formed on the other N-type region. The relationship between the two N-type regions is between an island region and an annular region surrounding the island. The annular region of the N-type well between the island region and the annular region serves as a resistor R. Thus, discharge channels for charges applied excessively because of ESD or the like evenly exist in the periphery (four regions) of the one N-type region.
摘要翻译：提供具有高性能电阻元件的半导体器件。在绝缘膜隔离的N型阱中，形成两个较高浓度的N型区域。还形成层间绝缘膜。在层间绝缘膜的多个开口中，在一个N型区域上形成具有多个电极的一个电极组，而在另一个N型区域上形成具有多个电极的第二电极组。两个N型区域之间的关系在岛状区域和围绕岛状物的环状区域之间。岛状区域和环状区域之间的N型阱的环状区域用作电阻R.因此，由于ESD等而过度施加的电荷的放电通道在一个N的周边（四个区域）中均匀地存在型区域。

2. 发明授权

US07394134B2 Semiconductor device with electrostatic discharge protection 有权
标题翻译：具有静电放电保护的半导体器件
公开(公告)号：US07394134B2
公开(公告)日：2008-07-01
申请号：US11095709
申请日：2005-03-31
申请人： Takayuki Saiki , Kazuhiko Okawa
发明人： Takayuki Saiki , Kazuhiko Okawa
IPC分类号： H01L23/62
CPC分类号： H01L27/0288
摘要： A semiconductor device is provided having a high performance resistance element. In an N-type well isolated by an insulating film, two higher concentration N-type regions are formed. An interlayer insulating film is also formed. In a plurality of openings in the interlayer insulating film, one electrode group having a plurality of electrodes is formed on one N-type region, while a second electrode group having a plurality of electrodes is formed on the other N-type region. The relationship between the two N-type regions is between an island region and an annular region surrounding the island. The annular region of the N-type well between the island region and the annular region serves as a resistor R. Thus, discharge channels for charges applied excessively because of ESD or the like evenly exist in the periphery (four regions) of the one N-type region.
摘要翻译：提供具有高性能电阻元件的半导体器件。在绝缘膜隔离的N型阱中，形成两个较高浓度的N型区域。还形成层间绝缘膜。在层间绝缘膜的多个开口中，在一个N型区域上形成具有多个电极的一个电极组，而在另一个N型区域上形成具有多个电极的第二电极组。两个N型区域之间的关系在岛状区域和围绕岛状物的环状区域之间。岛状区域和环状区域之间的N型阱的环状区域用作电阻R.因此，由于ESD等而过度施加的电荷的放电通道在一个N的周边（四个区域）中均匀地存在型区域。

3. 发明申请

US20070002509A1 Integrated circuit device and electronic instrument 有权
标题翻译：集成电路器件和电子仪器
公开(公告)号：US20070002509A1
公开(公告)日：2007-01-04
申请号：US11477720
申请日：2006-06-30
申请人： Takashi Kumagai , Hisanobu Ishiyama , Kazuhiro Maekawa , Satoru Ito , Takashi Fujise , Junichi Karasawa , Satoru Kodaira , Takayuki Saiki , Hiroyuki Takamiya
发明人： Takashi Kumagai , Hisanobu Ishiyama , Kazuhiro Maekawa , Satoru Ito , Takashi Fujise , Junichi Karasawa , Satoru Kodaira , Takayuki Saiki , Hiroyuki Takamiya
IPC分类号： H02H9/00
CPC分类号： G09G3/3688 , G02F1/13452 , G02F2202/28 , G09G3/3696 , G09G2300/0426 , G09G2310/027
摘要： An integrated circuit device includes a pad PDx and an electrostatic discharge protection element ESDx formed in a rectangular region and electrically connected with the pad PDx. The pad PDx is disposed in an upper layer of the electrostatic discharge protection element ESDx so that an arrangement direction of the pads is parallel to a long side direction of the region in which the electrostatic discharge protection element ESDx is formed, and the pad PDx overlaps part or the entirety of the electrostatic discharge protection element ESDx.
摘要翻译：集成电路器件包括形成在矩形区域中并与焊盘PDx电连接的焊盘PDx和静电放电保护元件ESDx。垫PDx设置在静电放电保护元件ESDx的上层中，使得焊盘的布置方向平行于形成有静电放电保护元件ESDx的区域的长边方向，并且焊盘PDx重叠部分或全部静电放电保护元件ESDx。

4. 发明授权

US08547773B2 Integrated circuit device and electronic instrument 有权
标题翻译：集成电路器件和电子仪器
公开(公告)号：US08547773B2
公开(公告)日：2013-10-01
申请号：US11477714
申请日：2006-06-30
申请人： Takayuki Saiki , Satoru Ito , Masahiko Moriguchi , Takashi Kumagai , Hisanobu Ishiyama , Takashi Fujise , Junichi Karasawa , Satoru Kodaira , Kazuhiro Maekawa
发明人： Takayuki Saiki , Satoru Ito , Masahiko Moriguchi , Takashi Kumagai , Hisanobu Ishiyama , Takashi Fujise , Junichi Karasawa , Satoru Kodaira , Kazuhiro Maekawa
IPC分类号： G11C8/00
CPC分类号： G09G3/3674 , G09G3/3685
摘要： An integrated circuit device includes at least one data driver block for driving data lines, a plurality of control transistors TC1 and TC2, each of the control transistors being provided corresponding to each output line of the data driver block and controlled by using a common control signal, and a pad arrangement region in which data driver pads P1 and P2 for electrically connecting the data lines and the output lines QL1 and QL2 of the data driver block are disposed. The control transistors TC1 and TC2 are disposed in the pad arrangement region.
摘要翻译：集成电路装置包括用于驱动数据线的至少一个数据驱动器块，多个控制晶体管TC1和TC2，每个控制晶体管对应于数据驱动器模块的每个输出线提供，并通过使用公共控制信号以及其中设置用于电连接数据线和数据驱动器块的输出线QL1和QL2的数据驱动器焊盘P1和P2的焊盘布置区域。控制晶体管TC1和TC2设置在焊盘布置区域中。

5. 发明申请

US20100133701A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE 失效
标题翻译：半导体器件及制造半导体器件的方法
公开(公告)号：US20100133701A1
公开(公告)日：2010-06-03
申请号：US12627652
申请日：2009-11-30
申请人： Takayuki SAIKI , Shinya SATO , Hiroyuki TAKAMIYA
发明人： Takayuki SAIKI , Shinya SATO , Hiroyuki TAKAMIYA
IPC分类号： H01L23/60 , H01L21/60
CPC分类号： H01L25/0657 , H01L23/481 , H01L23/60 , H01L24/29 , H01L24/32 , H01L24/48 , H01L25/18 , H01L27/0251 , H01L2224/0401 , H01L2224/0557 , H01L2224/16 , H01L2224/48091 , H01L2224/48227 , H01L2225/0651 , H01L2225/06513 , H01L2225/06541 , H01L2924/00014 , H01L2924/0002 , H01L2924/078 , H01L2924/15311 , H01L2924/181 , H01L2924/1815 , H01L2224/05552 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A semiconductor device includes: a plurality of external terminals; a plurality of semiconductor substrates that are layered; a through electrode penetrating through at least one of the semiconductor substrates and electrically connected with any of the external terminals; and a plurality of electrostatic discharge protection circuits provided on any one of the semiconductor substrates. In the device, the through electrode is electrically connected with the plurality of electrostatic discharge protection circuits.
摘要翻译：半导体器件包括：多个外部端子; 层叠的多个半导体基板; 穿透电极，穿透至少一个所述半导体衬底并与所述任何外部端子电连接; 以及设置在所述半导体基板中的任一个上的多个静电放电保护电路。在该器件中，贯通电极与多个静电放电保护电路电连接。

6. 发明申请

US20080252634A1 Integrated circuit device and electronic instrument 审中-公开
标题翻译：集成电路器件和电子仪器
公开(公告)号：US20080252634A1
公开(公告)日：2008-10-16
申请号：US12081008
申请日：2008-04-09
申请人： Shinya Sato , Takayuki Saiki , Hiroyuki Takamiya , Masaaki Abe
发明人： Shinya Sato , Takayuki Saiki , Hiroyuki Takamiya , Masaaki Abe
IPC分类号： G06F3/038 , H03K19/0175
CPC分类号： H03K19/00315
摘要： An integrated circuit device includes a first circuit block that includes low-voltage transistors (LVTr) and operates using a first high-potential power supply voltage and a first low-potential power supply voltage, a second circuit block that includes low-voltage transistors (LVTr) and operates using a second high-potential power supply voltage and a second low-potential power supply voltage that differ in power supply system from the first circuit block, and an interface circuit (I/O buffer) provided between the first circuit block and the second circuit block. The interface circuit (I/O buffer) includes medium-voltage transistors (MVTr: transistors of which the thickness of the gate insulating film is larger than that of the low-voltage transistors (LVTr)). An electrostatic discharge protection circuit formed of bidirectional diodes is provided between a first and second low-potential power supply nodes.
摘要翻译：集成电路器件包括包括低压晶体管（LVTr）的第一电路块，并且使用第一高电位电源电压和第一低电位电源电压进行操作，第二电路块包括低压晶体管（ LVTr），并且使用电源系统与第一电路块不同的第二高电位电源电压和第二低电位电源电压进行操作，以及设置在第一电路块之间的接口电路（I / O缓冲器）和第二电路块。接口电路（I / O缓冲器）包括中压晶体管（MVTr：栅极绝缘膜的厚度大于低压晶体管的厚度（LVTr）的晶体管）。在第一和第二低电位电源节点之间设置由双向二极管形成的静电放电保护电路。

7. 发明授权

US08310478B2 Integrated circuit device and electronic instrument 有权
标题翻译：集成电路器件和电子仪器
公开(公告)号：US08310478B2
公开(公告)日：2012-11-13
申请号：US11477741
申请日：2006-06-30
申请人： Takashi Kumagai , Hisanobu Ishiyama , Kazuhiro Maekawa , Satoru Ito , Takashi Fujise , Junichi Karasawa , Satoru Kodaira , Takayuki Saiki , Hiroyuki Takamiya
发明人： Takashi Kumagai , Hisanobu Ishiyama , Kazuhiro Maekawa , Satoru Ito , Takashi Fujise , Junichi Karasawa , Satoru Kodaira , Takayuki Saiki , Hiroyuki Takamiya
IPC分类号： G06F3/038
CPC分类号： H01L27/0207 , G09G3/3688 , H01L27/105 , H01L27/11 , H01L27/1116
摘要： An integrated circuit device includes first and second transistors NTr1 and PTr1 push-pull connected between first and second power supply lines and outputting a voltage of one of the first and second power supply lines to a connection node ND by a charge-pump operation, and a pad PD electrically connected with the connection node ND and electrically connected with a flying capacitor, to which a given voltage is applied at one end, at the other end of the flying capacitor. The pad PD is disposed in an upper layer of at least one of the first and second transistors NTr1 and PTr1 so that the pad PD overlaps part or the entirety of at least one of the first and second transistors NTr1 and PTr1.
摘要翻译：集成电路装置包括连接在第一和第二电源线之间的第一和第二晶体管NTr1和PTr1推挽，并通过电荷泵操作将第一和第二电源线之一的电压输出到连接节点ND，以及与连接节点ND电连接并与在一端施加给定电压的飞跨电容器电连接在浮动电容器的另一端处的焊盘PD。焊盘PD设置在第一和第二晶体管NTr1和PTr1中的至少一个的上层中，使得焊盘PD与第一和第二晶体管NTr1和PTr1中的至少一个晶体管的一部分或全部重叠。

8. 发明授权

US08247841B2 Semiconductor device and method for manufacturing semiconductor device 有权
标题翻译：半导体装置及半导体装置的制造方法
公开(公告)号：US08247841B2
公开(公告)日：2012-08-21
申请号：US12627510
申请日：2009-11-30
申请人： Takayuki Saiki , Shinya Sato , Hiroyuki Takamiya
发明人： Takayuki Saiki , Shinya Sato , Hiroyuki Takamiya
IPC分类号： H01L29/66 , H01L21/00
CPC分类号： H01L25/0657 , H01L23/481 , H01L23/60 , H01L24/73 , H01L27/0266 , H01L2224/04042 , H01L2224/16225 , H01L2224/48227 , H01L2225/06513 , H01L2225/06527 , H01L2225/06541 , H01L2924/15311 , H01L2924/181 , H01L2924/00
摘要： A semiconductor device includes: a plurality of semiconductor substrates that are layered; a through electrode penetrating through a predetermined semiconductor substrate of the semiconductor substrates and electrically connected with an external terminal of the semiconductor device; a circuit element provided on the predetermined semiconductor substrate; and an electrostatic discharge protection circuit also provided on the predetermined semiconductor substrate. In the device, wiring resistance between the electrostatic discharge protection circuit and the through electrode is smaller than wiring resistance between the circuit element and the through electrode.
摘要翻译：半导体器件包括：层叠的多个半导体衬底; 穿透电极，穿过半导体衬底的预定半导体衬底并与半导体器件的外部端子电连接; 设置在所述预定半导体衬底上的电路元件; 以及也设置在预定半导体衬底上的静电放电保护电路。在该装置中，静电放电保护电路与贯通电极之间的布线电阻小于电路元件与贯通电极之间的布线电阻。

9. 发明授权

US08188544B2 Integrated circuit device and electronic instrument 有权
标题翻译：集成电路器件和电子仪器
公开(公告)号：US08188544B2
公开(公告)日：2012-05-29
申请号：US11477720
申请日：2006-06-30
申请人： Takashi Kumagai , Hisanobu Ishiyama , Kazuhiro Maekawa , Satoru Ito , Takashi Fujise , Junichi Karasawa , Satoru Kodaira , Takayuki Saiki , Hiroyuki Takamiya
发明人： Takashi Kumagai , Hisanobu Ishiyama , Kazuhiro Maekawa , Satoru Ito , Takashi Fujise , Junichi Karasawa , Satoru Kodaira , Takayuki Saiki , Hiroyuki Takamiya
IPC分类号： H01L23/62
CPC分类号： G09G3/3688 , G02F1/13452 , G02F2202/28 , G09G3/3696 , G09G2300/0426 , G09G2310/027
摘要： An integrated circuit device includes a pad PDx and an electrostatic discharge protection element ESDx formed in a rectangular region and electrically connected with the pad PDx. The pad PDx is disposed in an upper layer of the electrostatic discharge protection element ESDx so that an arrangement direction of the pads is parallel to a long side direction of the region in which the electrostatic discharge protection element ESDx is formed, and the pad PDx overlaps part or the entirety of the electrostatic discharge protection element ESDx.
摘要翻译：集成电路器件包括形成在矩形区域中并与焊盘PDx电连接的焊盘PDx和静电放电保护元件ESDx。垫PDx设置在静电放电保护元件ESDx的上层中，使得焊盘的布置方向平行于形成有静电放电保护元件ESDx的区域的长边方向，并且焊盘PDx重叠部分或全部静电放电保护元件ESDx。

10. 发明申请

US20110128274A1 Integrated Circuit Device and Electronic Instrument 审中-公开
标题翻译：集成电路器件和电子仪器
公开(公告)号：US20110128274A1
公开(公告)日：2011-06-02
申请号：US13022995
申请日：2011-02-08
申请人： Takashi Kumagai , Hisanobu Ishiyama , Kazuhiro Maekawa , Satoru ITO , Takashi Fujise , Junichi Karasawa , Satoru Kodaira , Takayuki Saiki , Hiroyuki Takamiya
发明人： Takashi Kumagai , Hisanobu Ishiyama , Kazuhiro Maekawa , Satoru ITO , Takashi Fujise , Junichi Karasawa , Satoru Kodaira , Takayuki Saiki , Hiroyuki Takamiya
IPC分类号： G06F3/038
CPC分类号： H01L27/0207 , G09G3/3688 , H01L27/105 , H01L27/11 , H01L27/1116
摘要： An integrated circuit device includes first and second transistors NTr1 and PTr1 push-pull connected between first and second power supply lines and outputting a voltage of one of the first and second power supply lines to a connection node ND by a charge-pump operation, and a pad PD electrically connected with the connection node ND and electrically connected with a flying capacitor, to which a given voltage is applied at one end, at the other end of the flying capacitor. The pad PD is disposed in an upper layer of at least one of the first and second transistors NTr1 and PTr1 so that the pad PD overlaps part or the entirety of at least one of the first and second transistors NTr1 and PTr1.
摘要翻译：集成电路装置包括连接在第一和第二电源线之间的第一和第二晶体管NTr1和PTr1推挽，并通过电荷泵操作将第一和第二电源线之一的电压输出到连接节点ND，以及与连接节点ND电连接并与在一端施加给定电压的飞跨电容器电连接在浮动电容器的另一端处的焊盘PD。焊盘PD设置在第一和第二晶体管NTr1和PTr1中的至少一个的上层中，使得焊盘PD与第一和第二晶体管NTr1和PTr1中的至少一个晶体管的一部分或全部重叠。

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