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1. 发明授权

US08029859B2 Method of depositing Ge-Sb-Te thin film 有权
标题翻译： Ge-Sb-Te薄膜沉积方法
公开(公告)号：US08029859B2
公开(公告)日：2011-10-04
申请号：US11507829
申请日：2006-08-22
申请人： Jung-Wook Lee , Byung-Chul Cho , Ki-Hoon Lee , Tae-Wook Seo
发明人： Jung-Wook Lee , Byung-Chul Cho , Ki-Hoon Lee , Tae-Wook Seo
IPC分类号： C23C16/00 , H05H1/24 , C23C16/06
CPC分类号： C23C16/45523 , C23C16/30
摘要： There is provided a method of depositing a Ge—Sb—Te thin film, including: a Ge—Sb—Te thin-film forming step of feeding and purging a first precursor including any one of Ge, Sb and Te, a second precursor including another one of Ge, Sb and Te and a third precursor including the other one of Ge, Sb and Te into and from a chamber in which a wafer is mounted and forming the Ge—Sb—Te thin film on the wafer; and a reaction gas feeding step of feeding reaction gas while any one of the first to third precursors is fed.
摘要翻译：提供了一种沉积Ge-Sb-Te薄膜的方法，包括：Ge-Sb-Te薄膜形成步骤，用于进料和吹扫包括Ge，Sb和Te中任一种的第一前体;第二前体，包括 Ge，Sb和Te中的另一个，和包含Ge，Sb和Te中的另一个的第三前体进入并安装晶片的腔室，并在晶片上形成Ge-Sb-Te薄膜; 以及在供给第一至第三前体中的任何一个的同时进料反应气体的反应气体供给步骤。

2. 发明授权

US07842606B2 Method of depositing thin film and method of manufacturing semiconductor using the same 有权
标题翻译：沉积薄膜的方法和使用其制造半导体的方法
公开(公告)号：US07842606B2
公开(公告)日：2010-11-30
申请号：US11720450
申请日：2005-11-28
申请人： Ki Hoon Lee , Young Hoon Park , Sahng Kyoo Lee , Tae Wook Seo , Ho Seung Chang
发明人： Ki Hoon Lee , Young Hoon Park , Sahng Kyoo Lee , Tae Wook Seo , Ho Seung Chang
IPC分类号： H01L21/4763 , H01L21/02
CPC分类号： G03F7/091 , H01L21/0276 , H01L21/3146 , Y10S438/952
摘要： Disclosed herein are a method of depositing a thin film and a method of manufacturing a semiconductor using the same, having high selectivity by increasing etching resistance while an extinction coefficient associated with anti-reflectivity is maintained low. The method of depositing a thin film according to the invention includes (a) depositing an carbon anti-reflective film on the bottom film of a substrate; and (b) adding a compound containing nitrogen (N), fluorine (F) or silicon (Si) to the surface or the inner portion of the carbon anti-reflective film, to deposit a thin film of a-C:N, a-C:F or a-C:Si, having high selectivity, to a thickness from 1 to 100 nm using an atomic layer deposition process. Therefore, an ultrathin film having etching resistance is formed on or in the carbon anti-reflective film and the density and compressive stress of the carbon anti-reflective film are increased, thus increasing etching selectivity.
摘要翻译：本文公开了一种沉积薄膜的方法和使用该薄膜的半导体的制造方法，通过增加抗蚀性而具有高选择性，同时将与抗反射性相关联的消光系数保持为低。根据本发明的沉积薄膜的方法包括（a）在基底的底膜上沉积碳抗反射膜; 和（b）在碳抗反射膜的表面或内部添加含有氮（N），氟（F）或硅（Si）的化合物，沉积a：N，aC：F 或aC：Si，具有高选择性，使用原子层沉积工艺，厚度为1至100nm。因此，在碳抗反射膜上或碳抗反射膜上形成具有耐腐蚀性的超薄膜，并且碳抗反射膜的密度和压缩应力增加，从而增加蚀刻选择性。

3. 发明申请

US20070048977A1 Method of depositing Ge-Sb-Te thin film 有权
标题翻译： Ge-Sb-Te薄膜沉积方法
公开(公告)号：US20070048977A1
公开(公告)日：2007-03-01
申请号：US11507829
申请日：2006-08-22
申请人： Jung-Wook Lee , Byung-Chul Cho , Ki-Hoon Lee , Tae-Wook Seo
发明人： Jung-Wook Lee , Byung-Chul Cho , Ki-Hoon Lee , Tae-Wook Seo
IPC分类号： C23C16/00 , H01L21/20 , H01L21/36 , H01L31/20
CPC分类号： C23C16/45523 , C23C16/30
摘要： There is provided a method of depositing a Ge—Sb—Te thin film, including: a Ge—Sb—Te thin-film forming step of feeding and purging a first precursor including any one of Ge, Sb and Te, a second precursor including another one of Ge, Sb and Te and a third precursor including the other one of Ge, Sb and Te into and from a chamber in which a wafer is mounted and forming the Ge—Sb—Te thin film on the wafer; and a reaction gas feeding step of feeding reaction gas while any one of the first to third precursors is fed.
摘要翻译：提供了一种沉积Ge-Sb-Te薄膜的方法，包括：Ge-Sb-Te薄膜形成步骤，用于进料和吹扫包括Ge，Sb和Te中任一种的第一前体;第二前体，包括 Ge，Sb和Te中的另一个，和包含Ge，Sb和Te中的另一个的第三前体进入并安装晶片的腔室，并在晶片上形成Ge-Sb-Te薄膜; 以及在供给第一至第三前体中的任何一个的同时进料反应气体的反应气体供给步骤。

4. 发明授权

US06569782B2 Insulating layer, semiconductor device and methods for fabricating the same 失效
公开(公告)号：US06569782B2
公开(公告)日：2003-05-27
申请号：US09800892
申请日：2001-03-08
申请人： Jin-Ho Jeon , Byoung-Deog Choi , Jong-Seung Yi , Tae-Wook Seo
发明人： Jin-Ho Jeon , Byoung-Deog Choi , Jong-Seung Yi , Tae-Wook Seo
IPC分类号： H01L2131
CPC分类号： H01L21/02129 , C23C16/401 , C23C16/56 , H01L21/02271 , H01L21/02304 , H01L21/02337 , H01L21/31625
摘要： An insulating layer having a BPSG layer, a semiconductor device and methods for fabricating them. After preparing an oxidizing atmosphere using an oxygen gas, a first seed layer is formed with a tetraethylorthosilicate (TEOS) and the oxygen gas. Thereafter, a second seed layer, used to form an insulating layer capable of controlling an amount of a boron, is formed by means of using a triethylborate (TEB), the TEOS and the oxygen gas. Then, the insulating layer having a BPSG layer is formed using the TEB, a triethylphosphate, the TEOS and an ozone gas. About 5.25 to 5.75% by weight of the boron and about 2.75 to 4.25% by weight of the phosphorous are added to the insulating layer.

5. 发明授权

US06376303B1 Method of manufacturing a capacitor having oxide layers with different impurities and method of fabricating a semiconductor device comprising the same 有权
标题翻译：制造具有不同杂质的氧化物层的电容器的制造方法以及制造其的半导体器件的制造方法
公开(公告)号：US06376303B1
公开(公告)日：2002-04-23
申请号：US09499295
申请日：2000-02-07
申请人： Tae Wook Seo , Jeon Sig Lim
发明人： Tae Wook Seo , Jeon Sig Lim
IPC分类号： H01L218242
CPC分类号： H01L28/87 , H01L28/84
摘要： A method of manufacturing a capacitor having a high storage capacitance and a method of fabricating semiconductor devices incorporating the same include measures to ensure that the substrate and/or components of the device are not thermally damaged during the process of forming a sacrificial structure of doped oxide layers used as a form in producing the storage electrode of the capacitor. The oxide layers are formed over the substrate by LPCVD or PECVD, which processes can be carried out at a temperature of only about 400-600° C. Each one of an adjacent pair of the doped oxide layers has a different etching rate from the other as the result of a difference (type or amount) in impurities contained in the oxide layers. At least one hole is formed in the sacrificial structure to create a side wall of the sacrificial structure. The side wall is etched so that repeating tooth-like prominences and depressions are formed at the side wall as the result of the different etching rates of the oxide layers. Subsequently, a conductive layer, constituting the storage electrode of the capacitor, is formed over the side wall so that the prominences and depressions of the side wall are reproduced in the conductive layer. A silicon HSG layer can be formed on an inner wall surface or on all of the exposed surfaces of the storage electrode to further increase the storage capacitance.
摘要翻译：制造具有高存储电容的电容器的方法以及制造包含该半导体器件的半导体器件的方法包括以下措施：确保在形成掺杂氧化物的牺牲结构的工艺期间器件的衬底和/或器件不被热损伤作为制造电容器的存储电极的形式的层。氧化物层通过LPCVD或PECVD在衬底上形成，该过程可以在仅约400-600℃的温度下进行。相邻的一对掺杂氧化物层中的每一个具有与另一个不同的蚀刻速率作为在氧化物层中含有的杂质的差异（类型或量）的结果。在牺牲结构中形成至少一个孔以产生牺牲结构的侧壁。蚀刻侧壁，由于氧化物层的不同蚀刻速率的结果，在侧壁上形成重复的齿状凸起和凹陷。随后，在侧壁上形成构成电容器的存储电极的导电层，使得在导电层中再现侧壁的突起和凹陷。可以在存储电极的内壁表面或所有暴露表面上形成硅HSG层，以进一步增加存储电容。

6. 发明授权

US06372555B1 Semiconductor integrated circuit device and method of manufacturing the same 失效
标题翻译：半导体集成电路器件及其制造方法
公开(公告)号：US06372555B1
公开(公告)日：2002-04-16
申请号：US09399926
申请日：1999-09-21
申请人： Seung-Jae Lee , Tae-Wook Seo , Sun-Hoo Park
发明人： Seung-Jae Lee , Tae-Wook Seo , Sun-Hoo Park
IPC分类号： H01L2182
CPC分类号： H01L23/5258 , H01L2924/0002 , H01L2924/00
摘要： A novel fuse structure for a semiconductor integrated circuit device and the method of manufacturing the semiconductor integrated circuit device is disclosed. The fuse structure is comprised of a first interconnection metal layer formed on a semiconductor substrate; an inter-metal dielectric layer formed on the first interconnection metal layer having a via exposing the first interconnection metal layer; a via plug filling up the via; a metal layer for a fuse and a second interconnection metal layer consecutively deposited on the via plug and the inter-metal dielectric layer; and an opening area exposing the metal layer for a fuse is positioned more than twice the thickness of the second interconnection metal layer from the via. With the present invention, a contact failure which can result from a damage to via plug in a subsequent stripping step can be prevented. Also, a passivation layer formed after opening the fuse area prevents a short-circuit between adjacent fuses in a subsequent laser repairing process.
摘要翻译：公开了一种用于半导体集成电路器件的新型熔丝结构和半导体集成电路器件的制造方法。熔丝结构由形成在半导体衬底上的第一互连金属层构成; 在所述第一互连金属层上形成的金属间介电层，其具有暴露所述第一互连金属层的通孔; 通孔插入通孔; 用于保险丝的金属层和连续地沉积在通孔插塞和金属间介电层上的第二互连金属层; 并且露出用于保险丝的金属层的开口面积比第二互连金属层从通孔的厚度的两倍以上。利用本发明，可以防止在随后的剥离步骤中由通孔堵塞造成的接触故障。此外，在打开保险丝区域之后形成的钝化层在随后的激光修复过程中防止相邻熔丝之间的短路。

7. 发明授权

US07785664B2 Method of depositing thin film 失效
标题翻译：沉积薄膜的方法
公开(公告)号：US07785664B2
公开(公告)日：2010-08-31
申请号：US11571547
申请日：2005-12-14
申请人： Tae Wook Seo , Young Hoon Park , Ki Hoon Lee , Sahng Kyoo Lee
发明人： Tae Wook Seo , Young Hoon Park , Ki Hoon Lee , Sahng Kyoo Lee
IPC分类号： C23C16/06 , C23C16/34
CPC分类号： H01L21/76843 , H01L21/28556 , H01L21/76861
摘要： A method is provided for depositing thin films in which the thin films are continuously deposited into one chamber and 1-6 wafers are loaded into the chamber. In the method, a process gap between a shower head or a gas injection unit and a substrate is capable of being controlled. The method comprises (a) loading at least one substrate into the chamber, (b) depositing the Ti thin film onto the substrate, adjusted so that a first process gap is maintained, (c) moving a wafer block so that the first process gap is changed into a second process gap in order to control the process gap of the substrate upon which the Ti thin film is deposited, (d) depositing the TiN thin film onto the substrate, moved to set the second process gap, and (e) unloading the substrate upon which the Ti/TiN thin films are deposited.
摘要翻译：提供了一种用于沉积薄膜的方法，其中薄膜连续沉积到一个室中，并且将1-6个晶片装入室中。在该方法中，能够控制淋浴喷头或气体喷射单元与基板之间的处理间隙。该方法包括：（a）将至少一个衬底装载到腔室中，（b）将Ti薄膜沉积到衬底上，进行调整，使得保持第一工艺间隙;（c）移动晶片块使得第一工艺间隙改变为第二工艺间隙，以便控制沉积Ti薄膜的衬底的工艺间隙，（d）将TiN薄膜沉积到衬底上，移动以设定第二工艺间隙，（e）卸载沉积有Ti / TiN薄膜的基板。

8. 发明申请

US20080166887A1 Method of Depositing Thin Film and Method of Manufacturing Semiconductor Using the Same 有权
标题翻译：沉积薄膜的方法及使用其制造半导体的方法
公开(公告)号：US20080166887A1
公开(公告)日：2008-07-10
申请号：US11720450
申请日：2005-11-28
申请人： Ki Hoon Lee , Young Hoon Park , Sahng Kyoo Lee , Tae Wook Seo , Ho Seung Chang
发明人： Ki Hoon Lee , Young Hoon Park , Sahng Kyoo Lee , Tae Wook Seo , Ho Seung Chang
IPC分类号： H01L21/31
CPC分类号： G03F7/091 , H01L21/0276 , H01L21/3146 , Y10S438/952
摘要： Disclosed herein are a method of depositing a thin film and a method of manufacturing a semiconductor using the same, having high selectivity by increasing etching resistance while an extinction coefficient associated with anti-reflectivity is maintained low. The method of depositing a thin film according to the invention includes (a) depositing an carbon anti-reflective film on the bottom film of a substrate; and (b) adding a compound containing nitrogen (N), fluorine (F) or silicon (Si) to the surface or the inner portion of the carbon anti-reflective film, to deposit a thin film of a-C:N, a-C:F or a-C:Si, having high selectivity, to a thickness from 1 to 100 nm using an atomic layer deposition process. Therefore, an ultrathin film having etching resistance is formed on or in the carbon anti-reflective film and the density and compressive stress of the carbon anti-reflective film are increased, thus increasing etching selectivity.
摘要翻译：本文公开了一种沉积薄膜的方法和使用该薄膜的半导体的制造方法，通过增加抗蚀性而具有高选择性，同时将与抗反射性相关联的消光系数保持为低。根据本发明的沉积薄膜的方法包括（a）在基底的底膜上沉积碳抗反射膜; 和（b）在碳抗反射膜的表面或内部添加含有氮（N），氟（F）或硅（Si）的化合物，沉积a：N，aC：F 或aC：Si，具有高选择性，使用原子层沉积工艺，厚度为1至100nm。因此，在碳抗反射膜上或碳抗反射膜上形成具有耐腐蚀性的超薄膜，并且碳抗反射膜的密度和压缩应力增加，从而增加蚀刻选择性。

9. 发明授权

US06387776B1 Method for forming trench isolation regions 有权
标题翻译：形成沟槽隔离区域的方法
公开(公告)号：US06387776B1
公开(公告)日：2002-05-14
申请号：US09520716
申请日：2000-03-08
申请人： Jong-Seung Yi , Tae Wook Seo , Jin-Ho Jeon
发明人： Jong-Seung Yi , Tae Wook Seo , Jin-Ho Jeon
IPC分类号： H01L2176
CPC分类号： H01L21/76232
摘要： A method for forming trench isolation regions in a semiconductor device reliably electrically isolates a device and enhances a device density. The method for forming trench isolation regions includes forming a trench on a surface of a semiconductor device with a predetermined depth; forming a nitride liner layer on the surface of the semiconductor including the trench, forming a gas distribution region which is uniformly distributed on the nitride liner layer; and forming an insulation layer by filling the trench after said forming of the gas distribution region. The gas distribution region is preferably formed by introducing an ozone gas. The insulation layer is preferably formed by simultaneously introducing ozone gas and TEOS(Tetra Ethyl Ortho-Silicate) chemical.
摘要翻译：在半导体器件中形成沟槽隔离区域的方法可靠地电隔离器件并提高器件密度。用于形成沟槽隔离区的方法包括在半导体器件的表面上形成具有预定深度的沟槽; 在包括沟槽的半导体的表面上形成氮化物衬垫层，形成均匀分布在氮化物衬垫层上的气体分布区域; 以及在形成气体分配区域之后通过填充沟槽来形成绝缘层。优选通过引入臭氧气体来形成气体分布区域。绝缘层优选通过同时引入臭氧气体和TEOS（四乙基正硅酸盐）化学品而形成。

10. 发明授权

US06329276B1 Method of forming self-aligned silicide in semiconductor device 有权
标题翻译：在半导体器件中形成自对准硅化物的方法
公开(公告)号：US06329276B1
公开(公告)日：2001-12-11
申请号：US09392470
申请日：1999-09-09
申请人： Ja-Hum Ku , Soo-Geun Lee , Chul-Sung Kim , Tae-Wook Seo , Eung-Joon Lee , Joo-Hyuk Chung
发明人： Ja-Hum Ku , Soo-Geun Lee , Chul-Sung Kim , Tae-Wook Seo , Eung-Joon Lee , Joo-Hyuk Chung
IPC分类号： H01L213205
CPC分类号： H01L29/665 , H01L21/28518
摘要： There is provided a semiconductor device fabrication method. In the method, a gate layer is formed on a semiconductor substrate and patterned to form a first resultant structure, a metal layer is formed on the first resultant structure, a capping layer is formed on the metal layer, a metal silicide is formed on the gate layer by heating the substrate at a first temperature, unreacted metal layer and first capping layer are removed to form a second resultant structure, a second capping layer is formed on the second resultant structure, and the substrate is heated at a second temperature higher than the first temperature. The second capping layer suppresses a silicidation rate in the secondary heat treatment, thereby allowing a silicide of a good morphology to be achieved.
摘要翻译：提供了半导体器件制造方法。在该方法中，在半导体衬底上形成栅极层并形成第一结构，在第一结果结构上形成金属层，在金属层上形成覆盖层，在金属层上形成金属硅化物通过在第一温度下加热衬底，去除未反应的金属层和第一覆盖层以形成第二结构结构，在第二结构结构上形成第二覆盖层，并且将衬底在高于第一个温度。第二覆盖层抑制二次热处理中的硅化率，从而实现良好形态的硅化物。

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