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1. 发明申请

WO0246975A9 ROUTING METHOD AND APPARATUS 审中-公开
标题翻译：路由方式和设备
公开(公告)号：WO0246975A9
公开(公告)日：2004-05-27
申请号：PCT/US0147016
申请日：2001-12-06
申请人： SIMPLEX SOLUTIONS INC , TEIG STEVEN , BUSET OSCAR , CALDWELL ANDREW , JACQUES ETIENNE , FRANKLE JONATHAN A , CHAO HENG-YI
发明人： TEIG STEVEN , BUSET OSCAR , CALDWELL ANDREW , JACQUES ETIENNE , FRANKLE JONATHAN A , CHAO HENG-YI
IPC分类号： G06F17/50 , G11B7/085 , H01L21/82 , H01L23/52
CPC分类号： G06F17/5077 , G11B7/08582
摘要： The invention is directed towards routing method and apparatus. Some embodiments provide a routing that uses diagonal routes. This method routes several nets within a region of a circuit layout. Each net includes a set of pins in the region. The method initially partitions the region into several sub-regions. For each particular net in the region, the method then identifies a route that connects the sub-regions that contains a pin from the set of pins of the particular net. Some of the identified routes have edges that are at least partially diagonal.
摘要翻译：本发明涉及路由方法和装置。一些实施例提供使用对角线路由的路由。该方法在电路布局区域内路由几个网络。每个网络包括该区域中的一组引脚。该方法最初将区域划分为几个子区域。对于该区域中的每个特定网络，该方法然后识别连接包含特定网络的引脚组的引脚的子区域的路由。一些所识别的路线具有至少部分对角线的边缘。

2. 发明申请

WO9925686B1 CYCLIC AMINE DERIVATIVES AND THEIR USE AS DRUGS 审中-公开
标题翻译：循环胺衍生物及其作为药物使用
公开(公告)号：WO9925686B1
公开(公告)日：1999-07-08
申请号：PCT/US9823254
申请日：1998-11-17
申请人： TEIJIN LTD , COMBICHEM INC , SHIOTA TATSUKI , KATAOKA KEN ICHIRO , IMAI MINORU , TSUTSUMI TAKAHARU , SUDOH MASAKI , SOGAWA RYO , MORITA TAKUYA , HADA TAKAHIKO , MUROGA YUMIKO , TAKENOUCHI OSAMI , FURUYA MONORU , ENDO NORIAKI , TARBY CHRISTINE M , MOREE WILNA , TEIG STEVEN L
发明人： SHIOTA TATSUKI , KATAOKA KEN-ICHIRO , IMAI MINORU , TSUTSUMI TAKAHARU , SUDOH MASAKI , SOGAWA RYO , MORITA TAKUYA , HADA TAKAHIKO , MUROGA YUMIKO , TAKENOUCHI OSAMI , FURUYA MONORU , ENDO NORIAKI , TARBY CHRISTINE M , MOREE WILNA , TEIG STEVEN L
IPC分类号： C07D223/02 , A61K31/40 , A61K31/4025 , A61K31/404 , A61K31/4184 , A61K31/422 , A61K31/427 , A61K31/433 , A61K31/4427 , A61K31/443 , A61K31/4433 , A61K31/4439 , A61K31/445 , A61K31/4468 , A61K31/4525 , A61K31/4535 , A61K31/454 , A61K31/4545 , A61K31/55 , A61P1/00 , A61P1/04 , A61P1/16 , A61P9/00 , A61P9/10 , A61P11/00 , A61P11/06 , A61P13/12 , A61P17/06 , A61P19/02 , A61P25/00 , A61P29/00 , A61P43/00 , C07D207/09 , C07D207/14 , C07D207/32 , C07D207/325 , C07D207/34 , C07D207/40 , C07D207/416 , C07D209/08 , C07D209/42 , C07D211/26 , C07D211/56 , C07D211/58 , C07D213/65 , C07D213/75 , C07D213/81 , C07D213/82 , C07D231/14 , C07D231/16 , C07D235/16 , C07D239/52 , C07D249/18 , C07D261/08 , C07D263/56 , C07D263/58 , C07D271/06 , C07D285/14 , C07D307/14 , C07D307/68 , C07D317/50 , C07D317/60 , C07D319/18 , C07D333/16 , C07D333/20 , C07D333/38 , C07D333/42 , C07D333/68 , C07D401/06 , C07D401/12 , C07D401/14 , C07D403/06 , C07D405/06 , C07D405/12 , C07D405/14 , C07D407/12 , C07D409/06 , C07D409/12 , C07D409/14 , C07D413/06 , C07D413/12 , C07D413/14 , C07D417/06 , C07D417/12 , C07D487/04 , C07D495/04 , C07D513/04 , A61K31/41 , A61K31/435
CPC分类号： C07D207/325 , C07D207/09 , C07D207/14 , C07D207/34 , C07D207/416 , C07D209/08 , C07D209/42 , C07D211/26 , C07D211/56 , C07D211/58 , C07D213/65 , C07D213/75 , C07D213/81 , C07D213/82 , C07D231/14 , C07D231/16 , C07D235/16 , C07D239/52 , C07D249/18 , C07D261/08 , C07D263/56 , C07D263/58 , C07D271/06 , C07D285/14 , C07D307/14 , C07D307/68 , C07D317/50 , C07D317/60 , C07D319/18 , C07D333/16 , C07D333/20 , C07D333/38 , C07D333/42 , C07D333/68 , C07D401/06 , C07D401/12 , C07D405/06 , C07D405/12 , C07D407/12 , C07D409/06 , C07D409/12 , C07D413/06 , C07D413/12 , C07D413/14 , C07D417/12 , C07D487/04 , C07D495/04 , C07D513/04
摘要： A compound represented by general formula (I), a pharmaceutically acceptable acid addition salt thereof or a pharmaceutically acceptable C1-C6 alkyl addition salt thereof, and their medical applications. Since these compounds inhibit the action of chemokines such as MIP-1 alpha and/or MCP-1 on target cells, they may be useful as a therapeutic drug and/or preventative drug in diseases, such as atherosclerosis, rheumatoid arthritis, and the like where blood monocytes and lymphocytes infiltrate into tissues.
摘要翻译：由通式（I）表示的化合物，其药学上可接受的酸加成盐或其药学上可接受的C 1 -C 6烷基加成盐及其医疗应用。由于这些化合物抑制趋化因子如MIP-1α和/或MCP-1对靶细胞的作用，因此它们可用作疾病如动脉粥样硬化，类风湿性关节炎等中的治疗药物和/或预防药物其中血液单核细胞和淋巴细胞浸润到组织中。

3. 发明申请

WO2011162858A1 RESCALING 审中-公开
标题翻译：重新缩放
公开(公告)号：WO2011162858A1
公开(公告)日：2011-12-29
申请号：PCT/US2011/031482
申请日：2011-04-06
申请人： TABULA, INC. , WEBER, Scott, J. , EBELING, Christopher, D. , CALDWELL, Andrew , TEIG, Steven , CALLAHAN, Timothy, J. , NGUYEN, Hung, Q. , SUN, Shangzhi , YEOLE, Shilpa, V.
发明人： WEBER, Scott, J. , EBELING, Christopher, D. , CALDWELL, Andrew , TEIG, Steven , CALLAHAN, Timothy, J. , NGUYEN, Hung, Q. , SUN, Shangzhi , YEOLE, Shilpa, V.
IPC分类号： H03K19/173
CPC分类号： G06F17/5077 , G06F17/5045 , G06F17/505 , G06F17/5054
摘要： A novel method for designing an integrated circuit ("IC") by rescaling an original set of circuits in a design of the IC is disclosed. The original set of circuits to be rescaled includes sequential nodes, combinational nodes, and interconnects. Each sequential node is associated with a phase of a clock. The method generates a rescaled set of circuits that includes multiple replica sets of the circuits. Each replica set of circuits includes sequential nodes, combinational nodes, and interconnects that are identical to nodes and interconnects in the original set of circuits. Each sequential node is associated with a phase of a clock that is at a fraction of the phase of its corresponding sequential element in the original set. The method connects nodes in each replica set of circuits to a logically equivalent node in another replica set. The method replaces the original set of circuits with the rescaled set of circuits.
摘要翻译：公开了一种通过在IC的设计中重新调整原始电路组来设计集成电路（“IC”）的新颖方法。要重新缩放的原始电路组包括顺序节点，组合节点和互连。每个顺序节点与时钟的相位相关联。该方法产生包括电路的多个复制集合的重新定标的电路集合。每个电路副本集合包括与原始电路组中的节点和互连相同的顺序节点，组合节点和互连。每个顺序节点与时钟的相位相关联，时钟的相位是原始集合中其对应的顺序元素的相位的一小部分。该方法将每个电路副本中的节点连接到另一副本集中的逻辑等效节点。该方法用重新定标的电路组替换原始电路组。

4. 发明申请

WO2011123151A1 SYSTEM AND METHOD FOR REDUCING RECONFIGURATION POWER USAGE 审中-公开
标题翻译：减少重新配置电力使用的系统和方法
公开(公告)号：WO2011123151A1
公开(公告)日：2011-10-06
申请号：PCT/US2010/053487
申请日：2010-10-21
申请人： TABULA INC. , HUANG, Randy, R. , VOOGEL, Martin , HU, Jingcao , TEIG, Steven
发明人： HUANG, Randy, R. , VOOGEL, Martin , HU, Jingcao , TEIG, Steven
IPC分类号： H03K19/173
CPC分类号： H03K19/0008 , G06F17/50 , G06F17/5054 , G06F17/5072 , G06F17/5077 , G06F17/5081 , G06F2217/78 , H03K19/1737 , H03K19/17748 , H03K19/17756 , H03K19/17784 , H03K19/17796
摘要： A system and method for reducing power consumption in a reconfigurable integrated circuit. Some embodiments provide placement and routing programs that reduce the number of bits to be reconfigured. Some embodiments provide placement and routing programs that increase the number of groups of circuits that do not need reconfiguration at some times. Some embodiments include circuits that selectively block reconfiguration.
摘要翻译：一种用于降低可重构集成电路中的功耗的系统和方法。一些实施例提供了减少要重新配置的比特数的布局和路由程序。一些实施例提供了放置和路由程序，其增加了在某些时间不需要重新配置的电路组的数量。一些实施例包括选择性地阻止重新配置的电路。

5. 发明申请

WO2004051403A3 METHOD, APPARATUS, AND SYSTEM FOR ROUTING 审中-公开
标题翻译：方法，装置和路由系统
公开(公告)号：WO2004051403A3
公开(公告)日：2005-06-30
申请号：PCT/US0336873
申请日：2003-11-18
申请人： CADENCE DESIGN SYSTEMS INC , FRANKLE JONATHAN , CALDWELL ANDREW , JACQUES ETIENNE , TEIG STEVEN
发明人： FRANKLE JONATHAN , CALDWELL ANDREW , JACQUES ETIENNE , TEIG STEVEN
IPC分类号： G06F20060101 , G06F17/50
CPC分类号： G06F1/00 , G06F17/50
摘要： Some embodiments search for a three-dimensionnal global path between first and second sets of routable elements in a region of layout that has multiple layers (920). These embodiments partition the region into several sub-region (105). They then perform a path search to identify a path between a first set of sub-regions that contains the first-set elements and a second set of sub-regions that contain a second-set element (2720). During the path search, these embodiments explore expansions along Manhattan and nonManhattan routing directions between the su-regions on a plurality of layer (3020).
摘要翻译：一些实施例在具有多个层（920）的布局区域中搜索第一和第二组可路由元件之间的三维全局路径。这些实施例将区域划分成几个子区域（105）。然后，他们执行路径搜索以识别包含第一集合元素的第一组子区域和包含第二集合元素的第二组子区域之间的路径（2720）。在路径搜索期间，这些实施例探索沿着曼哈顿和多个层（3020）上的su区域之间的非曼哈顿路由方向的扩展。

6. 发明申请

WO2010033263A1 CONTROLLABLE STORAGE ELEMENTS FOR AN IC 审中-公开
标题翻译： IC的可控存储元件
公开(公告)号：WO2010033263A1
公开(公告)日：2010-03-25
申请号：PCT/US2009/033840
申请日：2009-02-11
申请人： TABULA, INC. , REDGRAVE, Jason , VOOGEL, Martin , TEIG, Steven
发明人： REDGRAVE, Jason , VOOGEL, Martin , TEIG, Steven
IPC分类号： H03K19/173
CPC分类号： H03K19/17736 , H03K19/173 , H03K19/1776
摘要： An integrated circuit ('IC') that includes a configurable routing fabric with controllable storage elements is described. The routing fabric provides a communication pathway that routes signals to and from source and destination components. The routing fabric may provide the ability to selectively store the signals passing through the routing fabric within the storage elements of the routing fabric. In this manner, a source or destination component may continually perform operations (e.g., computational or routing) irrespective of whether a previous signal from or to such a component is stored within the routing fabric. The source and destination components include configurable logic circuits, configurable interconnect circuits, and various other circuits that receive or distribute signals throughout the IC.
摘要翻译：描述了包括具有可控存储元件的可配置布线结构的集成电路（'IC'）。路由结构提供了将信号路由到源节点和目的地组件之间的通信路径。路由结构可以提供选择性地将通过路由结构的信号存储在路由结构的存储元件内的能力。以这种方式，源或目的地组件可以连续地执行操作（例如，计算或路由），而不管来自或来自这样的组件的先前信号是否存储在路由结构内。源和目标组件包括可配置逻辑电路，可配置互连电路以及在整个IC中接收或分配信号的各种其他电路。

7. 发明申请

WO2009131569A1 CONFIGURABLE IC WITH PACKET SWITCH CONFIGURATION NETWORK 审中-公开
标题翻译：可配置IC与分组开关配置网络
公开(公告)号：WO2009131569A1
公开(公告)日：2009-10-29
申请号：PCT/US2008/061074
申请日：2008-04-21
申请人： TABULA, INC. , REDGRAVE, Jason , KHUBCHANDANI, Teju , HUTCHINGS, Brad , TEIG, Steven , SCHMIT, Herman
发明人： REDGRAVE, Jason , KHUBCHANDANI, Teju , HUTCHINGS, Brad , TEIG, Steven , SCHMIT, Herman
IPC分类号： H03K19/173
CPC分类号： H03K19/17776 , G06F17/5054 , H03K19/17736 , H03K19/17752 , H03K19/17756 , H03K19/17764
摘要： Some embodiments of the invention provide configurable integrated circuit (IC) that includes several configurable circuits that are conceptually in tiles. The IC also includes a first data network for passing data between the configurable circuits. The IC further includes a second packet-switch network for receiving packets of data from the outside of the configurable IC and switchably routing each packet to at least one destination tile. In some embodiments, the second packet-switch network supplies data from the tiles that the configurable circuits output in response to data packets received from outside of the configurable IC. Also, in some embodiments, a particular packet that is for a particular resource in a particular tile includes a first address that identifies the particular configurable tile from the plurality of configurable tiles, and then a second address that identifies the particular resource within the particular configurable tile.
摘要翻译：本发明的一些实施例提供了可配置集成电路（IC），其包括概念上在瓦片中的几个可配置电路。 IC还包括用于在可配置电路之间传递数据的第一数据网络。 IC还包括第二分组交换网络，用于从可配置IC的外部接收数据分组，并且可切换地将每个分组路由到至少一个目的地分块。在一些实施例中，第二分组交换网络响应于从可配置IC的外部接收的数据分组提供可配置电路输出的瓦片中的数据。此外，在一些实施例中，用于特定瓦片中的特定资源的特定分组包括识别来自多个可配置分块的特定可配置分块的第一地址，然后标识特定可配置分组内的特定资源的第二地址瓦。

8. 发明申请

WO2009039462A1 METHOD AND SYSTEM FOR REPORTING ON A PRIMARY CIRCUIT STRUCTURE OF AN INTEGRATED CIRCUIT (IC) USING A SECONDARY CIRCUIT STRUCTURE OF THE IC 审中-公开
标题翻译：使用IC的二次电路结构报告集成电路（IC）的主电路结构的方法和系统
公开(公告)号：WO2009039462A1
公开(公告)日：2009-03-26
申请号：PCT/US2008/077141
申请日：2008-09-19
申请人： TABULA, INC. , MILLER, Marc , TEIG, Steven , REDGRAVE, Jason , HUTCHINGS, Brad , THOM, Danny
发明人： MILLER, Marc , TEIG, Steven , REDGRAVE, Jason , HUTCHINGS, Brad , THOM, Danny
IPC分类号： G06F11/26 , G11C29/08
CPC分类号： G01R31/3177 , G06F11/221 , G11C2029/0409
摘要： Some embodiments provide an integrated circuit ("IC") with a primary circuit structure. The primary circuit structure is for performing multiple operations that implement a user design. The primary circuit structure includes multiple circuits. The IC also includes a secondary monitoring structure for monitoring multiple operations. The secondary monitoring structure includes a network communicatively coupled to multiple circuits of the primary circuit structure. The secondary monitoring circuit structure is for analyzing the monitored operations and reporting on the analysis to a circuit outside of the IC.
摘要翻译：一些实施例提供具有主电路结构的集成电路（“IC”）。主电路结构用于执行实现用户设计的多个操作。主电路结构包括多个电路。 IC还包括用于监视多个操作的二级监视结构。辅助监视结构包括通信地耦合到主电路结构的多个电路的网络。二次监视电路结构用于分析被监控的操作并将分析报告给IC外的电路。

9. 发明申请

WO2003077630A2 METHOD AND APPARATUS FOR SYNTHESIS 审中-公开
标题翻译：合成方法和装置
公开(公告)号：WO2003077630A2
公开(公告)日：2003-09-25
申请号：PCT/US2003/002984
申请日：2003-01-31
申请人： CADENCE DESIGN SYSTEMS, INC. , TEIG, Steven , ASMUS, Hetzel
发明人： TEIG, Steven , ASMUS, Hetzel
IPC分类号： G06F17/50 , G06F9/455
CPC分类号： G06F17/505 , G06F17/5045 , Y10S707/99931 , Y10S707/99943
摘要： Some embodiments of the invention provide a method for pre-tabulating sub-networks. This method (1) generates a sub-network that performs a function, (2) generates a parameter based on this function, and (3) stores the sub-network in a storage structure base don the generated parameter. In some embodiments, the generated sub-network has several circuit elements. Also, in some embodiments, the generated sub-network performs a set of two or more functions. Some embodiments store each generated sub-network in an encoded manner. Some embodiments provide a method for producing a circuit description of a design. This method (1) selects a candidate sub-network from the design, (2) identifies an output function performed by the sub-network, (3) based on the identified output function, identifies a replacement sub-network from a storage structure that stores replacement sub-networks, and (49 replaces the selected candidate sub-network with the identified replacement sub-network in certain conditions. In some embodiments, this method is performed to map a design to a particular technology library. Some embodiments provide a data storage structure that stores a plurality of sub-networks based on parameters derived from the output functions of the sub-networks.
摘要翻译：本发明的一些实施例提供了一种预制子网络的方法。该方法（1）生成执行功能的子网络，（2）基于该功能生成参数，（3）将子网络存储在生成的参数的存储结构基础中。在一些实施例中，所生成的子网具有多个电路元件。此外，在一些实施例中，所生成的子网络执行一组两个或更多个功能。一些实施例以编码的方式存储每个生成的子网络。一些实施例提供了一种用于产生设计的电路描述的方法。该方法（1）从设计中选择候选子网络，（2）识别由子网执行的输出功能，（3）基于所识别的输出功能，从存储结构中识别替换子网络，存储替换子网络，（49）在特定条件下用所标识的替换子网络替换所选择的候选子网络。在一些实施例中，执行该方法将设计映射到特定技术库，一些实施例提供数据存储结构，其基于从所述子网的输出功能导出的参数来存储多个子网。

10. 发明申请

WO0247165A3 METHOD AND APPARATUS FOR CONSIDERING DIAGONAL WIRING IN PLACEMENT 审中-公开
标题翻译：用于考虑放置对角线的方法和装置
公开(公告)号：WO0247165A3
公开(公告)日：2003-08-21
申请号：PCT/US0146406
申请日：2001-12-05
申请人： SIMPLEX SOLUTIONS INC , TEIG STEVEN , GANLEY JOSEPH L
发明人： TEIG STEVEN , GANLEY JOSEPH L
IPC分类号： G06F17/50 , G11B7/085 , H01L21/82
CPC分类号： G06F17/5072 , G06F17/5077 , G11B7/08582
摘要： Some embodiments of the invention are placers that use diagonal lines in calculating the costs of potential placement configurations. For instance, some embodiments estimate the wirelength cost of a placement configuration by using a line that is completely or partially diagonal. Other embodiments use diagonal lines to measure congestion costs of potential placement configurations.
摘要翻译：本发明的一些实施例是在计算潜在的放置配置的成本时使用对角线的放置器。例如，一些实施例通过使用完全或部分对角线的线来估计放置配置的线长度成本。其他实施例使用对角线来测量潜在位置配置的拥塞成本。

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