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1. 发明授权

US08940576B1 Methods for n-type doping of graphene, and n-type-doped graphene compositions 有权
标题翻译：石墨烯n型掺杂的方法和n型掺杂石墨烯组合物
公开(公告)号：US08940576B1
公开(公告)日：2015-01-27
申请号：US13239673
申请日：2011-09-22
申请人： Steven S. Bui , Jeong-Sun Moon
发明人： Steven S. Bui , Jeong-Sun Moon
IPC分类号： H01L31/00
CPC分类号： H01L29/1606 , B82Y30/00 , B82Y40/00 , C01B32/194
摘要： The present invention provides practical methods for n-type doping of graphene, either during graphene synthesis or following the formation of graphene. Some variations provide a method of n-type doping of graphene, comprising introducing a phosphorus-containing dopant fluid to a surface of graphene, under effective conditions to dope the graphene with phosphorus atoms or with phosphorus-containing molecules or fragments. It has been found that substitutional doping with phosphine can effectively modulate the electrical properties of graphene, such as graphene supported on Si or SiC substrates. Graphene sheet resistances well below 200 ohm/sq, and sheet carrier concentrations above 5×1013 cm−2, have been observed experimentally for n-doped graphene produced by the disclosed methods. This invention provides n-doped graphene for various electronic-device applications.
摘要翻译：在石墨烯合成或石墨烯形成之后，本发明提供石墨烯的n型掺杂的实用方法。一些变型提供了石墨烯的n型掺杂的方法，包括在有效条件下将含磷掺杂剂流体引入到石墨烯的表面，以用磷原子或含磷分子或片段掺杂石墨烯。已经发现，使用膦的取代掺杂可以有效地调节石墨烯的电性能，例如负载在Si或SiC衬底上的石墨烯。对于通过所公开的方法制备的n掺杂石墨烯，实验观察到石墨烯片电阻远低于200欧姆/平方英寸，片载体浓度高于5×1013厘米-2。本发明提供了用于各种电子设备应用的n掺杂石墨烯。

2. 发明授权

US08575659B1 Carbon-beryllium combinationally doped semiconductor 失效
标题翻译：碳铍组合掺杂半导体
公开(公告)号：US08575659B1
公开(公告)日：2013-11-05
申请号：US13209395
申请日：2011-08-13
申请人： Steven S. Bui , Tahir Hussain , James Chingwei Li
发明人： Steven S. Bui , Tahir Hussain , James Chingwei Li
IPC分类号： H01L29/66 , H01L21/8249
CPC分类号： H01L29/36 , H01L29/0826 , H01L29/1004 , H01L29/207 , H01L29/66242 , H01L29/7371
摘要： A combinationally doped semiconductor layer, a double heterojunction bipolar transistor (DHBT) including a combinationally doped semiconductor layer, and a method of making a combinationally doped semiconductor layer employ a combination of carbon and beryllium doping. The combinationally doped semiconductor layer includes a first sublayer of a semiconductor material doped substantially with beryllium and a second sublayer of the semiconductor material doped substantially with carbon. The DHBT includes a carbon-beryllium combinationally doped semiconductor layer as a base layer. The method of making a combinationally doped semiconductor layer includes growing a first sublayer of the semiconductor layer, the first sublayer being doped substantially with beryllium and growing a second sublayer of the semiconductor layer, the second sublayer being doped substantially with carbon.
摘要翻译：组合掺杂半导体层，包括组合掺杂半导体层的双异质结双极晶体管（DHBT）以及制造组合掺杂半导体层的方法采用碳和铍掺杂的组合。组合掺杂的半导体层包括基本上掺杂有铍的半导体材料的第一子层和基本上掺杂碳的半导体材料的第二子层。 DHBT包括作为基底层的碳 - 铍组合掺杂半导体层。制造组合掺杂半导体层的方法包括生长半导体层的第一子层，第一子层基本上掺杂有铍并生长半导体层的第二子层，第二子层基本上被碳掺杂。

3. 发明授权

US07582536B1 Electronic device with reduced interface charge between epitaxially grown layers and a method for making the same 失效
公开(公告)号：US07582536B1
公开(公告)日：2009-09-01
申请号：US12191482
申请日：2008-08-14
申请人： Rajesh D. Rajavel , Mary Y. Chen , Steven S. Bui , David H. Chow , James Chingwei Li , Mehran Mokhtari , Marko Sokolich
发明人： Rajesh D. Rajavel , Mary Y. Chen , Steven S. Bui , David H. Chow , James Chingwei Li , Mehran Mokhtari , Marko Sokolich
IPC分类号： H01L21/331 , H01L21/8222
CPC分类号： H01L29/7371 , H01L27/0605 , H01L29/0821 , H01L29/66318 , Y10S438/906
摘要： An electronic device contains a substrate, a sub-collector supported by the substrate, an un-doped layer having a selectively implanted buried sub-collector and supported by the sub-collector, an As-based nucleation layer partially supported by the un-doped layer, a collector layer supported by the As-based nucleation layer, a base layer supported by the collector layer, an emitter layer and a base contact supported by the base layer, an emitter cap layer supported by the emitter layer, an emitter contact supported by the emitter cap layer, and a collector contact supported by the sub-collector. A method provides for selecting a first InP layer, forming an As-based nucleation layer on the first InP layer, and epitaxially growing a second InP layer on the As-based nucleation layer.

4. 发明授权

US07531851B1 Electronic device with reduced interface charge between epitaxially grown layers and a method for making the same 有权
标题翻译：在外延生长层之间具有降低的界面电荷的电子器件及其制造方法
公开(公告)号：US07531851B1
公开(公告)日：2009-05-12
申请号：US11713070
申请日：2007-02-28
申请人： Rajesh D. Rajavel , Mary Y. Chen , Steven S. Bui , David H. Chow , James Chingwei Li , Mehran Mokhtari , Marko Sokolich
发明人： Rajesh D. Rajavel , Mary Y. Chen , Steven S. Bui , David H. Chow , James Chingwei Li , Mehran Mokhtari , Marko Sokolich
IPC分类号： H01L31/0328
CPC分类号： H01L29/7371 , H01L27/0605 , H01L29/0821 , H01L29/66318 , Y10S438/906
摘要： An electronic device contains a substrate, a sub-collector supported by the substrate, an un-doped layer having a selectively implanted buried sub-collector and supported by the sub-collector, an As-based nucleation layer partially supported by the un-doped layer, a collector layer supported by the As-based nucleation layer, a base layer supported by the collector layer, an emitter layer and a base contact supported by the base layer, an emitter cap layer supported by the emitter layer, an emitter contact supported by the emitter cap layer, and a collector contact supported by the sub-collector. A method provides for selecting a first InP layer, forming an As-based nucleation layer on the first InP layer, and epitaxially growing a second InP layer on the As-based nucleation layer.
摘要翻译：电子器件包含衬底，由衬底支撑的子集电极，具有选择性注入的掩埋子集电极并由子集电极支撑的未掺杂层，由未掺杂的部分支撑的基于As的成核层由As基成核层支撑的集电体层，由集电极层支撑的基极层，由基极层支撑的发射极层和基极接触，由发射极层支撑的发射极盖层，负极由发射极盖层和由集电极支撑的集电极触点。一种方法提供选择第一InP层，在第一InP层上形成基于As的成核层，以及在As基成核层上外延生长第二InP层。

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