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    • 8. 发明授权
    • Method of integrating the fabrication process for integrated circuits and MEM devices
    • 集成电路和MEM器件制造工艺的集成方法
    • US06797534B1
    • 2004-09-28
    • US10418121
    • 2003-04-18
    • Shuo-Lin TuLu-Shan ChiangShih-Lin Chu
    • Shuo-Lin TuLu-Shan ChiangShih-Lin Chu
    • H01L2100
    • B81C1/00246B81C2203/0735
    • A method of forming a MEM device with an integrated circuit that includes providing a semiconductor substrate including a first region and a second region, forming an integrated circuit device on the first region, forming a first insulating layer on the semiconductor substrate, etching the first insulating layer to form a first dielectric layer on the first region and a second dielectric layer on the second region spaced apart from the first dielectric layer, forming a second insulating layer over the semiconductor substrate, the first dielectric layer and the second dielectric layer, etching the second insulating layer to expose the first dielectric layer, forming a third insulating layer over the semiconductor substrate, the second insulatng layer and the first dielectric layer, etching the third insulating layer to form a plurality of vias, and forming a metal layer over the semiconductor substrate to fill the vias.
    • 一种用集成电路形成MEM器件的方法,该集成电路包括提供包括第一区域和第二区域的半导体衬底,在第一区域上形成集成电路器件,在半导体衬底上形成第一绝缘层,蚀刻第一绝缘层 层,以在第一区域上形成第一电介质层,并且在第二区域上与第一介电层隔开的第二电介质层,在半导体衬底,第一介电层和第二电介质层上形成第二绝缘层,蚀刻 第二绝缘层以暴露第一介电层,在半导体衬底上形成第三绝缘层,第二绝缘层和第一介电层,蚀刻第三绝缘层以形成多个通孔,并在半导体上形成金属层 底物填充通孔。