专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US5055847A Differential sensing current-steering analog-to-digital converter 失效
标题翻译：差分感应电流转向模数转换器
公开(公告)号：US5055847A
公开(公告)日：1991-10-08
申请号：US656334
申请日：1991-02-19
申请人： Mathew A. Rybicki , Roger A. Whatley , Katsufumi Nakamura
发明人： Mathew A. Rybicki , Roger A. Whatley , Katsufumi Nakamura
IPC分类号： H03M1/06 , H03M1/46 , H03M1/74
CPC分类号： H03M1/0682 , H03M1/46 , H03M1/742
摘要： An analog-to-digital converter utilizes both a successive approximation register and a current steering circuit within a digital-to-analog converter to achieve an improved conversion speed, and improved resolution for a predetermined amount of power. The current steering circuit, which is controlled by the successive approximation register, connects constant current sources to current source loads to produce a differential signal output. By steering current from the differential current source loads to the constant current sources, a signal difference resolves at the output of the digital-to-analog converter faster and with greater resolution.
摘要翻译：模拟 - 数字转换器利用数模转换器内的逐次逼近寄存器和电流转向电路来实现改进的转换速度，以及提高预定功率的分辨率。由逐次逼近寄存器控制的当前转向电路将恒定电流源连接到电流源负载以产生差分信号输出。通过将电流从差分电流源负载转向恒定电流源，信号差异在数模转换器的输出端更快，分辨率更高。

2. 发明授权

US5045773A Current source circuit with constant output 失效
标题翻译：电流源电路具有恒定输出
公开(公告)号：US5045773A
公开(公告)日：1991-09-03
申请号：US590859
申请日：1990-10-01
申请人： Alan L. Westwick , Roger A. Whatley
发明人： Alan L. Westwick , Roger A. Whatley
IPC分类号： G05F3/26 , G05F3/28
CPC分类号： G05F3/267
摘要： A current source circuit providing a constant output for wide variations in supply voltages is achieved by creating a constant reference current by reflecting the difference in the base to emitter voltage of two bipolar transistors across a resistor. A first current mirror creates an equal current which flows through two diode connected transistors that produce an output voltage proportional to the current flowing through them. This current also flows through a second current mirror which creates an equal current to flow to a feedback connection. The feedback connection adjusts the base voltage of the two bipolar transistors until a current equal to the reference current flows in a third current mirror. The current flowing in this third current mirror is also applied to the feedback connection to insure that all currents remain equal thereby insuring the output remains constant.
摘要翻译：通过反映电阻器两个双极晶体管的基极与发射极之间的差异来产生恒定的参考电流，可实现提供电源电压宽泛变化的恒定输出的电流源电路。第一电流镜产生相等的电流，其流过两个二极管连接的晶体管，其产生与流过它们的电流成比例的输出电压。该电流还流过第二电流镜，其产生相等的电流以流向反馈连接。反馈连接调节两个双极晶体管的基极电压，直到等于参考电流的电流在第三电流镜中流动。在该第三电流镜中流动的电流也被施加到反馈连接，以确保所有电流保持相等，从而确保输出保持恒定。

3. 发明授权

US4636738A Parasitic compensated switched capacitor integrator 失效
标题翻译：寄生补偿开关电容积分器
公开(公告)号：US4636738A
公开(公告)日：1987-01-13
申请号：US825373
申请日：1986-02-03
申请人： Alan L. Westwick , Roger A. Whatley
发明人： Alan L. Westwick , Roger A. Whatley
IPC分类号： G06G7/186 , H03F1/08
CPC分类号： G06G7/1865
摘要： A switched capacitor integrator for receiving a single input signal is compensated for parasitic capacitance errors with a minimum amount of circuitry. Although a single-ended amplifier is provided, a differential amplifier input is used which receives equal amounts of parasitic charge to effectively cancel charge errors. The size of the compensating capacitive circuitry may be reduced by making the input parasitic capacitance at one of the inputs proportionately larger so that the noise gain in both positive and negative signal paths remains substantially the same.
摘要翻译：用于接收单个输入信号的开关电容积分器用最小量的电路补偿寄生电容误差。虽然提供了单端放大器，但是使用差分放大器输入端接收等量的寄生电荷以有效地消除电荷误差。补偿电容电路的尺寸可以通过使输入中的一个输入寄生电容成比例地变大，使得正和负信号路径中的噪声增益保持基本相同。

4. 发明授权

US4355285A Auto-zeroing operational amplifier circuit 失效
标题翻译：自动归零运算放大器电路
公开(公告)号：US4355285A
公开(公告)日：1982-10-19
申请号：US231079
申请日：1981-02-03
申请人： Stephen H. Kelley , Richard W. Ulmer , Roger A. Whatley
发明人： Stephen H. Kelley , Richard W. Ulmer , Roger A. Whatley
IPC分类号： H03F3/34 , H03F1/30 , H03F1/02
CPC分类号： H03F1/303
摘要： A temperature stable bandgap voltage reference source utilizing bipolar transistors biased at different emitter current densities is provided. Switched capacitors are used to input the V.sub.be and the .DELTA.V.sub.be of the transistors (PTC and NTC voltages, respectively,) into an operational amplifier to provide a reference voltage proportional to the sum of the PTC and NTC voltages. Proper selection of the ratio of the switched capacitors renders the reference voltage substantially independent of temperature. In a modified form of the reference, the reference amplifier is implemented by an auto-zeroed operational amplifier which uses switched capacitor techniques and an integrated capacitor to achieve the auto-zeroing function.
摘要翻译：提供了利用以不同发射极电流密度偏置的双极晶体管的温度稳定带隙电压基准源。开关电容用于将晶体管的Vbe和DELTA Vbe（分别为PTC和NTC电压）分别输入到运算放大器中，以提供与PTC和NTC电压之和成比例的参考电压。正确选择开关电容器的比率使得参考电压基本上与温度无关。在参考的修改形式中，参考放大器由使用开关电容器技术的自动归零运算放大器和集成电容器来实现自动归零功能。

5. 发明授权

US4857863A Low power output driver circuit with slew rate limiting 失效
标题翻译：具有压摆率限制的低功率输出驱动电路
公开(公告)号：US4857863A
公开(公告)日：1989-08-15
申请号：US236386
申请日：1988-08-25
申请人： Jeffrey D. Ganger , Roger A. Whatley
发明人： Jeffrey D. Ganger , Roger A. Whatley
IPC分类号： H03F3/30 , H03K17/16 , H03K19/003
CPC分类号： H03F3/3001 , H03K17/166 , H03K19/00361
摘要： A slew rate limited output driver circuit has an output terminal which varies between two power supply voltage levels in response to an input data signal. The output signal is slew rate limited by a capacitor. In order to prevent a full range of the output voltage from being placed across the capacitor, the voltage across the capacitor is limited to only one-half the full range by forcing one electrode of the capacitor to remain at a voltage potential equal to a reference voltage which, in one form, is substantially halfway between the two power supply voltages.
摘要翻译：转换速率限制输出驱动器电路具有响应于输入数据信号在两个电源电压电平之间变化的输出端子。输出信号由电容器限制。为了防止输出电压的全范围放置在电容器两端，电容器两端的电压仅通过使电容器的一个电极保持在等于参考电压的电压而被限制在全范围的一半一种形式的电压基本上在两个电源电压之间的一半。

6. 发明授权

US4713625A Circuit for improving power supply rejection in an operational amplifier with frequency compensation 失效
标题翻译：用于改善具有频率补偿的运算放大器中的电源抑制的电路
公开(公告)号：US4713625A
公开(公告)日：1987-12-15
申请号：US941878
申请日：1986-12-15
申请人： Roger A. Whatley
发明人： Roger A. Whatley
IPC分类号： H03F1/08 , H03F1/26
CPC分类号： H03F1/086
摘要： A high gate output stage for use with an amplifier which has high power supply rejection and which is stable at all frequencies is provided. An output current source and current sink are connected in series with a Miller capacitor coupled between an input terminal and output terminal of the output stage. Error signals coupled from a power supply source are allowed to sum at the output terminal with a compensating signal. Compensation circuitry is coupled to the input terminal for charge coupling a substantially equal but opposite amount of compensation charge related to the error signal from the power supply, thereby substantially cancelling power supply error signal coupling. Therefore, excellent power supply rejection and frequency stability are provided in a high gain output stage.
摘要翻译：提供了具有高电源抑制并且在所有频率下都是稳定的放大器使用的高栅极输出级。输出电流源和电流吸收器与耦合在输出级的输入端子和输出端子之间的米勒电容器串联连接。允许从电源发送的误差信号在输出端与补偿信号相加。补偿电路耦合到输入端子，用于将与来自电源的误差信号相关的基本上相等但相反量的补偿电荷耦合，从而基本上消除了电源误差信号耦合。因此，在高增益输出级中提供优异的电源抑制和频率稳定性。

7. 发明授权

US4477737A Voltage generator circuit having compensation for process and temperature variation 失效
标题翻译：电压发生器电路具有工艺和温度变化的补偿
公开(公告)号：US4477737A
公开(公告)日：1984-10-16
申请号：US398033
申请日：1982-07-14
申请人： Richard W. Ulmer , Roger A. Whatley
发明人： Richard W. Ulmer , Roger A. Whatley
IPC分类号： G05F3/24 , G05F1/58 , H03L1/04
CPC分类号： G05F3/245
摘要： An on-chip voltage generator circuit is disclosed having an output voltage which is reduced by a predetermined amount from a supply voltage. The output voltage is proportional to the gate-to-source voltages of two complementary transistors and varies with temperature and processing in a similar manner with digital circuitry on the chip for which the output voltage may be used to operate. A current source is used to provide a known current to the two complementary transistors and a buffer is used to provide a low impedance output.
摘要翻译：公开了具有从电源电压减小预定量的输出电压的片上电压发生器电路。输出电压与两个互补晶体管的栅极 - 源极电压成比例，并以与输出电压可用于操作的芯片上的数字电路类似的方式随温度和处理而变化。电流源用于向两个互补晶体管提供已知电流，并且使用缓冲器来提供低阻抗输出。

8. 发明授权

US6066971A Integrated circuit having buffering circuitry with slew rate control 失效
公开(公告)号：US6066971A
公开(公告)日：2000-05-23
申请号：US942740
申请日：1997-10-02
申请人： Bernard J. Pappert , Roger A. Whatley
发明人： Bernard J. Pappert , Roger A. Whatley
IPC分类号： G05F3/24 , H03K19/003 , H03K5/12
CPC分类号： H03K19/00361 , G05F3/242 , H03K19/00315
摘要： Buffering circuitry (10) uses pull-up slew rate control circuitry (12) and pull-down slew rate control circuitry (14) to control the rising and falling slew rates of an output signal (50) provided by buffering circuitry (10). Pull-up slew rate control circuitry (12) and pull-down slew rate control circuitry (14) may be used in an embodiment of buffering circuitry (10) which provides a higher output voltage VHIGH than the standard power voltage VPOWER which is used to power most of the circuitry. Buffering circuitry (10) utilizes distributed resistive elements (89-91) to provide improved electrostatic discharge protection. Buffering circuitry (10) utilizes a low power level shifter (16). Voltage reference generation circuitry (18) may be used to provide a stable low power reference voltage VREF (42).

9. 发明授权

US5083051A Output driver circuit with improved output stage biasing 失效
标题翻译：输出驱动电路具有改进的输出级偏置
公开(公告)号：US5083051A
公开(公告)日：1992-01-21
申请号：US484955
申请日：1990-02-26
申请人： Roger A. Whatley , Mathew A. Rybicki
发明人： Roger A. Whatley , Mathew A. Rybicki
IPC分类号： H03F1/32 , H03F3/30 , H03F3/45
CPC分类号： H03F3/3001 , H03F1/3217 , H03F3/45076
摘要： An output driver circuit with improved output stage clamping comprises an input stage, an output stage, and a clamping circuit. The input stage amplifies a difference between an input signal and a reference signal to provide first and second output signals for driving gates of first and second transistors which together form the output stage. The first and second transistors are serially coupled between first and second power supply voltage terminals and provide an output signal. The clamping circuit clamps the first signal at a predetermined gate-to-source voltage below the first power supply voltage, and clamps the second signal at a predetermined gate-to-source voltage above the second power supply voltage terminal. The clamp voltages are maintained by matching current densities and bias conditions between the first and second transistors, and corresponding transistors in the clamping circuit.
摘要翻译：具有改进的输出级钳位的输出驱动器电路包括输入级，输出级和钳位电路。输入级放大输入信号和参考信号之间的差，以提供用于驱动第一和第二晶体管的栅极的第一和第二输出信号，第一和第二晶体管一起形成输出级。第一和第二晶体管串联耦合在第一和第二电源电压端子之间并提供输出信号。钳位电路以低于第一电源电压的预定栅极 - 源极电压钳位第一信号，并且以第二电源电压端子上方的预定栅极 - 源极电压钳位第二信号。通过匹配第一和第二晶体管之间的电流密度和偏置条件以及钳位电路中的相应晶体管来维持钳位电压。

10. 发明授权

US4508983A MOS Analog switch driven by complementary, minimally skewed clock signals 失效
标题翻译： MOS模拟开关由互补的，最小偏移的时钟信号驱动
公开(公告)号：US4508983A
公开(公告)日：1985-04-02
申请号：US465408
申请日：1983-02-10
申请人： Robert N. Allgood , Joe W. Peterson , Roger A. Whatley
发明人： Robert N. Allgood , Joe W. Peterson , Roger A. Whatley
IPC分类号： H03K17/06 , H03K17/16 , H03K17/687 , H03K19/096
CPC分类号： H03K17/06 , H03K17/162
摘要： An MOS analog switch utilizing two transmission gates which are compensated by a third transmission gate is provided. The transmission gates may be either single or complementary conductivity type transmission gates and are controlled by complementary clock signals. A method and apparatus for minimizing clock skew thereby reducing error voltages caused by parasitic capacitance are provided.
摘要翻译：提供利用由第三传输门补偿的两个传输门的MOS模拟开关。传输门可以是单导线型或互补导电型传输门，并由互补时钟信号控制。提供了一种用于最小化时钟偏移从而减少由寄生电容引起的误差电压的方法和装置。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式