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    • 3. 发明授权
    • Electronic apparatus with ultrasonic motor as driving source
    • 电子设备用超声波电机作为驱动源
    • US06310834B1
    • 2001-10-30
    • US09532487
    • 2000-03-22
    • Naokatsu Nosaka
    • Naokatsu Nosaka
    • G04B900
    • G04C3/12G04C10/04
    • Residual battery capacity is calculated in an electronic apparatus having an ultrasonic motor driven by a battery based on the revolution speed of the ultrasonic motor. This permits residual capacity to be calculated extremely close to actual battery life with a simplified circuit structure. An electronic watch having an ultrasonic motor as a driving source of a calendar display mechanism is provided with a residual battery capacity display device having a revolution speed detector for detecting a revolution speed of the ultrasonic motor, a memory for storing comparison representing a relationship between detected revolution speed and battery life, and a CPU for determining residual battery life based on the detected revolution speed and the comparison data. An alarm is generated when the battery life is over.
    • 基于超声波马达的转速,由具有由电池驱动的超声波马达的电子设备计算剩余电池容量。 这允许通过简化的电路结构计算非常接近实际电池寿命的剩余容量。 具有超声波马达作为日历显示机构的驱动源的电子手表设置有具有用于检测超声波马达的转速的转速检测器的剩余电池容量显示装置,用于存储表示检测到的关系的比较的存储器 转速和电池寿命,以及用于基于检测到的转速和比较数据确定剩余电池寿命的CPU。 电池寿命结束时会产生报警。
    • 4. 发明授权
    • Electronic watch with autocalendar
    • 电子手表与autocalendar
    • US6128252A
    • 2000-10-03
    • US248257
    • 1999-02-11
    • Naokatsu Nosaka
    • Naokatsu Nosaka
    • G04C3/00G04C9/00G04C17/00G04G99/00G04B19/24
    • G04C17/0066
    • When an analog indicator is enabled, the position of the time indicator is detected by an indicator position detection circuit. When the indicator arrives at a predetermined position, typically 24:00, a CPU advances calendar data to a correct date and stores the calculation result in a calendar counter. The CPU outputs a drive instruction signal to a date-indicating wheel drive pulse generating circuit to drive a date-indicating wheel to the correct date. The date-indicating wheel drive pulse generating circuit then drives the date-indicating wheel to a renewed position. At this time, a time counter is cleared to 0:00 and is synchronized with the position of the analog indicator. When driving of the analog indicator is disabled, such as by the pulling out of a crown switch, and the time counted by the time counter arrives at a predetermined time, typically 24:00, the CPU advances the present calendar data to the correct date and stores the calculation result in the calendar counter. The CPU outputs a drive instruction signal to the date-indicating wheel drive pulse generating circuit to drive the date-indicating wheel to indicate the correct date. The date-indicating wheel drive pulse generating circuit then drives the date-indicating wheel to the correct date. At this time, the time counter is cleared to 0:00.
    • 当模拟指示器使能时,指示位置检测电路检测时间指示器的位置。 当指示符到达预定位置(通常为24:00)时,CPU将日历数据提前到正确的日期,并将计算结果存储在日历计数器中。 CPU将驱动指令信号输出到日期指示轮驱动脉冲发生电路,以驱动日期指示轮到正确的日期。 日期指示轮驱动脉冲发生电路然后将日期指示轮驱动到更新位置。 此时,时间计数器清零,并与模拟指示灯的位置同步。 当模拟指示器的驱动被禁用时,例如通过拉出表冠开关,并且由计时器计数的时间到达预定时间(通常为24:00),CPU将当前日历数据提前到正确的日期 并将计算结果存储在日历计数器中。 CPU将驱动指令信号输出到日期指示轮驱动脉冲发生电路,以驱动日期指示轮以指示正确的日期。 日期指示轮驱动脉冲发生电路然后将日期指示轮驱动到正确的日期。 此时,时间计数器被清除为0:00。
    • 5. 发明授权
    • Fast fourier transformation computing unit and a fast fourier
transformation computation device
    • 快速傅里叶变换计算单元和快速傅里叶变换计算装置
    • US5854758A
    • 1998-12-29
    • US692991
    • 1996-08-06
    • Tsukasa KosudaMotomu HayakawaNaokatsu Nosaka
    • Tsukasa KosudaMotomu HayakawaNaokatsu Nosaka
    • G06F17/14
    • G06F17/142
    • To provide FFT computing units, FFT computation devices, and pulse counters that can achieve computational precision using the smallest possible circuit size. FFT computing unit 602 comprises a data shift circuit for standardizing FFT computation target data to a specified bit width, adders/subtracters, multipliers, and data converters for standardizing the bit width to a certain bit width by truncating part of the output data of each computing unit, etc. FFT computation device comprises FFT computing unit 602, sensor 620, amplification circuit 621, gain control circuit 623, AD converter 622, first RAM 625 for sequentially storing the A/D conversion data, second RAM 626 for storing the FFT computation target data and the data being computed, coefficient ROM 101, and level determination circuit 624; and the level determination circuit determines the size of the data being transferred when the data is being transferred from RAM 1 to RAM 2, and the result is used for the data shift adjustment and gain control during FFT computation.
    • 提供FFT计算单元,FFT计算设备和可以使用尽可能小的电路大小实现计算精度的脉冲计数器。 FFT计算单元602包括用于将FFT计算目标数据标准化为指定位宽的数据移位电路,加法器/减法器,乘法器和数据转换器,用于通过截断每个计算的输出数据的一部分来将位宽度标准化为特定位宽度 单元等FFT计算装置包括FFT计算单元602,传感器620,放大电路621,增益控制电路623,AD转换器622,用于顺序存储A / D转换数据的第一RAM 625,用于存储FFT计算的第二RAM 626 目标数据和正在计算的数据,系数ROM 101和电平确定电路624; 并且电平确定电路确定当数据从RAM1传送到RAM2时传送的数据的大小,并且该结果用于FFT计算期间的数据移位调整和增益控制。