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    • 1. 发明授权
    • Wafer inspection system and wafer inspection process using charged particle beam
    • 晶圆检查系统和使用带电粒子束的晶圆检查过程
    • US06700122B2
    • 2004-03-02
    • US10035150
    • 2002-01-04
    • Miyako MatsuiMari NozoeAtsuko Takafuji
    • Miyako MatsuiMari NozoeAtsuko Takafuji
    • G01R3126
    • H01J37/28H01J2237/281H01J2237/2817
    • The present invention provides a wafer inspection technique capable of detecting a defect in a wafer on which a pattern having a large step such as a contact hole being subjected to a semiconductor manufacturing process is formed and obtaining information such as the position and kind of a defect such as a hole with open contact failure caused in dry etching process at high speed. A wafer on which a pattern having a large step being subjected to a semiconductor manufacturing process is formed is scanned and irradiated with an electron beam having irradiation energy which is in a range from 100 eV to 1,000 eV, and a defect is detected at high speed from an image of secondary electrons generated. Before the secondary electron image is captured, the wafer is irradiated with an electron beam at high speed while being moved to thereby charge the surface of the wafer with a desired charging voltage. The kind of the defect is determined from the captured secondary electron image, and a distribution of defects in the plane of the wafer is displayed.
    • 本发明提供一种晶片检查技术,其能够检测在其上形成具有大台阶的图案的晶片中的缺陷,所述图案具有形成半导体制造工艺的接触孔,诸如缺陷的位置和种类等信息 例如在高速干燥蚀刻工艺中引起的具有开放接触故障的孔。 对其上形成具有大步骤的图案进行半导体制造处理的晶片被扫描并照射具有在100eV至1,000eV范围内的照射能量的电子束,并且以高速检测缺陷 从二次电子的图像生成。 在捕获二次电子图像之前,在移动的同时以高速度用电子束照射晶片,从而以期望的充电电压对晶片的表面充电。 从捕获的二次电子图像确定缺陷的种类,并且显示晶片的平面中的缺陷的分布。
    • 2. 发明授权
    • Inspection system and inspection process for wafer with circuit using charged-particle beam
    • 使用带电粒子束的电路晶圆的检查系统和检查过程
    • US06753524B2
    • 2004-06-22
    • US10166774
    • 2002-06-12
    • Miyako MatsuiMari Nozoe
    • Miyako MatsuiMari Nozoe
    • G01B1100
    • H01J37/28H01J2237/0047H01J2237/2817
    • In a method for inspecting positions and types of defects on wafers with circuit patterns in a semiconductor manufacturing process, inspection is made regardless of the types and materials of junctions of circuit patterns of the semiconductor devices, different kinds of defects being distinguished from one another. Further, electrification of the circuit pattern is prevented, and the area to be exposed to an electron beam is controlled evenly and at a desired voltage. During inspection of the positions and types of defects on a wafer using a charged-particle beam from a charged-particle source, an optical beam from an optical source as well as a charged-particle beam are applied to a junction of the circuit pattern of the wafer placed on a wafer holder. Thus, regardless of the types and materials of circuit patterns, a highly sensitive inspection is made according to contrasts in the defects of a captured image.
    • 在半导体制造过程中用电路图案检查晶片上的缺陷的位置和类型的方法中,无论半导体器件的电路图案的结的类型和材料如何,都进行检查,不同种类的缺陷彼此区分。 此外,防止电路图案的通电,并且暴露于电子束的区域被均匀地控制并且处于期望的电压。 在使用来自带电粒子源的带电粒子束来检查晶片上的缺陷的位置和类型时,来自光源的光束以及带电粒子束被施加到电荷模式 将晶片放置在晶片保持器上。 因此,无论电路图案的类型和材料如何,根据捕获图像的缺陷的对比度进行高度敏感的检查。
    • 3. 发明授权
    • Method and apparatus for inspecting semiconductor device
    • 用于检查半导体器件的方法和装置
    • US07368713B2
    • 2008-05-06
    • US11189898
    • 2005-07-27
    • Miyako Matsui
    • Miyako Matsui
    • G21K7/00G01N23/203G01N23/225H01J37/28
    • H01J37/28G01N2223/07G01N2223/414G01N2223/6116H01J2237/24578H01J2237/2611
    • A method and apparatus for inspecting a wafer during a semiconductor device fabrication process. The apparatus performs, only via observation from the wafer's top surface, inspection and quantitative evaluation of a portion that is in the shadow of an incident electron beam and a buried structure in the wafer. To this end, the electron beam is emitted so that it partially penetrates a wafer surface and reaches an unexposed pattern portion to the beam. When a stereoscopic structure is constructed from the scan image based on a secondarily generated signal, generate a stereoscopic model of a pattern being tested. The secondary signal is used to detect position information of a pattern edge(s) and signal intensity. Then, use the information to calculate more than one feature quantity of the test pattern. From the calculated feature quantities, the stereoscopic structure is constructed for displaying a 3D structure of the pattern.
    • 一种用于在半导体器件制造工艺期间检查晶片的方法和装置。 该装置仅通过从晶片顶表面的观察来执行在晶片中的入射电子束和掩埋结构的阴影中的部分的检查和定量评估。 为此,发射电子束,使其部分地穿透晶片表面并到达未曝光的图案部分。 当基于二次生成的信号从扫描图像构建立体结构时,生成被测试图案的立体模型。 辅助信号用于检测图案边缘和信号强度的位置信息。 然后,使用该信息来计算测试图案的多个特征量。 根据计算出的特征量,构造用于显示图案的3D结构的立体结构。
    • 5. 发明申请
    • Method and apparatus for inspecting semiconductor device
    • 用于检查半导体器件的方法和装置
    • US20060043292A1
    • 2006-03-02
    • US11189898
    • 2005-07-27
    • Miyako Matsui
    • Miyako Matsui
    • G21K7/00
    • H01J37/28G01N2223/07G01N2223/414G01N2223/6116H01J2237/24578H01J2237/2611
    • A method and apparatus for inspecting a wafer during a semiconductor device fabrication process. The apparatus performs, only via observation from the wafer's top surface, inspection and quantitative evaluation of a portion that is in the shadow of an incident electron beam and a buried structure in the wafer. To this end, the electron beam is emitted so that it partially penetrates a wafer surface and reaches an unexposed pattern portion to the beam. When a stereoscopic structure is constructed from the scan image based on a secondarily generated signal, generate a stereoscopic model of a pattern being tested. The secondary signal is used to detect position information of a pattern edge(s) and signal intensity. Then, use the information to calculate more than one feature quantity of the test pattern. From the calculated feature quantities, the stereoscopic structure is constructed for displaying a 3D structure of the pattern.
    • 一种用于在半导体器件制造工艺期间检查晶片的方法和装置。 该装置仅通过从晶片顶表面的观察来执行在晶片中的入射电子束和掩埋结构的阴影部分的检查和定量评估。 为此,发射电子束,使其部分地穿透晶片表面并到达未曝光的图案部分。 当基于二次生成的信号从扫描图像构建立体结构时,生成被测试图案的立体模型。 辅助信号用于检测图案边缘和信号强度的位置信息。 然后,使用该信息来计算测试图案的多个特征量。 根据计算出的特征量,构造用于显示图案的3D结构的立体结构。