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1. 发明授权

US08137471B2 Plasma processing apparatus and method 有权
标题翻译：等离子体处理装置及方法
公开(公告)号：US08137471B2
公开(公告)日：2012-03-20
申请号：US12696323
申请日：2010-01-29
申请人： Akira Koshiishi , Masaru Sugimoto , Kunihiko Hinata , Noriyuki Kobayashi , Chishio Koshimizu , Ryuji Ohtani , Kazuo Kibi , Masashi Saito , Naoki Matsumoto , Manabu Iwata , Daisuke Yano , Yohei Yamazawa
发明人： Akira Koshiishi , Masaru Sugimoto , Kunihiko Hinata , Noriyuki Kobayashi , Chishio Koshimizu , Ryuji Ohtani , Kazuo Kibi , Masashi Saito , Naoki Matsumoto , Manabu Iwata , Daisuke Yano , Yohei Yamazawa
IPC分类号： C23C16/00
CPC分类号： H01J37/32091 , H01J37/32082 , H01J37/32174 , H01J37/32348 , H01J37/3244 , H01J37/32541 , H01J37/32568 , H01J37/32642 , H01J37/32706 , H01J37/32834 , H01J2237/3344 , H01L21/02126 , H01L21/02164 , H01L21/0217 , H01L21/31116 , H01L21/31138 , H01L21/31144 , H01L21/67069
摘要： An apparatus includes an upper electrode and a lower electrode for supporting a wafer disposed opposite each other within a process chamber. A first RF power supply configured to apply a first RF power having a relatively higher frequency is connected to the upper electrode. A second RF power supply configured to apply a second RF power having a relatively lower frequency is connected to the lower electrode. A variable DC power supply is connected to the upper electrode. A process gas is supplied into the process chamber while any one of application voltage, application current, and application power from the variable DC power supply to the upper electrode is controlled, to generate plasma of the process gas so as to perform plasma etching.
摘要翻译：一种装置包括用于支撑在处理室内相对设置的晶片的上电极和下电极。被配置为施加具有相对较高频率的第一RF功率的第一RF电源连接到上电极。配置为施加具有相对较低频率的第二RF功率的第二RF电源连接到下电极。可变直流电源连接到上电极。将处理气体供给到处理室中，同时控制来自可变直流电源到上部电极的施加电压，施加电流和施加电力中的任何一个，以产生处理气体的等离子体，以进行等离子体蚀刻。

2. 发明授权

US07717589B2 Light emitting device using light emitting diode chip 有权
标题翻译：发光装置采用发光二极管芯片
公开(公告)号：US07717589B2
公开(公告)日：2010-05-18
申请号：US10596019
申请日：2004-11-25
申请人： Kouji Nishioka , Masaru Sugimoto , Hideyoshi Kimura , Ryoji Yokotani , Yutaka Iwahori , Takuma Hashmoto , Shinya Ishizaki , Satoshi Mori , Hiroyuki Sekii , Eiji Shiohama
发明人： Kouji Nishioka , Masaru Sugimoto , Hideyoshi Kimura , Ryoji Yokotani , Yutaka Iwahori , Takuma Hashmoto , Shinya Ishizaki , Satoshi Mori , Hiroyuki Sekii , Eiji Shiohama
IPC分类号： F21V9/00 , F21V9/16 , H01J1/62
CPC分类号： H01L33/507 , H01L33/508 , H01L33/58 , H01L33/60 , H01L2224/32245 , H01L2224/48091 , H01L2224/48247 , H01L2224/73265 , H01L2924/16195 , H01L2924/3025 , Y10S362/80 , H01L2924/00 , H01L2924/00014
摘要： A light emitting device comprises: an LED chip mounted in a recess formed in a mounting substrate; a wavelength converting member that is disposed so as to cover the recess and the edge area around the recess and that is excited by light emitted from the LED chip to emit light of a wavelength different from an excitation wavelength; and an emission control member disposed at a light output side of the wavelength converting member so as to allow emission of light coming from an area of the wavelength converting member that corresponds to the recess and to prevent emission of light coming from an area of the wavelength converting member that corresponds to the edge area around the recess. This can prevent variations in color between light emitted from the central part of the wavelength converting member and light emitted from the part of the wavelength converting member that is located on the edge area around the recess of the mounting substrate, thereby reducing unevenness of color on the irradiation surface.
摘要翻译：发光装置包括：安装在形成于安装基板上的凹部中的LED芯片; 波长转换部件被设置为覆盖凹部和围绕凹部的边缘区域并被从LED芯片发射的光激发以发射与激发波长不同的波长的光; 以及发射控制部件，其设置在所述波长转换部件的光输出侧，以便发射来自与所述凹部对应的所述波长转换部件的区域的光，并且防止来自所述波长的区域的光的发射转换构件对应于凹部周围的边缘区域。这可以防止从波长转换构件的中心部分发出的光和位于安装基板的凹部周围的边缘区域上的波长转换构件的部分发射的光的颜色变化，从而减少颜色的不均匀性照射面。

3. 发明申请

US20050179576A1 Test circuit for evaluating characteristic of analog signal of device 失效
标题翻译：用于评估设备模拟信号特性的测试电路
公开(公告)号：US20050179576A1
公开(公告)日：2005-08-18
申请号：US11048723
申请日：2005-02-03
申请人： Toshiaki Tarui , Masaru Sugimoto , Hisaya Mori , Teruhiko Funakura
发明人： Toshiaki Tarui , Masaru Sugimoto , Hisaya Mori , Teruhiko Funakura
IPC分类号： G01R31/28 , G01R19/257 , G01R29/027 , G01R31/319 , H03M1/06
CPC分类号： G01R31/31924 , G01R19/257 , G01R29/0276
摘要： In a test circuit, a determination circuit conducts a function test to determine whether timing of a slope section of waveform of an analog signal ANS of a measurement target device is within a range of specifications. An ADC performs AD-conversion only when a potential of analog signal ANS is within a range between reference potentials VOL, VOH. An analysis unit analyzes digital data from the ADC, and conducts a sloping waveform test to evaluate a sloping state of the waveform of analog signal ANS. Therefore, the slope section of the waveform of analog signal ANS of the device can be subjected to AD-conversion in a voltage range divided in arbitrary number of sections within a range of arbitrary voltage amplitude without requiring a large-capacity storage circuit. The function test by a determination circuit and the sloping waveform test by the analysis unit can be performed in parallel.
摘要翻译：在测试电路中，确定电路进行功能测试，以确定测量目标器件的模拟信号ANS的波形的斜率部分的定时是否在规格范围内。只有当模拟信号ANS的电位在参考电位VOL，VOH之间的范围内时，ADC才执行AD转换。分析单元从ADC分析数字数据，并进行倾斜波形测试，以评估模拟信号ANS波形的倾斜状态。因此，可以在不需要大容量存储电路的情况下，在任意电压幅度的范围内，以任意数量的区间划分的装置的模拟信号ANS的波形的斜率部分进行AD转换。可以并行地执行由判定电路进行的功能测试和分析单元的倾斜波形测试。

4. 发明授权

US06546525B2 LSI testing apparatus 失效
公开(公告)号：US06546525B2
公开(公告)日：2003-04-08
申请号：US09761179
申请日：2001-01-18
申请人： Masaru Sugimoto , Yasuhide Nakase , Teruhiko Funakura
发明人： Masaru Sugimoto , Yasuhide Nakase , Teruhiko Funakura
IPC分类号： G06F1750
CPC分类号： G01R31/31908 , G01R31/31922
摘要： An LSI testing apparatus of the invention comprises: a plurality of pins P1, P2, . . . PN; function units 10, 11 and 12 which supply the pins with LSI testing signals, which have functions for making judgments on tests, and which are furnished for each of the pins; and clock mask function units 15A and 15B furnished on the input side of each function unit. Upon testing, any unused pin and function are detected so as to mask the clock mask function unit corresponding to the detected pin and function, whereby power dissipation is reduced in terms of unused pins and functions.

5. 发明授权

US4965245A Method of producing oxide superconducting cables and coils using copper alloy filament precursors 失效
标题翻译：使用铜合金长丝前体生产氧化物超导电缆和线圈的方法
公开(公告)号：US4965245A
公开(公告)日：1990-10-23
申请号：US219433
申请日：1988-07-15
申请人： Masaru Sugimoto , Osamu Kohno , Yoshimitsu Ikeno , Nobuyuki Sadakata , Mikio Nakagawa , Shin'ya Aoki , Masayuki Tan , Ryuichi Okiai , Syotaro Yoshida , Masakazu Hasegawa , Hiroshi Yamanouchi
发明人： Masaru Sugimoto , Osamu Kohno , Yoshimitsu Ikeno , Nobuyuki Sadakata , Mikio Nakagawa , Shin'ya Aoki , Masayuki Tan , Ryuichi Okiai , Syotaro Yoshida , Masakazu Hasegawa , Hiroshi Yamanouchi
IPC分类号： C04B35/45 , H01L39/24
CPC分类号： C04B35/4504 , H01L39/248 , Y10S505/704 , Y10S505/74 , Y10T29/49014
摘要： A method of producing a superconducting cable or a coil including an A-B-C-D system superconductor where the A includes an element of group IIIa of the Periodic Table, the B an element of group IIa of the Periodic Table, C copper, D oxygen. A plurality of filaments are selected from a copper alloy filament including: a copper alloy filament including the A element; copper alloy filament including the B element; a copper alloy filament including both the elements the A and the B; a first metallic filament having particles of a copper oxide, copper halide or copper sulfide dispersed therein; a second metallic filament coated with an oxide layer; a copper filament containing the A element and having particles of a copper oxide, copper halide or copper sulfide dispersed therein; a copper filament containing the B element and having particles of a copper oxide, copper halide or copper sulfide dispersed therein; a third metallic filament containing the A element and coated with an oxide layer; a fourth metallic filament containing the B element and coated with an oxide layer; the first to fourth metallic filaments being substantially free of any component which provides an adverse effect on the production of the superconductor. The selected filaments are arranged to form element filaments bundle so that the superconductor is produced in a subsequent heat treatment. The bundle is drawn and then heated under an oxidizing atmosphere for producing the superconductor.

6. 发明授权

US08852385B2 Plasma etching apparatus and method 有权
标题翻译：等离子体蚀刻装置及方法
公开(公告)号：US08852385B2
公开(公告)日：2014-10-07
申请号：US11867371
申请日：2007-10-04
申请人： Akira Koshiishi , Noriyuki Kobayashi , Shigeru Yoneda , Kenichi Hanawa , Shigeru Tahara , Masaru Sugimoto
发明人： Akira Koshiishi , Noriyuki Kobayashi , Shigeru Yoneda , Kenichi Hanawa , Shigeru Tahara , Masaru Sugimoto
IPC分类号： C23F1/00 , H01L21/306 , H01L21/768 , H01L21/311 , H01J37/32 , H01L21/3065
CPC分类号： H01J37/32183 , H01J37/32027 , H01J37/32091 , H01J37/32137 , H01J37/32165 , H01J37/32174 , H01J2237/334 , H01J2237/3346 , H01L21/30655 , H01L21/31116 , H01L21/76802 , H01L21/76834
摘要： An upper electrode and a lower electrode are disposed opposite to each other in a process container configured to be vacuum-exhausted. The upper electrode is connected to a first RF power supply configured to apply a first RF power for plasma generation. The lower electrode is connected to a second RF power supply configured to apply a second RF power for ion attraction. The second RF power supply is provided with a controller preset to control the second RF power supply to operate in a power modulation mode that executes power modulation in predetermined cycles between a first power set to deposit polymers on a predetermined film on a wafer and a second power set to promote etching of the predetermined film on the wafer.
摘要翻译：上部电极和下部电极在被构造为真空排气的处理容器中彼此相对设置。上电极连接到被配置为施加用于等离子体产生的第一RF功率的第一RF电源。下电极连接到被配置为施加用于离子吸引的第二RF功率的第二RF电源。第二RF电源设置有预设的控制器，以控制第二RF电源以功率调制模式操作，该功率调制模式以预定周期执行在第一功率组之间的功率调制，以在晶片上的预定薄膜上沉积聚合物，功率设置以促进在晶片上蚀刻预定膜。

7. 发明授权

US08603293B2 Plasma processing apparatus and method 有权
标题翻译：等离子体处理装置及方法
公开(公告)号：US08603293B2
公开(公告)日：2013-12-10
申请号：US13186145
申请日：2011-07-19
申请人： Akira Koshiishi , Masaru Sugimoto , Kunihiko Hinata , Noriyuki Kobayashi , Chishio Koshimizu , Ryuji Ohtani , Kazuo Kibi , Masashi Saito , Naoki Matsumoto , Yoshinobu Ohya , Manabu Iwata , Daisuke Yano , Yohei Yamazawa , Hidetoshi Hanaoka , Toshihiro Hayami , Hiroki Yamazaki , Manabu Sato
发明人： Akira Koshiishi , Masaru Sugimoto , Kunihiko Hinata , Noriyuki Kobayashi , Chishio Koshimizu , Ryuji Ohtani , Kazuo Kibi , Masashi Saito , Naoki Matsumoto , Yoshinobu Ohya , Manabu Iwata , Daisuke Yano , Yohei Yamazawa , Hidetoshi Hanaoka , Toshihiro Hayami , Hiroki Yamazaki , Manabu Sato
IPC分类号： C23C16/00 , C23F1/00 , H01L21/306
CPC分类号： H01J37/32422 , H01J37/32018 , H01J37/32091 , H01J37/3244 , H01J37/32522 , H01J37/32834 , H01J2237/2001 , H01J2237/334 , H01J2237/3344 , H01L21/67069 , Y10S156/915
摘要： A plasma processing apparatus includes a processing container, an exhaust unit, an exhaust plate, an RF power application unit connected to a second electrode but not connected to the first electrode and configured to apply an RF power with a single frequency, the second electrode being connected to no power supply that applies an RF power other than the RF power with the single frequency, a DC power supply connected to the first electrode but not connected to the second electrode, the first electrode being connected to no power supply that applies an RF power, and a conductive member within the process container grounded to release through plasma a current caused by the DC voltage, the conductive member supported by the first shield part and laterally protruding therefrom only at a position that is located, in a height-wise direction, between a mount face and the exhaust plate and below a bottom of a focus ring.
摘要翻译：等离子体处理装置包括处理容器，排气单元，排气板，连接到第二电极但未连接到第一电极并被配置为施加具有单一频率的RF功率的RF功率施加单元，第二电极为连接到没有施加除了单个频率的RF功率之外的RF功率的电源，连接到第一电极但没有连接到第二电极的直流电源，第一电极连接到不施加RF的电源功率和处理容器内的导电构件接地，以通过等离子体释放由直流电压引起的电流，导电构件由第一屏蔽部分支撑并且仅在位于高度方向的位置处侧向突出在安装面和排气板之间以及聚焦环的底部之下。

8. 发明申请

US20110272097A1 PLASMA PROCESSING APPARATUS AND METHOD 有权
标题翻译：等离子体加工设备和方法
公开(公告)号：US20110272097A1
公开(公告)日：2011-11-10
申请号：US13186145
申请日：2011-07-19
申请人： Akira Koshiishi , Masaru Sugimoto , Kunihiko Hinata , Noriyuki Kobayashi , Chishio Koshimizu , Ryuji Ohtani , Kazuo Kibi , Masashi Saito , Naoki Matsumoto , Yoshinobu Ooya , Manabu Iwata , Daisuke Yano , Yohei Yamazawa , Hidetoshi Hanaoka , Toshihiro Hayami , Hiroki Yamazaki , Manabu Sato
发明人： Akira Koshiishi , Masaru Sugimoto , Kunihiko Hinata , Noriyuki Kobayashi , Chishio Koshimizu , Ryuji Ohtani , Kazuo Kibi , Masashi Saito , Naoki Matsumoto , Yoshinobu Ooya , Manabu Iwata , Daisuke Yano , Yohei Yamazawa , Hidetoshi Hanaoka , Toshihiro Hayami , Hiroki Yamazaki , Manabu Sato
IPC分类号： C23F1/08
CPC分类号： H01J37/32422 , H01J37/32018 , H01J37/32091 , H01J37/3244 , H01J37/32522 , H01J37/32834 , H01J2237/2001 , H01J2237/334 , H01J2237/3344 , H01L21/67069 , Y10S156/915
摘要： A plasma etching apparatus includes an upper electrode and a lower electrode, between which plasma of a process gas is generated to perform plasma etching on a wafer W. The apparatus further comprises a cooling ring disposed around the wafer, a correction ring disposed around the cooling ring, and a variable DC power supply directly connected to the correction ring, the DC voltage being preset to provide the correction ring with a negative bias, relative to ground potential, for attracting ions in the plasma and to increase temperature of the correction ring to compensate for a decrease in temperature of a space near the edge of the target substrate due to the cooling ring.
摘要翻译：等离子体蚀刻装置包括上电极和下电极，在其间产生处理气体的等离子体以在晶片W上进行等离子体蚀刻。该装置还包括设置在晶片周围的冷却环，设置在冷却周围的校正环环和直接连接到校正环的可变直流电源，所述直流电压被预设为向校正环提供相对于地电位的负偏压，用于吸引等离子体中的离子并将校正环的温度增加到补偿由于冷却环导致的目标基板的边缘附近的空间的温度的降低。

9. 发明申请

US20100126668A1 PLASMA PROCESSING APPARATUS AND METHOD 有权
标题翻译：等离子体处理装置和方法
公开(公告)号：US20100126668A1
公开(公告)日：2010-05-27
申请号：US12696323
申请日：2010-01-29
申请人： Akira KOSHIISHI , Masaru Sugimoto , Kunihiko Hinata , Noriyuki Kobayashi , Chishio Koshimizu , Ryuji Ohtani , Kazuo Kibi , Masashi Saito , Naoki Matsumoto , Manabu Iwata , Daisuke Yano , Yohei Yamazawa
发明人： Akira KOSHIISHI , Masaru Sugimoto , Kunihiko Hinata , Noriyuki Kobayashi , Chishio Koshimizu , Ryuji Ohtani , Kazuo Kibi , Masashi Saito , Naoki Matsumoto , Manabu Iwata , Daisuke Yano , Yohei Yamazawa
IPC分类号： C23F1/08
CPC分类号： H01J37/32091 , H01J37/32082 , H01J37/32174 , H01J37/32348 , H01J37/3244 , H01J37/32541 , H01J37/32568 , H01J37/32642 , H01J37/32706 , H01J37/32834 , H01J2237/3344 , H01L21/02126 , H01L21/02164 , H01L21/0217 , H01L21/31116 , H01L21/31138 , H01L21/31144 , H01L21/67069
摘要： An apparatus includes an upper electrode and a lower electrode for supporting a wafer disposed opposite each other within a process chamber. A first RF power supply configured to apply a first RF power having a relatively higher frequency is connected to the upper electrode. A second RF power supply configured to apply a second RF power having a relatively lower frequency is connected to the lower electrode. A variable DC power supply is connected to the upper electrode. A process gas is supplied into the process chamber while any one of application voltage, application current, and application power from the variable DC power supply to the upper electrode is controlled, to generate plasma of the process gas so as to perform plasma etching.
摘要翻译：一种装置包括用于支撑在处理室内相对设置的晶片的上电极和下电极。被配置为施加具有相对较高频率的第一RF功率的第一RF电源连接到上电极。配置为施加具有相对较低频率的第二RF功率的第二RF电源连接到下电极。可变直流电源连接到上电极。将处理气体供给到处理室中，同时控制来自可变直流电源到上部电极的施加电压，施加电流和施加电力中的任何一个，以产生处理气体的等离子体，以进行等离子体蚀刻。

10. 发明授权

US07326358B2 Plasma processing method and apparatus, and storage medium 有权
标题翻译：等离子体处理方法和装置以及存储介质
公开(公告)号：US07326358B2
公开(公告)日：2008-02-05
申请号：US11235341
申请日：2005-09-27
申请人： Masaru Sugimoto
发明人： Masaru Sugimoto
IPC分类号： C23F1/00
CPC分类号： H01L21/6831 , G03F7/427 , H01J2237/2001 , H01L21/02046 , H01L21/31116 , H01L21/31138 , H01L21/67069
摘要： A plasma processing method performs a plasma processing on a substrate mounted on a mounting table installed in an airtight processing chamber, the mounting table having a smaller size than the substrate. The substrate having a surface, on which a resist mark is formed, is mounted on the mounting table and then electrostatically adsorbed on the mounting table by applying a voltage to an electrostatic chuck. The surface of the substrate is etched by using a plasma of an etching gas while the substrate is cooled through a heat transfer between the substrate and the mounting table via a thermally conductive gas supplied between a top surface of the mounting table and a bottom surface of the substrate. The supply of the thermally conductive gas is stopped, and the resist mask on the substrate is ashed by using a plasma of an ashing gas containing O2.
摘要翻译：等离子体处理方法对安装在安装在气密处理室中的安装台上的基板上进行等离子体处理，该安装台具有比基板小的尺寸。具有形成有抗蚀剂标记的表面的基板安装在安装台上，然后通过向静电卡盘施加电压而静电吸附在安装台上。通过使用蚀刻气体的等离子体蚀刻衬底的表面，同时通过在安装台的顶表面之间供应的导热气体和基板和安装台的底面之间的热传递来冷却基板，底物。停止供应导热气体，并且通过使用含有O 2 2的灰化气体的等离子体将基板上的抗蚀剂掩模灰化。

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