专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US07035153B2 Semiconductor memory device of bit line twist system 失效
标题翻译：位线扭转系统的半导体存储器件
公开(公告)号：US07035153B2
公开(公告)日：2006-04-25
申请号：US10978457
申请日：2004-11-02
申请人： Shintaro Hayashi , Manabu Satoh , Masahiro Yoshihara , Naoaki Kanagawa , Mami Kawabata
发明人： Shintaro Hayashi , Manabu Satoh , Masahiro Yoshihara , Naoaki Kanagawa , Mami Kawabata
IPC分类号： G11C29/00
CPC分类号： G11C29/816 , G11C7/1048 , G11C7/18 , G11C11/4097
摘要： A semiconductor memory device adopting a bit line twist system in which at least a part of bit lines are twisted, includes memory cell arrays each having a plurality of memory cells to store data, redundancy cell arrays each having a plurality of redundancy cells to replace a defective cell in the memory cell array, and a control circuit which performs control to invert a direction of the data. The device further includes an inversion circuit which inverts the direction of the data, in accordance with the control by the control circuit.
摘要翻译：采用位线扭转系统的半导体存储器件，其中位线的至少一部分被扭曲，包括每个具有多个存储单元以存储数据的存储单元阵列，每个具有多个冗余单元的冗余单元阵列以替代存储单元阵列中的有缺陷的单元，以及执行用于反转数据的方向的控制的控制电路。该装置还包括根据控制电路的控制来反转数据的方向的反相电路。

2. 发明授权

US06302762B1 Wafer polishing apparatus 失效
标题翻译：晶圆抛光装置
公开(公告)号：US06302762B1
公开(公告)日：2001-10-16
申请号：US09432269
申请日：1999-11-02
申请人： Takao Inaba , Minoru Numoto , Kenji Sakai , Manabu Satoh
发明人： Takao Inaba , Minoru Numoto , Kenji Sakai , Manabu Satoh
IPC分类号： B24B4900
CPC分类号： B24B37/013 , B24B37/005 , B24B49/04 , B24B49/06
摘要： Sensors detect a stock removal of a wafer during polishing, and a CPU calculates the stock removal in accordance with information from the sensors. The CPU compares the actual stock removal detected by the sensors and a model stock removal stored in RAM, and determines timings for dressing and replacing said polishing pad in accordance with a difference between the actual stock removal and the model stock removal. The determination results are shown on a display.
摘要翻译：传感器在抛光期间检测到晶片的库存移除，并且CPU根据来自传感器的信息计算库存移除。 CPU比较传感器检测到的实际库存清除量和存储在RAM中的库存清单，并根据实际库存清除与库存清除之间的差异确定修整和更换抛光垫的时间。确定结果显示在显示屏上。

3. 发明申请

US20090129157A1 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR CONTROLLING THRESHOLD VALUE IN NONVOLATILE SEMICONDUCTOR MEMORY DEVICE 失效
标题翻译：非易失性半导体存储器件的非线性半导体存储器件和控制非线性半导体存储器件中的阈值的方法
公开(公告)号：US20090129157A1
公开(公告)日：2009-05-21
申请号：US12273845
申请日：2008-11-19
申请人： Yasuhiko HONDA , Ryu Hondai , Manabu Satoh
发明人： Yasuhiko HONDA , Ryu Hondai , Manabu Satoh
IPC分类号： G11C16/00 , G11C16/06 , G11C7/00
CPC分类号： G11C11/5628 , G11C16/0483 , G11C16/3418 , G11C2211/5621
摘要： A method for controlling a threshold value in a nonvolatile semiconductor memory device, includes: performing writing at least once on at least one of the memory cells to be adjusted to a state other than an erased state with an applied voltage that does not cause excess writing, with verify reading being not performed; and performing verify reading by applying a verify voltage corresponding to a target threshold value of the memory cell after the writing is performed on the at least one of the memory cells to be adjusted to the state other than the erased state, and, when the threshold value of the memory cell is determined to be lower than the target threshold value, repeating the writing with the applied voltage that does not cause excess writing and the verify reading until the threshold value of the memory cell becomes equal to or higher than the target threshold value.
摘要翻译：一种用于控制非易失性半导体存储器件中的阈值的方法，包括：至少一个存储器单元执行至少一次的写入，以将其调整到不是擦除状态的状态，其中所施加的电压不会导致过多的写入，不执行验证读取; 以及在对所述至少一个所述存储器单元执行写入之后，通过应用与所述存储单元的目标阈值对应的验证电压来执行验证读取，以将所述至少一个所述存储器单元调整到除了所述擦除状态之外的状态，以及当所述阈值存储单元的值被确定为低于目标阈值，重复以不引起过量写入的施加电压和验证读取的写入，直到存储单元的阈值变为等于或高于目标阈值值。

4. 发明申请

US20050141297A1 Semiconductor memory device of bit line twist system 失效
标题翻译：位线扭转系统的半导体存储器件
公开(公告)号：US20050141297A1
公开(公告)日：2005-06-30
申请号：US10978457
申请日：2004-11-02
申请人： Shintaro Hayashi , Manabu Satoh , Masahiro Yoshihara , Naoaki Kanagawa , Mami Kawabata
发明人： Shintaro Hayashi , Manabu Satoh , Masahiro Yoshihara , Naoaki Kanagawa , Mami Kawabata
IPC分类号： G11C29/04 , G11C7/10 , G11C7/18 , G11C11/401 , G11C11/4097 , G11C29/00 , G11C7/00
CPC分类号： G11C29/816 , G11C7/1048 , G11C7/18 , G11C11/4097
摘要： A semiconductor memory device adopting a bit line twist system in which at least a part of bit lines are twisted, includes memory cell arrays each having a plurality of memory cells to store data, redundancy cell arrays each having a plurality of redundancy cells to replace a defective cell in the memory cell array, and a control circuit which performs control to invert a direction of the data. The device further includes an inversion circuit which inverts the direction of the data, in accordance with the control by the control circuit.
摘要翻译：采用位线扭转系统的半导体存储器件，其中位线的至少一部分被扭曲，包括每个具有多个存储单元以存储数据的存储单元阵列，每个具有多个冗余单元的冗余单元阵列以替代存储单元阵列中的有缺陷的单元，以及执行用于反转数据的方向的控制的控制电路。该装置还包括根据控制电路的控制来反转数据的方向的反相电路。

5. 发明授权

US06203414B1 Polishing apparatus 失效
标题翻译：抛光设备
公开(公告)号：US06203414B1
公开(公告)日：2001-03-20
申请号：US09053062
申请日：1998-04-01
申请人： Minoru Numoto , Takao Inaba , Kenji Sakai , Hisashi Terashita , Manabu Satoh
发明人： Minoru Numoto , Takao Inaba , Kenji Sakai , Hisashi Terashita , Manabu Satoh
IPC分类号： B24B722
CPC分类号： B24B37/30 , B24B49/16
摘要： The polishing apparatus comprises a turn table, which polishes a semiconductor wafer, and a holding and pressing part, which holds and presses the semiconductor wafer against a polishing surface of the turn table. The holding and pressing part transmits a force from an air bag to the semiconductor wafer via a pressurized fluid layer to thereby press the semiconductor wafer against the polishing surface via the pressurized fluid layer, so that the semiconductor wafer can be polished. Thereby, it is possible to uniformly polish the semiconductor wafer.
摘要翻译：抛光装置包括：抛光半导体晶片的转台，以及将半导体晶片压靠在转台的抛光表面上的保持和按压部分。保持和按压部分经由加压流体层将气体从气囊传递到半导体晶片，从而经由加压流体层将半导体晶片压靠在抛光表面上，从而可以抛光半导体晶片。由此，能够均匀地研磨半导体晶片。

6. 发明授权

US06654337B2 Magneto-optical recording medium having pit pitch greater than groove pitch 失效
标题翻译：具有凹坑间距大于凹槽间距的磁光记录介质
公开(公告)号：US06654337B2
公开(公告)日：2003-11-25
申请号：US09922731
申请日：2001-08-07
申请人： Sohmei Endoh , Manabu Satoh , Mitsuo Arima , Jun Shimizu , Etsuro Ikeda , Hirotaka Ozawa , Akitoshi Suzuki , Masayuki Takakuwa
发明人： Sohmei Endoh , Manabu Satoh , Mitsuo Arima , Jun Shimizu , Etsuro Ikeda , Hirotaka Ozawa , Akitoshi Suzuki , Masayuki Takakuwa
IPC分类号： G11B724
CPC分类号： G11B7/0079 , G11B7/24079 , G11B7/24082 , G11B7/24085 , G11B7/261 , G11B11/10582 , G11B11/10584
摘要： A recording medium and a recoding medium master, and a method of manufacturing the recording medium which comply with the standard of recording/reproducing characteristic established in the MD standard while enabling precise discrimination of the pit track and groove track and optical detection of the pits by optical pickup and the like are provided. Pits and grooves are arranged on a surface of a disc-shaped substrate so as to form a grooves and the ratio is from 1.00 exclusive to 1.13 inclusive. It is preferable that the track pitch of the grooves is from 1.50 &mgr;m inclusive to 1.70 &mgr;m exclusive. The width of the pits and grooves in the radial direction of the substrate is the same.
摘要翻译：一种记录介质和记录介质主机，以及一种制造符合MD标准中建立的记录/再现特性标准的记录介质的方法，同时能够通过凹坑轨道和凹槽轨迹的精确识别以及凹坑的光学检测光拾取器等。凹坑和凹槽布置在盘形基底的表面上以形成凹槽，该比率为1.00，独占于1.13（含）。凹槽的轨道间距优选为1.50μm至1.70μm。基板的径向宽度与凹槽的宽度相同。

7. 发明授权

US06521317B2 Optical recording medium 失效
公开(公告)号：US06521317B2
公开(公告)日：2003-02-18
申请号：US09780524
申请日：2001-02-09
申请人： Toshihiro Akimori , Sohmei Endoh , Manabu Satoh
发明人： Toshihiro Akimori , Sohmei Endoh , Manabu Satoh
IPC分类号： B32B302
CPC分类号： G11B7/007 , G11B7/2472 , G11B7/2534 , G11B7/2542 , G11B7/259 , G11B7/2595 , Y10T428/21
摘要： The present invention enables to realize a high recording density while suppressing the wobble signal jitter component to a sufficiently low value for practical use, thereby enabling to perform information recording/reproducing in a stable manner. The recording track has a track pitch set to 1.3 micrometers or below and the recording layer is formed by a recording material containing a dye having a characteristic appropriate to suppress the wobble signal jitter component to a low value.

8. 发明授权

US6027398A Wafer polishing apparatus 失效
标题翻译：晶圆抛光装置
公开(公告)号：US6027398A
公开(公告)日：2000-02-22
申请号：US131690
申请日：1998-08-10
申请人： Minoru Numoto , Kenji Sakai , Manabu Satoh , Hisashi Terashita
发明人： Minoru Numoto , Kenji Sakai , Manabu Satoh , Hisashi Terashita
IPC分类号： B24B41/06 , B24B49/16 , B24B5/00 , B24B29/00
CPC分类号： B24B37/30 , B24B41/06 , B24B49/16
摘要： A wafer is polished while it is pressed against a polishing cloth through a pressure air layer, and a polished surface adjustment ring as well as the wafer are pressed against the polishing cloth. The wafer is polished in the state wherein a collapsing position of the polished surface adjustment ring with respect to the polishing cloth is set in such a way that the polishing pressure which is applied from the polishing cloth to the wafer can be constant.
摘要翻译：在通过压力空气层压在抛光布上的同时对晶片进行抛光，并将抛光的表面调节环以及晶片压在抛光布上。在抛光表面调节环相对于抛光布的塌缩位置被设置成使得从抛光布施加到晶片的抛光压力可以是恒定的状态下，抛光晶片。

9. 发明授权

US6059636A Wafer polishing apparatus 失效
公开(公告)号：US6059636A
公开(公告)日：2000-05-09
申请号：US112287
申请日：1998-07-09
申请人： Takao Inaba , Minoru Numoto , Kenji Sakai , Manabu Satoh
发明人： Takao Inaba , Minoru Numoto , Kenji Sakai , Manabu Satoh
IPC分类号： B24B37/04 , B24B37/005 , B24B49/02 , B24B49/04 , B24B49/06 , H01L21/304 , B24B49/00
CPC分类号： B24B37/013 , B24B37/005 , B24B49/04 , B24B49/06
摘要： Sensors detect a stock removal of a wafer during polishing, and a CPU calculates the stock removal in accordance with information from the sensors. The CPU compares the actual stock removal detected by the sensors and a model stock removal stored in RAM, and determines timings for dressing and replacing said polishing pad in accordance with a difference between the actual stock removal and the model stock removal. The determination results are shown on a display.

10. 发明授权

US08565019B2 Method for controlling threshold value in nonvolatile semiconductor memory device 失效
标题翻译：用于控制非易失性半导体存储器件中的阈值的方法
公开(公告)号：US08565019B2
公开(公告)日：2013-10-22
申请号：US12273845
申请日：2008-11-19
申请人： Yasuhiko Honda , Ryu Hondai , Manabu Satoh
发明人： Yasuhiko Honda , Ryu Hondai , Manabu Satoh
IPC分类号： G11C11/34 , G11C16/04
CPC分类号： G11C11/5628 , G11C16/0483 , G11C16/3418 , G11C2211/5621
摘要： A method for controlling a threshold value in a nonvolatile semiconductor memory device, includes: performing writing at least once on at least one of the memory cells to be adjusted to a state other than an erased state with an applied voltage that does not cause excess writing, with verify reading being not performed; and performing verify reading by applying a verify voltage corresponding to a target threshold value of the memory cell after the writing is performed on the at least one of the memory cells to be adjusted to the state other than the erased state, and, when the threshold value of the memory cell is determined to be lower than the target threshold value, repeating the writing with the applied voltage that does not cause excess writing and the verify reading until the threshold value of the memory cell becomes equal to or higher than the target threshold value.
摘要翻译：一种用于控制非易失性半导体存储器件中的阈值的方法，包括：至少一个存储器单元执行至少一次的写入，以将其调整到不是擦除状态的状态，其中所施加的电压不会导致过多的写入，不执行验证读取; 以及在对所述至少一个所述存储器单元执行写入之后，通过应用与所述存储单元的目标阈值对应的验证电压来执行验证读取，以将所述至少一个所述存储器单元调整到除了所述擦除状态之外的状态，以及当所述阈值存储单元的值被确定为低于目标阈值，重复以不引起过量写入的施加电压和验证读取的写入，直到存储单元的阈值变为等于或高于目标阈值值。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式