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1. 发明授权

US10522452B2 Packaging methods for semiconductor devices including forming trenches in workpiece to separate adjacent packaging substrates 有权
公开(公告)号：US10522452B2
公开(公告)日：2019-12-31
申请号：US13276143
申请日：2011-10-18
申请人： Kuei-Wei Huang , Wei-Hung Lin , Chih-Wei Lin , Chun-Cheng Lin , Meng-Tse Chen , Ming-Da Cheng , Ching-Shi Liu
发明人： Kuei-Wei Huang , Wei-Hung Lin , Chih-Wei Lin , Chun-Cheng Lin , Meng-Tse Chen , Ming-Da Cheng , Ching-Shi Liu
IPC分类号： H01L21/00 , H01L23/498
摘要： Packaging methods for semiconductor devices are disclosed. In one embodiment, a method of packaging a semiconductor device includes providing a workpiece including a plurality of packaging substrates. A portion of the workpiece is removed between the plurality of packaging substrates. A die is attached to each of the plurality of packaging substrates.

2. 发明授权

US08846448B2 Warpage control in a package-on-package structure 有权
标题翻译：包装封装结构中的翘曲控制
公开(公告)号：US08846448B2
公开(公告)日：2014-09-30
申请号：US13571665
申请日：2012-08-10
申请人： Meng-Tse Chen , Wei-Hung Lin , Kuei-Wei Huang , Tsai-Tsung Tsai , Ai-Tee Ang , Ming-Da Cheng , Chung-Shi Liu
发明人： Meng-Tse Chen , Wei-Hung Lin , Kuei-Wei Huang , Tsai-Tsung Tsai , Ai-Tee Ang , Ming-Da Cheng , Chung-Shi Liu
IPC分类号： H01L21/00 , H01L21/67
CPC分类号： H01L21/67288 , H01L25/105 , H01L25/50 , H01L2224/16225 , H01L2224/73204 , H01L2225/1058 , H01L2924/0002 , H01L2924/15311 , H05B6/6447 , H05B6/80 , H01L2924/0001
摘要： The present disclosure relates to a tool arrangement and method to reduce warpage within a package-on-package semiconductor structure, while minimizing void formation within an electrically-insulating adhesive which couples the packages. A pressure generator and a variable frequency microwave source are coupled to a process chamber which encapsulates a package-on-package semiconductor structure. The package-on-package semiconductor structure is simultaneously heated by the variable frequency microwave source at variable frequency, variable temperature, and variable duration and exposed to an elevated pressure by the pressure generator. This combination for microwave heating and elevated pressure limits the amount of warpage introduced while preventing void formation within an electrically-insulating adhesive which couples the substrates of the package-on-package semiconductor structure.
摘要翻译：本公开涉及一种减少封装封装半导体结构内的翘曲的工具布置和方法，同时最小化耦合封装的电绝缘粘合剂内的空隙形成。压力发生器和可变频率微波源耦合到封装封装的封装半导体结构的处理室。封装的封装半导体结构由可变频率，可变温度和可变持续时间的可变频率微波源同时加热，并通过压力发生器暴露于高压。这种用于微波加热和升高压力的组合限制了引入的翘曲量，同时防止在封装封装半导体结构的衬底的电绝缘粘合剂中形成空隙。

3. 发明申请

US20140008786A1 BUMP-ON-TRACE PACKAGING STRUCTURE AND METHOD FOR FORMING THE SAME 审中-公开
标题翻译：防撞包装结构及其形成方法
公开(公告)号：US20140008786A1
公开(公告)日：2014-01-09
申请号：US13544783
申请日：2012-07-09
申请人： Meng-Tse Chen , Wei-Hung Lin , Chih-Wei Lin , Kuei-Wei Huang , Hui-Min Huang , Ming-Da Cheng , Chung-Shi Liu
发明人： Meng-Tse Chen , Wei-Hung Lin , Chih-Wei Lin , Kuei-Wei Huang , Hui-Min Huang , Ming-Da Cheng , Chung-Shi Liu
IPC分类号： H01L23/498 , H01L21/60
CPC分类号： H01L23/3157 , H01L23/49816 , H01L24/13 , H01L24/16 , H01L24/81 , H01L2224/10175 , H01L2224/1146 , H01L2224/11849 , H01L2224/13082 , H01L2224/13111 , H01L2224/13147 , H01L2224/16238 , H01L2224/73204 , H01L2224/81191 , H01L2224/81385 , H01L2224/81815 , H01L2924/12042 , H01L2924/15311 , H01L2924/00014 , H01L2924/01047 , H01L2924/01029 , H01L2924/00
摘要： A device comprises a first package component, and a first metal trace and a second metal trace on a top surface of the first package component. The device further includes a dielectric mask layer covering the top surface of the first package component, the first metal trace and the second metal trace, wherein the dielectric mask layer has an opening therein exposing the first metal trace. The device also includes a second package component and an interconnect formed on the second package component, the interconnect having a metal bump and a solder bump formed on the metal bump, wherein the solder bump contacts the first metal trace in the opening of the dielectric mask layer.
摘要翻译：一种装置包括第一包装部件和第一包装部件的顶表面上的第一金属痕迹和第二金属迹线。该装置还包括覆盖第一封装部件的顶表面，第一金属迹线和第二金属迹线的介电掩模层，其中介电掩模层具有其中的开口露出第一金属迹线。该器件还包括形成在第二封装元件上的第二封装元件和互连，所述互连件具有形成在所述金属突起上的金属突起和焊料凸块，其中所述焊料凸点接触所述介电掩模的开口中的所述第一金属迹线层。

4. 发明申请

US20130102112A1 Process for Forming Packages 有权
标题翻译：形成包的过程
公开(公告)号：US20130102112A1
公开(公告)日：2013-04-25
申请号：US13280163
申请日：2011-10-24
申请人： Meng-Tse Chen , Kuei-Wei Huang , Wei-Hung Lin , Wen-Hsiung Lu , Ming-Da Cheng , Chung-Shi Liu
发明人： Meng-Tse Chen , Kuei-Wei Huang , Wei-Hung Lin , Wen-Hsiung Lu , Ming-Da Cheng , Chung-Shi Liu
IPC分类号： H01L21/52 , B23K37/04 , B23K5/22
CPC分类号： H01L24/75 , H01L24/13 , H01L24/16 , H01L24/81 , H01L24/94 , H01L24/97 , H01L2224/131 , H01L2224/16145 , H01L2224/16225 , H01L2224/16227 , H01L2224/75272 , H01L2224/75314 , H01L2224/75704 , H01L2224/7598 , H01L2224/81191 , H01L2224/81208 , H01L2224/8121 , H01L2224/81815 , H01L2224/94 , H01L2224/97 , H01L2924/00012 , H01L2924/00014 , H01L2224/81 , H01L2924/014
摘要： A method includes loading a first package component on a concave boat, and placing a second package component over the first package component. A load clamp is placed over the second package component, wherein the load clamp is supported by a temperature-variable spacer of the concave boat. A reflow step is performed to bond the second package component to the first package component. During a temperature-elevation step of the reflow step, the temperature-variable spacer is softened in response to an increase in temperature, and a height of the softened temperature-variable spacer is reduced, until the load clamp is stopped by a rigid spacer of the concave boat.
摘要翻译：一种方法包括将第一包装部件装载在凹形船上，以及将第二包装部件放置在第一包装部件上。负载夹具放置在第二包装部件上，其中负载夹具由凹形舟皿的温度可变的间隔件支撑。执行回流步骤以将第二包装部件粘合到第一包装部件。在回流步骤的升温步骤期间，温度可变的间隔件响应于温度升高而软化，并且软化的温度可变间隔件的高度减小，直到负载夹具被刚性间隔件凹船。

5. 发明申请

US20130095611A1 Packaging Methods for Semiconductor Devices 审中-公开
标题翻译：半导体器件的封装方法
公开(公告)号：US20130095611A1
公开(公告)日：2013-04-18
申请号：US13276143
申请日：2011-10-18
申请人： Kuei-Wei Huang , Wei-Hung Lin , Chih-Wei Lin , Chun-Cheng Lin , Meng-Tse Chen , Ming-Da Cheng , Chung-Shi Liu
发明人： Kuei-Wei Huang , Wei-Hung Lin , Chih-Wei Lin , Chun-Cheng Lin , Meng-Tse Chen , Ming-Da Cheng , Chung-Shi Liu
IPC分类号： H01L21/56
摘要： Packaging methods for semiconductor devices are disclosed. In one embodiment, a method of packaging a semiconductor device includes providing a workpiece including a plurality of packaging substrates. A portion of the workpiece is removed between the plurality of packaging substrates. A die is attached to each of the plurality of packaging substrates.
摘要翻译：公开了半导体器件的封装方法。在一个实施例中，封装半导体器件的方法包括提供包括多个封装衬底的工件。在多个包装基板之间移除一部分工件。模具附接到多个封装基板中的每一个。

6. 发明申请

US20130089952A1 Packaging Process Tools and Packaging Methods for Semiconductor Devices 有权
标题翻译：封装工艺和半导体器件的封装方法
公开(公告)号：US20130089952A1
公开(公告)日：2013-04-11
申请号：US13270890
申请日：2011-10-11
申请人： Wen-Hsiung Lu , Ming-Da Cheng , Wei-Hung Lin , Kuei-Wei Huang , Chih-Wei Lin , Chun-Cheng Lin , Chung-Shi Liu
发明人： Wen-Hsiung Lu , Ming-Da Cheng , Wei-Hung Lin , Kuei-Wei Huang , Chih-Wei Lin , Chun-Cheng Lin , Chung-Shi Liu
IPC分类号： H01L21/60 , H01L23/12 , H01L21/603
CPC分类号： H01L21/6835 , H01L21/561 , H01L21/563 , H01L23/3128 , H01L23/562 , H01L24/05 , H01L24/11 , H01L24/13 , H01L24/14 , H01L24/16 , H01L24/75 , H01L24/81 , H01L24/83 , H01L24/97 , H01L2221/68372 , H01L2224/0401 , H01L2224/05027 , H01L2224/05124 , H01L2224/05554 , H01L2224/05572 , H01L2224/05599 , H01L2224/11444 , H01L2224/1145 , H01L2224/11452 , H01L2224/11462 , H01L2224/13082 , H01L2224/13083 , H01L2224/13111 , H01L2224/13116 , H01L2224/13124 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13169 , H01L2224/14135 , H01L2224/16225 , H01L2224/16238 , H01L2224/2919 , H01L2224/32225 , H01L2224/73204 , H01L2224/75754 , H01L2224/7698 , H01L2224/81001 , H01L2224/81136 , H01L2224/81191 , H01L2224/81203 , H01L2224/81815 , H01L2224/81907 , H01L2224/83102 , H01L2224/9205 , H01L2224/92125 , H01L2224/95001 , H01L2224/97 , H01L2924/00014 , H01L2924/15311 , H01L2924/181 , H01L2924/351 , H01L2924/3511 , H01L2924/3512 , H01L2924/3841 , Y10T29/41 , H01L2924/00 , H01L2224/81 , H01L2924/00012 , H01L2924/01082 , H01L2924/014 , H01L2924/0665 , H01L2224/05552 , H01L2924/013
摘要： Packaging process tools and packaging methods for semiconductor devices are disclosed. In one embodiment, a packaging process tool for semiconductor devices includes a mechanical structure including a frame. The frame includes a plurality of apertures adapted to retain a plurality of integrated circuit dies therein. The frame includes at least one hollow region.
摘要翻译：公开了用于半导体器件的封装处理工具和封装方法。在一个实施例中，用于半导体器件的封装处理工具包括包括框架的机械结构。框架包括适于将多个集成电路管芯保持在其中的多个孔。框架包括至少一个中空区域。

7. 发明授权

US08381965B2 Thermal compress bonding 有权
标题翻译：热压接
公开(公告)号：US08381965B2
公开(公告)日：2013-02-26
申请号：US12841858
申请日：2010-07-22
申请人： Bor-Ping Jang , Kuei-Wei Huang , Wei-Hung Lin , Chung-Shi Liu
发明人： Bor-Ping Jang , Kuei-Wei Huang , Wei-Hung Lin , Chung-Shi Liu
IPC分类号： B23K31/02
CPC分类号： H01L24/81 , H01L24/13 , H01L24/16 , H01L24/75 , H01L24/95 , H01L2224/13147 , H01L2224/16058 , H01L2224/16225 , H01L2224/75251 , H01L2224/75252 , H01L2224/75302 , H01L2224/75824 , H01L2224/7598 , H01L2224/81193 , H01L2224/81203 , H01L2224/81234 , H01L2224/81815 , H01L2224/81947 , H01L2924/01005 , H01L2924/01029 , H01L2924/01033 , H01L2924/014 , H01L2924/14 , H01L2924/00014 , H01L2924/00
摘要： A method includes providing a substrate carrier including work piece holders, and placing a first plurality of work pieces into the work piece holders. A second plurality of work pieces is picked up and placed, with each of the second plurality of work pieces being placed on one of the first plurality of work pieces. Solder bumps between the first and the second plurality of work pieces are then reflowed to simultaneously bond the first and the second plurality of work pieces together.
摘要翻译：一种方法包括提供包括工件保持件的基板载体，以及将第一多个工件放置在工件保持件中。拾取和放置第二多个工件，其中第二多个工件中的每一个被放置在第一多个工件中的一个上。然后，第一和第二多个工件之间的焊接凸起被回流以同时将第一和第二工件一起粘合在一起。

8. 发明申请

US20120267423A1 Methods and Apparatus for Thin Die Processing 审中-公开
标题翻译：薄模加工方法与装置
公开(公告)号：US20120267423A1
公开(公告)日：2012-10-25
申请号：US13089977
申请日：2011-04-19
申请人： Kuei-Wei Huang , Wei-Hung Lin , Meng-Tse Chen , Chun-Cheng Lin , Yu-Peng Tsai , Bor-Ping Jang , Chung-Shi Liu
发明人： Kuei-Wei Huang , Wei-Hung Lin , Meng-Tse Chen , Chun-Cheng Lin , Yu-Peng Tsai , Bor-Ping Jang , Chung-Shi Liu
IPC分类号： B23K1/20 , B25J15/06
CPC分类号： H01L21/6838 , H01L24/75
摘要： A vacuum tip and methods for processing thin integrated circuit dies. A vacuum tip for attaching to an integrated circuit die is disclosed comprising a vacuum port configured to connect to a vacuum supply on an upper surface and having a bottom surface; and at least one vacuum hole extending through the vacuum tip and exposed at the bottom surface of the vacuum tip; wherein the vacuum tip is configured to physically contact a surface of an integrated circuit die. Methods for processing integrated circuit dies are disclosed.
摘要翻译：真空尖端和薄集成电路管芯的处理方法。公开了一种用于连接到集成电路管芯的真空端头，其包括被构造成连接到上表面上的具有底表面的真空源的真空端口; 以及至少一个真空孔，其延伸穿过真空尖端并暴露在真空尖端的底表面处; 其中所述真空尖端被配置为物理地接触集成电路管芯的表面。公开了集成电路管芯的处理方法。

9. 发明申请

US20100103119A1 TOUCH DISPLAY PANEL 有权
标题翻译：触摸显示面板
公开(公告)号：US20100103119A1
公开(公告)日：2010-04-29
申请号：US12339079
申请日：2008-12-19
申请人： Kuei-Wei Huang
发明人： Kuei-Wei Huang
IPC分类号： G06F3/041
CPC分类号： G06F3/0412
摘要： A touch display panel includes a first substrate, a second substrate, a third substrate, a liquid crystal layer disposed between the second and the third substrates, a pixel array disposed between the liquid crystal layer and the third substrate, an opposite electrode, color filter patterns, a first sensing electrode, and a second sensing electrode. The first, the second, and the third substrates are disposed in parallel. The color filter patterns and the opposite electrode that are disposed between the liquid crystal layer and the second substrate are respectively disposed on opposite sides of the second substrate. Some color filter patterns are piled to form touch points. The first sensing electrode on the first substrate faces the second substrate. The second sensing electrode covers the touch points and some color filter patterns. A height of the touch points is less than a gap between the first and the second substrates.
摘要翻译：触摸显示面板包括第一基板，第二基板，第三基板，设置在第二和第三基板之间的液晶层，设置在液晶层和第三基板之间的像素阵列，相对电极，滤色器图案，第一感测电极和第二感测电极。第一基板，第二基板和第三基板平行配置。设置在液晶层和第二基板之间的滤色器图案和对置电极分别设置在第二基板的相对侧上。一些滤色器图案被堆叠以形成接触点。第一衬底上的第一感测电极面向第二衬底。第二感测电极覆盖触摸点和一些滤色器图案。接触点的高度小于第一和第二基板之间的间隙。

10. 发明申请

US20100033507A1 Driving Method and Driving Apparatus for Displaying Apparatus 有权
标题翻译：显示装置的驱动方法和驱动装置
公开(公告)号：US20100033507A1
公开(公告)日：2010-02-11
申请号：US12430881
申请日：2009-04-27
申请人： Kuei-Wei Huang , Yi-Cheng Tsai , Qi-Ming Lu , Jhen-Shen Liao , Kuan-Hung Liu
发明人： Kuei-Wei Huang , Yi-Cheng Tsai , Qi-Ming Lu , Jhen-Shen Liao , Kuan-Hung Liu
IPC分类号： G09G5/10
CPC分类号： G09G3/3648 , G09G3/36 , G09G2340/16
摘要： A driving method for driving a display apparatus is provided. The driving method includes: configuring a plurality of driving voltages corresponding to a plurality of gray scales, where the gray scales include a first gray scale and a second gray scale smaller than the first gray scale, and a first driving voltage corresponding to the first gray scale is lower than a second driving voltage corresponding to the second gray scale; and controlling the display apparatus to display a gray scale merely up to the second gray scale. In this way, the driving method hence reduces the response time of the display apparatus, which may be an LCD display panel.
摘要翻译：提供一种用于驱动显示装置的驱动方法。驱动方法包括：配置与多个灰度级相对应的多个驱动电压，其中所述灰度级包括小于所述第一灰度级的第一灰度级和第二灰度级，以及对应于所述第一灰度级的第一驱动电压规模低于对应于第二灰度级的第二驱动电压; 并且控制显示装置仅显示直到第二灰阶的灰度。以这种方式，驱动方法因此减少了可以是LCD显示面板的显示装置的响应时间。

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