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1. 发明授权

US07028237B2 Internal bus testing device and method 有权
标题翻译：内部总线测试装置及方法
公开(公告)号：US07028237B2
公开(公告)日：2006-04-11
申请号：US10385527
申请日：2003-03-12
申请人： Masashi Masuda , Akio Hara , Kohji Kitagawa
发明人： Masashi Masuda , Akio Hara , Kohji Kitagawa
IPC分类号： G01R31/28
CPC分类号： G06F11/27
摘要： An internal bus testing device for a semiconductor integrated circuit in which an internal bus control circuit and a plurality of modules are linked by a plurality of internal buses. The internal bus testing device includes an area selector which causes the internal bus control circuit to select an address area corresponding to one of the plurality of internal buses. An area address setting unit sets the internal bus control circuit in an internal bus test mode in response to an internal bus test start signal, the area address setting unit storing a state setting signal and a predetermined address value indicating the address area. A control unit supplies, at a start of an internal bus test, the address value from the area address setting unit to the area selector by transmitting the state setting signal from the area address setting unit to the area selector.
摘要翻译：一种用于半导体集成电路的内部总线测试装置，其中内部总线控制电路和多个模块通过多个内部总线连接。内部总线测试装置包括区域选择器，其使得内部总线控制电路选择与多个内部总线之一相对应的地址区域。区域地址设定单元响应于内部总线测试开始信号将内部总线控制电路设置在内部总线测试模式中，区域地址设置单元存储状态设置信号和指示地址区域的预定地址值。控制单元通过从区域地址设定单元向区域选择器发送状态设定信号，在内部总线测试开始时，将区域地址设定单元的地址值提供给区域选择器。

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