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1. 发明申请

WO2004042781A3 THIN FILM TRANSISTOR ARRAY PANEL 审中-公开
标题翻译：薄膜晶体管阵列
公开(公告)号：WO2004042781A3
公开(公告)日：2004-09-30
申请号：PCT/KR0302346
申请日：2003-11-04
申请人： SAMSUNG ELECTRONICS CO LTD , LEE SU-GYEONG , KANG SOOK-YOUNG , KANG MYUNG-KOO , KIM HYUN-JAE , IM JAMES S
发明人： LEE SU-GYEONG , KANG SOOK-YOUNG , KANG MYUNG-KOO , KIM HYUN-JAE , IM JAMES S
IPC分类号： G02F1/136 , H01L21/77 , H01L27/12 , H01L29/786
CPC分类号： H01L27/1285 , H01L27/1214 , H01L27/1296 , H01L29/78645
摘要： A thin film transistor array panel is provided, which includes: a substrate (110) including a plurality of pixel areas; a semiconductor layer (140, 142) formed on the substrate (110) and including a plurality of pairs of first (140) and second (142) semiconductor portions in respective pixel areas; a first insulating layer (130) formed on the semiconductor layer; a gate wire (121-124); formed on the first insulating layer; a second insulating layer (180) formed on the gate wire (121-124); a data wire (171, 172) formed on the second insulating layer (180); a third insulating layer (185) formed on the data wire (171, 172) a pixel electrode (192) formed on the third insulating layer (185) and connected to the data wire (171, 172), wherein width and length of at least one of the first (140) and the second (142) semiconductor portions vary between at least two pixel areas.
摘要翻译：提供薄膜晶体管阵列面板，其包括：包括多个像素区域的基板（110）; 形成在所述基板（110）上并在各像素区域中包括多对第一（140）和第二（142）半导体部分的半导体层（140,142）形成在所述半导体层上的第一绝缘层（130）栅极线（121-124）; 形成在第一绝缘层上; 形成在栅极导线（121-124）上的第二绝缘层（180）; 形成在第二绝缘层（180）上的数据线（171,172）; 形成在数据线（171,172）上的形成在第三绝缘层（185）上并连接到数据线（171,172）的像素电极（192）的第三绝缘层（185），其中宽度和长度为第一（140）和第二（142）半导体部分中的至少一个在至少两个像素区域之间变化。

2. 发明申请

WO2004042781A2 THIN FILM TRANSISTOR ARRAY PANEL 审中-公开
标题翻译：薄膜晶体管阵列
公开(公告)号：WO2004042781A2
公开(公告)日：2004-05-21
申请号：PCT/KR2003/002346
申请日：2003-11-04
申请人： SAMSUNG ELECTRONICS CO., LTD. , LEE, Su-Gyeong , KANG, Sook-Young , KANG, Myung-Koo , KIM, Hyun-Jae , IM, James S.
发明人： LEE, Su-Gyeong , KANG, Sook-Young , KANG, Myung-Koo , KIM, Hyun-Jae , IM, James S.
IPC分类号： H01L
CPC分类号： H01L27/1214 , H01L27/1255 , H01L27/1285 , H01L27/1296 , H01L29/78645
摘要： A thin film transistor array panel is provided, which includes: a substrate including a plurality of pixel areas; a semiconductor layer formed on the substrate and including a plurality of pairs of first and second semiconductor portions in respective pixel areas; a first insulating layer formed on the semiconductor layer; a gate wire formed on the first insulating layer; a second insulating layer formed on the gate wire; a data wire formed on the second insulating layer; a third insulating layer formed on the data wire; a pixel electrode formed on the third insulating layer and connected to the data wire, wherein width and length of at least one of the first and the second semiconductor portions vary between at least two pixel areas.
摘要翻译：提供一种薄膜晶体管阵列面板，其包括：包括多个像素区域的基板; 半导体层，形成在所述基板上，并且在各像素区域中包括多对第一和第二半导体部分; 形成在所述半导体层上的第一绝缘层; 形成在所述第一绝缘层上的栅极线; 形成在栅极线上的第二绝缘层; 形成在所述第二绝缘层上的数据线; 形成在数据线上的第三绝缘层; 形成在第三绝缘层上并连接到数据线的像素电极，其中第一和第二半导体部分中的至少一个的宽度和长度在至少两个像素区域之间变化。

3. 发明申请

WO2003052833A1 A METHOD FOR MANUFACTURING A THIN FILM TRANSISTOR USING POLY SILICON 审中-公开
标题翻译：使用聚硅制造薄膜晶体管的方法
公开(公告)号：WO2003052833A1
公开(公告)日：2003-06-26
申请号：PCT/KR2002/000131
申请日：2002-01-29
申请人： SAMSUNG ELECTRONICS CO., LTD. , SONG, Jean, Ho , CHOI, Joon, Hoo , CHOI, Beom-Rak , KANG, Myung-Koo , KANG, Sook-Young
发明人： SONG, Jean, Ho , CHOI, Joon, Hoo , CHOI, Beom-Rak , KANG, Myung-Koo , KANG, Sook-Young
IPC分类号： H01L29/786
CPC分类号： H01L29/66757 , H01L29/78675
摘要： A manufacturing method of a thin film transistor. An amorphous silicon thin film is formed on an insulating substrate, and is crystallized by a lateral solidification process with illumination of laser beams into the amorphous silicon thin film to form a polysilicon thin film. Next, protrusion portions protruding from the surface of the polysilicon thin film are removed by plasma dry-etching using a gas mixture including Cl 2 , SF 6 and Ar at the ratio of 3:1:2 to smooth the surface of the polysilicon thin film, and the semiconductor layer is formed by patterning the polysilicon thin film. A gate insulating film covering the semiconductor layer is formed and a gate electrode is formed on the gate insulating film opposite the semiconductor layer. A source region and a drain region opposite each other with respect to the gate electrode are formed by implanting impurities into I the semiconductor layer and a source electrode and drain electrode are forined to be electrically connected to the source region and drain region.
摘要翻译：薄膜晶体管的制造方法。在绝缘基板上形成非晶硅薄膜，并通过横向固化工艺使激光束照射到非晶硅薄膜中而形成多晶硅薄膜而结晶。接下来，通过使用包含Cl 2，SF 6和Ar的气体混合物以3:1:2的比例通过等离子体干法蚀刻去除从多晶硅薄膜的表面突出的突出部分，以平滑多晶硅薄膜的表面，并且通过图案化多晶硅薄膜形成半导体层。形成覆盖半导体层的栅极绝缘膜，并且在与半导体层相对的栅极绝缘膜上形成栅电极。通过将杂质注入到半导体层中而形成源极区域和相对于栅极电极相对的漏极区域，源电极和漏极电极被电连接到源极区域和漏极区域。

4. 发明申请

WO2003060602A1 THIN FILM TRANSISTOR AND LIQUID CRYSTAL DISPLAY 审中-公开
标题翻译：薄膜晶体管和液晶显示器
公开(公告)号：WO2003060602A1
公开(公告)日：2003-07-24
申请号：PCT/KR2003/000008
申请日：2003-01-03
申请人： SAMSUNG ELECTRONICS CO., LTD. , KANG, Myung-Koo , KIM, Hyun-Jae , KANG, Sook-Young , CHUNG, Woo-Suk
发明人： KANG, Myung-Koo , KIM, Hyun-Jae , KANG, Sook-Young , CHUNG, Woo-Suk
IPC分类号： G02F1/136
CPC分类号： H01L29/42384 , G02F1/13454 , G02F2202/104 , H01L21/02675 , H01L21/2026 , H01L29/78675
摘要： The present invention relates to a thin film transistor and a liquid crystal display. A gate electrode is formed to include at least one portion extending in a direction perpendicular to a gain growing direction in order to make electrical charge mobility of TFTs uniform without increasing the size of the driving circuit. A thin film transistor according to the present invention includes a semiconductor pattern a thin film of poly-crystalline silicon containing grown grains on the insulating substrate. The semiconductor pattern includes a channel region and source and drain regions opposite with respect to the channel region. A gate insulating layer covers the semiconductor pattern. On the gate insulating layer, a gate electrode including at least one portion extending in a direction crossing the growing direction of the grains and overlapping the channel region is formed. In a liquid crystal display according to the present invention, a plurality of thin film transistors forming a data driver circuit include thin films of polycrystalline silicon formed by sequential lateral solidification, at least one portion of a gate electrode of each thin film transistor extends in a direction crossing the grain growing direction, and at least one of the plurality of thin film transistors has a gate electrode having a pattern different from other thin film transistors.
摘要翻译：本发明涉及薄膜晶体管和液晶显示器。栅电极被形成为包括沿垂直于增益生长方向的方向延伸的至少一个部分，以使TFT的电荷迁移率均匀，而不增加驱动电路的尺寸。根据本发明的薄膜晶体管包括在绝缘基板上具有含有生长晶粒的多晶硅薄膜的半导体图案。半导体图案包括沟道区和相对于沟道区相反的源极和漏极区。栅极绝缘层覆盖半导体图案。在栅极绝缘层上形成栅电极，该栅电极具有沿与晶粒的生长方向交叉的方向延伸的至少一部分，与沟道区重叠。在根据本发明的液晶显示器中，形成数据驱动电路的多个薄膜晶体管包括通过顺序横向固化形成的多晶硅薄膜，每个薄膜晶体管的栅电极的至少一部分以方向与晶粒生长方向交叉，并且多个薄膜晶体管中的至少一个具有与其它薄膜晶体管不同的图案的栅电极。

5. 发明申请

WO2003034503A1 A THIN FILM TRANSISTOR USING POLYSILICON AND A METHOD FOR MANUFACTURING THE SAME 审中-公开
标题翻译：一种使用多晶硅的薄膜晶体管及其制造方法
公开(公告)号：WO2003034503A1
公开(公告)日：2003-04-24
申请号：PCT/KR2002/001298
申请日：2002-07-09
申请人： SAMSUNG ELECTRONICS CO., LTD. , KANG, Myung-Koo , KIM, Hyun-Jae , KANG, Sook-Young , PARK, Cheol-Ho
发明人： KANG, Myung-Koo , KIM, Hyun-Jae , KANG, Sook-Young , PARK, Cheol-Ho
IPC分类号： H01L29/786
CPC分类号： H01L29/66757 , H01L29/78675
摘要： In a method of manufacturing a thin film transistor according to the present invention, an amorphous silicon thin film is firstly formed on an insulating substrate and a planarization layer is formed thereon. Thereafter, the amorphous silicon thin film is crystallized by a solidification process using a laser-irradiation to form a polysilicon thin film. Next, the polysilicon thin film and the planarization layer are patterned to form a semiconductor layer, and a gate insulating layer covering the semiconductor layer is formed. Then, a gate electrode is formed on the gate insulating layer opposite the semiconductor layer. Next, impurities are implanted into the semiconductor layer to form a source region and a drain region opposite each other with respect to the gate electrode, and a source electrode and a drain electrode electrically connected to the source region and the drain region, respectively, are formed.
摘要翻译：在本发明的薄膜晶体管的制造方法中，首先在绝缘基板上形成非晶硅薄膜，在其上形成平坦化层。此后，通过使用激光照射的固化工艺使非晶硅薄膜结晶，形成多晶硅薄膜。接下来，对多晶硅薄膜和平坦化层进行构图以形成半导体层，并且形成覆盖半导体层的栅极绝缘层。然后，在与半导体层相对的栅极绝缘层上形成栅电极。接下来，将杂质注入到半导体层中以形成相对于栅极彼此相对的源极区域和漏极区域，并且分别与源极区域和漏极区域电连接的源极电极和漏极电极是形成。

6. 发明申请

WO2003043093A1 A MASK FOR CRYSTALLIZING POLYSILICON AND A METHOD FOR FORMING THIN FILM TRANSISTOR USING THE MASK 审中-公开
标题翻译：用于晶体结晶的掩模和使用掩模形成薄膜晶体管的方法
公开(公告)号：WO2003043093A1
公开(公告)日：2003-05-22
申请号：PCT/KR2002/000111
申请日：2002-01-24
申请人： SAMSUNG ELECTRONICS CO., LTD. , KANG, Myung-Koo , KIM, Hyun-Jae , KANG, Sook-Young
发明人： KANG, Myung-Koo , KIM, Hyun-Jae , KANG, Sook-Young
IPC分类号： H01L29/786
CPC分类号： H01L21/02675 , H01L21/02532 , H01L21/0268 , H01L21/2026 , H01L29/66757 , H01L29/78675 , Y10S260/35
摘要： A mask for forming polysilicon has a first slit region where a plurality of horizontal slit patterns are arranged in the vertical direction while bearing the same width, a second slit region where a plurality of horizontal slit patterns are arranged in the vertical direction while bearing the same width, a third slit region where a plurality of horizontal slit patterns are arranged in the vertical direction while bearing the same width, and a fourth slit region where a plurality of horizontal slit patterns are arranged in the vertical direction while bearing the same width. The slit patterns arranged at the first to fourth slit regions are sequentially enlarged in width in the horizontal direction in multiple proportion to the width d of the slit pattern at the first slit region. The centers of the slit patterns arranged at the first to fourth slit regions in the horizontal direction are placed at the same line. The slit patterns arranged at the respective slit regions in the vertical direction are spaced from each other with a distance of 8*d. Alternatively, the first to fourth slit regions may be arranged in reverse order, or in the vertical direction.
摘要翻译：用于形成多晶硅的掩模具有第一狭缝区域，其中垂直方向上布置多个水平狭缝图案，同时承载相同的宽度，在垂直方向上布置多个水平狭缝图案的第二狭缝区域，同时承载相同的宽度宽度，在垂直方向上布置多个水平狭缝图案同时具有相同宽度的第三狭缝区域，以及沿着垂直方向布置多个水平狭缝图案的第四狭缝区域，同时承载相同的宽度。布置在第一至第四狭缝区域的狭缝图案在第一狭缝区域上与狭缝图案的宽度d成一定比例地沿水平方向的宽度依次增大。沿水平方向布置在第一至第四狭缝区域处的狭缝图案的中心位于相同的线上。在垂直方向的各个狭缝区域上排列的狭缝图案彼此间隔8 * d。或者，第一至第四狭缝区域可以以相反的顺序或在垂直方向上布置。

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