会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 1. 发明申请
    • GAME METHOD AND GAME SYSTEM FOR RECRUITING AND ENTERING A SCHOOL OF HIGHER GRADE
    • 用于招收和进入高等学校的游戏方法和游戏系统
    • WO2006057519A1
    • 2006-06-01
    • PCT/KR2005/003983
    • 2005-11-24
    • JEON, Joong-yang
    • JEON, Joong-yang
    • G06Q30/00
    • G06Q10/10G09B7/00
    • Provided are a method and a system for playing a game helping get a job and a method and a system for playing a game helping entering into a university or a school of higher grade. The present invention, through the game, provides an advantage of enabling a job applicant to get a basic understanding of a culture of a company which he/her actually wants to enter into and to get in advance familiar with a style of a written examination and an interview required by the company. More specifically, the job applicant may be in advance familiar with employment requirements provided by the company and he/she, through the game, may be motivated to study for the examination and the interview in an interesting way. Also, the company, through the game, may employ a competent person with a good grounding required of its employees. Also, the present invention, through the game, provides another advantage of enabling an applicant who wants to enter into a university or a school of higher grade to grasp his/her aptitude and select his/her major suitable for his/her learning ability judged through evaluation of a result of briefly studying a plurality of subjects according to his/her grasped aptitude. More specifically, the applicant may be motivated to have interest in studying for entrance into a university or a school of high grade and may obtain a substantial guidance on the entrance into a university or a school of higher grade, thus increasing his/her learning efficiency.
    • 提供了一种玩游戏帮助获得工作的方法和系统,以及用于玩游戏的方法和系统,帮助进入高校的大学或学校。 本发明通过游戏提供了使求职者能够对他/她实际想要进入并预先熟悉书面样式的公司的文化的基本了解的优点, 公司需要采访。 更具体地说,求职者可以事先熟悉公司提供的就业要求,他/她可以通过游戏有兴趣以有趣的方式学习考试和面试。 此外,该公司通过游戏,可以聘请合格的人员,其员工需要良好的基础。 此外,本发明通过游戏提供了另一个优点,即使想要进入大学或高年级学校的申请人能够掌握他/她的能力并选择适合他/她的学习能力的他/她的主修 通过评估根据他/她掌握的能力简要研究多个主题的结果。 更具体地说,申请人可能有兴趣有兴趣入读大学或高年级学校,并可以在大学或高年级学校入学时获得实质的指导,从而提高他/她的学习效率 。
    • 4. 发明申请
    • Game Method And Game System For Recruiting And Entering A School Of Higher Grade
    • 招聘进入高等学校的游戏方法和游戏系统
    • US20070269786A1
    • 2007-11-22
    • US11667659
    • 2005-11-24
    • Joong-Yang Jeon
    • Joong-Yang Jeon
    • G06Q30/00
    • G06Q10/10G09B7/00
    • Provided are a method and a system for playing a game helping get a job and a method and a system for playing a game helping entering into a university or a school of higher grade. The present invention, through the game, provides an advantage of enabling a job applicant to get a basic understanding of a culture of a company which he/her actually wants to enter into and to get in advance familiar with a style of a written examination and an interview required by the company. More specifically, the job applicant may be in advance familiar with employment requirements provided by the company and he/she, through the game, may be motivated to study for the examination and the interview in an interesting way. Also, the company, through the game, may employ a competent person with a good grounding required of its employees. Also, the present invention, through the game, provides another advantage of enabling an applicant who wants to enter into a university or a school of higher grade to grasp his/her aptitude and select his/her major suitable for his/her learning ability judged through evaluation of a result of briefly studying a plurality of subjects according to his/her grasped aptitude. More specifically, the applicant may be motivated to have interest in studying for entrance into a university or a school of high grade and may obtain a substantial guidance on the entrance into a university or a school of higher grade, thus increasing his/her learning efficiency.
    • 提供了一种玩游戏帮助获得工作的方法和系统,以及用于玩游戏的方法和系统,帮助进入高校的大学或学校。 本发明通过游戏提供了使求职者能够对他/她实际想要进入并预先熟悉书面样式的公司的文化的基本了解的优点, 公司需要采访。 更具体地说,求职者可以事先熟悉公司提供的就业要求,他/她可以通过游戏有兴趣以有趣的方式学习考试和面试。 此外,该公司通过游戏,可以聘请合格的人员,其员工需要良好的基础。 此外,本发明通过游戏提供了另一个优点,即使想要进入大学或高年级学校的申请人能够掌握他/她的能力并选择适合他/她的学习能力的他/她的主修 通过评估根据他/她掌握的能力简要研究多个主题的结果。 更具体地说,申请人可能有兴趣有兴趣入读大学或高年级学校,并可以在大学或高年级学校入学时获得实质的指导,从而提高他/她的学习效率 。
    • 6. 发明申请
    • INERTIAL SENSOR
    • 惯性传感器
    • US20120125096A1
    • 2012-05-24
    • US13283517
    • 2011-10-27
    • Heung Woo ParkWon Kyu JeungHyun Kee LeeSi Joong Yang
    • Heung Woo ParkWon Kyu JeungHyun Kee LeeSi Joong Yang
    • G01C19/56
    • G01C19/5783
    • Disclosed herein is an inertial sensor which includes a sensing unit including a mass mounted to be displaced on a flexible substrate part, a driving unit moving the mass, and a displacement detecting unit detecting a displacement of the mass, the inertial sensor comprising: a top cap covering a top of the flexible substrate part; and a bottom cap covering a bottom of the mass. Thereby, the inertial sensor can be implemented in an economic EMC molding package shape, while protecting the mass and the piezo-electric element. Further, the inertial sensor optimizes a thickness of the cap covering the mass and the piezo-electric element and an interval between the mass and the piezo-electric element to have improved freedom in design of space utilization as well as improved driving characteristics and Q values.
    • 本文公开了一种惯性传感器,其包括感测单元,该感测单元包括安装成在柔性基板部件上移位的质量,移动该质量块的驱动单元和检测该质量块的位移的位移检测单元,该惯性传感器包括:顶部 帽盖覆盖柔性基板部分的顶部; 以及覆盖该质量块底部的底盖。 因此,惯性传感器可以以经济的EMC成型包装形式实现,同时保护质量和压电元件。 此外,惯性传感器优化覆盖质量块和压电元件的盖的厚度以及质量块和压电元件之间的间隔,以提高空间利用设计的自由度以及改善的驱动特性和Q值 。
    • 7. 发明授权
    • Wafer level package fabrication method
    • 晶圆级封装制造方法
    • US07696004B2
    • 2010-04-13
    • US12155317
    • 2008-06-02
    • Jingli YuanJae Cheon DohSi Joong YangIn Goo KangSeung Wook Park
    • Jingli YuanJae Cheon DohSi Joong YangIn Goo KangSeung Wook Park
    • H01L21/00
    • H01L23/10H01L21/76898H01L2924/0002H03H9/105H03H9/1092H01L2924/00
    • Provided is a wafer level package fabrication method. The method includes providing a device substrate wafer including one or more devices on an upper surface thereof, and a bonding pad electrically connected to the device, providing a bonding seal surrounding the device along the bonding pad, bonding a cap substrate wafer to the device substrate wafer through the bonding seal, the cap substrate wafer having a via formed in a region corresponding to the bonding pad, forming an external terminal on the cap substrate wafer, the external terminal being electrically connected to the bonding pad, and cutting the cap substrate wafer and the device substrate wafer along a cutting line to individually separate a plurality of wafer level packages. The method is conducive to reducing product size for miniaturization, is capable of performing a bonding process without wafer deformation or damage, and increases freedom in wafer material selection.
    • 提供了晶片级封装制造方法。 该方法包括提供在其上表面上包括一个或多个器件的器件衬底晶片和电连接到该器件的焊盘,提供围绕该焊盘的器件的接合密封,将盖衬底晶片接合到器件衬底 晶片通过接合密封,所述盖基板晶片具有形成在与所述接合焊盘相对应的区域中的通孔,在所述盖基板晶片上形成外部端子,所述外部端子电连接到所述接合焊盘,以及切割所述盖基板晶片 以及沿着切割线的装置基板晶片,以单独分离多个晶片级封装。 该方法有利于减小产品尺寸以实现小型化,能够进行没有晶片变形或损坏的接合工艺,并增加晶片材料选择的自由度。
    • 8. 发明申请
    • Wafer level package fabrication method
    • 晶圆级封装制造方法
    • US20080299706A1
    • 2008-12-04
    • US12155317
    • 2008-06-02
    • Jingli YuanJae Cheon DohSi Joong YangIn Goo KangSeung Wook Park
    • Jingli YuanJae Cheon DohSi Joong YangIn Goo KangSeung Wook Park
    • H01L21/50
    • H01L23/10H01L21/76898H01L2924/0002H03H9/105H03H9/1092H01L2924/00
    • Provided is a wafer level package fabrication method. The method includes providing a device substrate wafer including one or more devices on an upper surface thereof, and a bonding pad electrically connected to the device, providing a bonding seal surrounding the device along the bonding pad, bonding a cap substrate wafer to the device substrate wafer through the bonding seal, the cap substrate wafer having a via formed in a region corresponding to the bonding pad, forming an external terminal on the cap substrate wafer, the external terminal being electrically connected to the bonding pad, and cutting the cap substrate wafer and the device substrate wafer along a cutting line to individually separate a plurality of wafer level packages. The method is conducive to reducing product size for miniaturization, is capable of performing a bonding process without wafer deformation or damage, and increases freedom in wafer material selection.
    • 提供了晶片级封装制造方法。 该方法包括提供在其上表面上包括一个或多个器件的器件衬底晶片和电连接到该器件的焊盘,提供围绕该焊盘的器件的接合密封,将盖衬底晶片接合到器件衬底 晶片通过接合密封,所述盖基板晶片具有形成在与所述接合焊盘相对应的区域中的通孔,在所述盖基板晶片上形成外部端子,所述外部端子电连接到所述接合焊盘,以及切割所述盖基板晶片 以及沿着切割线的装置基板晶片,以单独分离多个晶片级封装。 该方法有利于减小产品尺寸以实现小型化,能够进行没有晶片变形或损坏的接合工艺,并增加晶片材料选择的自由度。