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1. 发明授权

US06803534B1 Membrane for micro-electro-mechanical switch, and methods of making and using it 有权
标题翻译：微机电开关薄膜及其制造和使用方法
公开(公告)号：US06803534B1
公开(公告)日：2004-10-12
申请号：US09866205
申请日：2001-05-25
申请人： Shea Chen , Brandon W. Pillans , John C. Ehmke , Zhimin Jamie Yao
发明人： Shea Chen , Brandon W. Pillans , John C. Ehmke , Zhimin Jamie Yao
IPC分类号： B81B300
CPC分类号： B81B3/0008 , B81B2201/016 , H01G5/16 , H01H1/0036 , H01H59/0009 , H01H2001/0084
摘要： A micro-electro-mechanical (MEMS) switch (10, 110) has an electrode (22, 122) covered by a dielectric layer (23, 123), and has a flexible conductive membrane (31, 131) which moves between positions spaced from and engaging the dielectric layer. At least one of the membrane and dielectric layer has a textured surface (138) that engages the other thereof in the actuated position. The textured surface reduces the area of physical contact through which electric charge from the membrane can tunnel into and become trapped within the dielectric layer. This reduces the amount of trapped charge that could act to latch the membrane in its actuated position, which in turn effects a significant increase in the operational lifetime of the switch.
摘要翻译：微机电开关（10,110,120）被称为MEMS，并且包括具有两个间隔开的导电柱（17,18）的基部（13,14,17-18）。导电部分（22 ）被提供在柱之间并被介电层（23）覆盖。膜（31,131,231）在柱之间延伸并且具有间隔开的膨胀部分（41-42,141-142,241-242），其有助于纵向膨胀膜在其中心部分分别与电介质层间隔开并与其接合的位置之间弯曲。一种制造开关的方法包括：提供具有对应于膨胀部分的槽或脊的顶表面的间隔材料（76,171,177,178），将膜沉积在间隔物的顶表面上，然后移除间隔物材料。

2. 发明授权

US6147582A Substrate supported three-dimensional micro-coil 有权
标题翻译：基板支持三维微型线圈
公开(公告)号：US6147582A
公开(公告)日：2000-11-14
申请号：US262786
申请日：1999-03-04
申请人： Charles L. Goldsmith , Andrew Malczewski , John C. Ehmke , Zhimin Yao
发明人： Charles L. Goldsmith , Andrew Malczewski , John C. Ehmke , Zhimin Yao
IPC分类号： H01F27/28 , H01F5/00
CPC分类号： H01F27/2804 , H01F27/2847
摘要： A method of forming a three-dimensional micro-coil on a substrate (10) is provided which consists of forming a first metal layer (14) on the substrate (10). The first metal layer (14) is partitioned into a first plurality of metal strips (16). A sacrificial layer (18) is formed on the first plurality of metal strips (16). A second metal layer (24) is formed on the sacrificial layer (18). The second metal layer (24) is then partitioned into a second plurality of metal strips (26) such that a continuous loop of metal is formed between the first plurality of metal strips (16) and the second plurality of metal strips (26). This continuous loop of metal defines windings for a three-dimensional micro-coil (28) with one side in contact with the substrate (10).
摘要翻译：提供了在基板（10）上形成三维微型线圈的方法，其包括在基板（10）上形成第一金属层（14）。第一金属层（14）被划分成第一多个金属条（16）。牺牲层（18）形成在第一多个金属条（16）上。第二金属层（24）形成在牺牲层（18）上。然后将第二金属层（24）分隔成第二多个金属条（26），使得在第一多个金属条（16）和第二多个金属条（26）之间形成连续的金属环。这种连续的金属环限定了三维微型线圈（28）的绕组，其一侧与衬底（10）接触。

3. 发明授权

US06856014B1 Method for fabricating a lid for a wafer level packaged optical MEMS device 有权
标题翻译：制造晶圆级封装光学MEMS器件的盖子的方法
公开(公告)号：US06856014B1
公开(公告)日：2005-02-15
申请号：US10747862
申请日：2003-12-29
申请人： John C. Ehmke , Vincent C. Lopes , John Paul Harris
发明人： John C. Ehmke , Vincent C. Lopes , John Paul Harris
IPC分类号： H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： B81C1/00333
摘要： A method of individually packaging a multiplicity of devices, such as a spatial light modulator, before the multiplicity of devices formed on a substrate wafer are separated. The method and structure comprises individually sealing each device while the device is still part of sealed by the combination interposer wafer and a cover or window wafer. After each device is sealed by the combination interposer wafer and cover wafer, the combination cover wafer is sawed through down to the substrate wafer. The sealed devices may then be fully separated by scoring and breaking the substrate wafer.
摘要翻译：在形成在基板晶片上的多个器件分离之前，分离地封装多个器件（诸如空间光调制器）的方法。该方法和结构包括单独地密封每个装置，同时装置仍然是由组合插入件晶片和盖或窗玻璃密封的一部分。在每个器件被组合插入器晶片和覆盖晶片密封之后，组合覆盖晶片被锯切到底部晶片。然后可以通过刻划和破坏基板晶片来完全分离密封的装置。

4. 发明授权

US06700172B2 Method and apparatus for switching high frequency signals 有权
标题翻译：用于切换高频信号的方法和装置
公开(公告)号：US06700172B2
公开(公告)日：2004-03-02
申请号：US10004666
申请日：2001-12-04
申请人： John C. Ehmke , Charles L. Goldsmith , Zhimin J. Yao , Susan M. Eshelman
发明人： John C. Ehmke , Charles L. Goldsmith , Zhimin J. Yao , Susan M. Eshelman
IPC分类号： H01L2982
CPC分类号： H01P1/127 , H01G5/16 , H01G5/40 , H01H59/0009 , H01H2059/0018
摘要： A switch includes a conductive region, a membrane, and a dielectric region. The dielectric region is formed from a dielectric material and is disposed between the membrane and the conductive region. When a sufficient voltage is applied between the conductive region and the membrane, a capacitive coupling between the membrane and the conductive region is effected. The dielectric material has a resistivity sufficiently low to inhibit charge accumulation in the dielectric region during operation of the switch.
摘要翻译：开关包括导电区域，膜和电介质区域。电介质区域由电介质材料形成，并且设置在膜与导电区域之间。当在导电区域和膜之间施加足够的电压时，实现膜与导电区域之间的电容耦合。电介质材料具有足够低的电阻以在开关的操作期间阻止电介质区域中的电荷累积。

5. 发明授权

US06501431B1 Method and apparatus for increasing bandwidth of a stripline to slotline transition 有权
标题翻译：用于增加带状线到槽线转换带宽的方法和装置
公开(公告)号：US06501431B1
公开(公告)日：2002-12-31
申请号：US09946848
申请日：2001-09-04
申请人： James McGlathery Irion, II , R. Thomas Dover , Richard E. Hodges , Allan R. Logan , John C. Ehmke
发明人： James McGlathery Irion, II , R. Thomas Dover , Richard E. Hodges , Allan R. Logan , John C. Ehmke
IPC分类号： H01Q1308
CPC分类号： H01Q13/08
摘要： An antenna element (10) has two dielectric layers (12, 13), which separate three ground planes (17, 18, 21, 22, 23). The three ground planes have respective slots (26, 27, 28), which collectively define a slotline communicating at an inner end with a balun hole (57) that extends through all of the ground planes and dielectric layers. Two capacitive switches (121) are supported within the balun hole, and each have terminals respectively coupled to the same ground plane on opposite sides of the balun hole. The capacitive switches are independently and selectively operated to dynamically vary the impedance characteristic of the overall balun structure that includes the balun hole and two switch assemblies, and which gives the antenna element good electrical performance over a wide bandwidth. The antenna element includes a stripline (36), and a stripline to a slotline transition exists at the end of the slotline adjacent the balun hole.
摘要翻译：天线元件（10）具有分离三个接地平面（17,18,21,22,23）的两个电介质层（12,13）。三个接地平面具有相应的槽（26,27,28），它们共同地限定了在内端连通的槽线，其中平衡 - 不平衡转换器（57）延伸穿过所有接地平面和电介质层。两个电容式开关（121）支撑在平衡 - 不平衡转换器孔内，并且每个具有分别耦合到平衡 - 不平衡转换孔的相对侧上相同接地平面的端子。电容式开关被独立地选择性地操作以动态地改变包括平衡 - 不平衡变压器孔和两个开关组件的整个平衡 - 不平衡变换器结构的阻抗特性，并且在宽带宽上给出天线元件良好的电性能。天线元件包括带状线（36），并且在与平动不平衡变换器孔相邻的槽线的端部存在带状线到槽线转变。

6. 发明申请

US20110097845A1 Method and Apparatus for Packaging Circuit Devices 有权
标题翻译：包装电路器件的方法和装置
公开(公告)号：US20110097845A1
公开(公告)日：2011-04-28
申请号：US12982346
申请日：2010-12-30
申请人： Billy D. Ables , John C. Ehmke , Roland W. Gooch
发明人： Billy D. Ables , John C. Ehmke , Roland W. Gooch
IPC分类号： H01L21/50
CPC分类号： H01L23/04 , B81B2207/07 , B81C1/00095 , B81C1/00301 , H01L23/66 , H01L2223/6622 , H01L2924/0002 , H01L2924/01079 , H01L2924/16153 , H01L2924/00
摘要： A hermetically sealed package includes a lid (14) hermetically bonded to a wafer or substrate (12), with a chamber therebetween defined by a recess (16) in the lid. A circuit device (26) such as MEMS device is provided within the chamber on the substrate. A plurality of vias (41-46) are provided through the substrate, and each have a structure which facilitates a hermetic seal of a suitable level between opposite sides of the substrate. The vias provide electrical communication from externally of the assembly to the device disposed in the chamber.
摘要翻译：气密密封的包装件包括密封地结合到晶片或基底（12）上的盖子（14），其中腔室由盖子中的凹槽（16）限定。诸如MEMS器件的电路器件（26）设置在衬底上的腔室内。多个通孔（41-46）设置穿过衬底，并且每个通孔具有促进在衬底的相对侧之间的适当水平的气密密封的结构。通孔提供从组件外部到设置在腔室中的装置的电连通。

7. 发明授权

US07867874B2 Method and apparatus for packaging circuit devices 有权
标题翻译：封装电路装置的方法和装置
公开(公告)号：US07867874B2
公开(公告)日：2011-01-11
申请号：US12468520
申请日：2009-05-19
申请人： Billy D. Ables , John C. Ehmke , Roland W. Gooch
发明人： Billy D. Ables , John C. Ehmke , Roland W. Gooch
IPC分类号： H01L21/46 , H01L21/30
CPC分类号： H01L23/04 , B81B2207/07 , B81C1/00095 , B81C1/00301 , H01L23/66 , H01L2223/6622 , H01L2924/0002 , H01L2924/01079 , H01L2924/16153 , H01L2924/00
摘要： A hermetically sealed package includes a lid (14) hermetically bonded to a wafer or substrate (12), with a chamber therebetween defined by a recess (16) in the lid. A circuit device (26) such as MEMS device is provided within the chamber on the substrate. A plurality of vias (41-46) are provided through the substrate, and each have a structure which facilitates a hermetic seal of a suitable level between opposite sides of the substrate. The vias provide electrical communication from externally of the assembly to the device disposed in the chamber.
摘要翻译：气密密封的包装件包括密封地结合到晶片或基底（12）上的盖子（14），其中腔室由盖子中的凹槽（16）限定。诸如MEMS器件的电路器件（26）设置在衬底上的腔室内。多个通孔（41-46）设置穿过衬底，并且每个通孔具有促进在衬底的相对侧之间的适当水平的气密密封的结构。通孔提供从组件外部到设置在腔室中的装置的电连通。

8. 发明授权

US06359290B1 Self-aligned bump bond infrared focal plane array architecture 失效
标题翻译：自对准凸点键红外焦平面阵列架构
公开(公告)号：US06359290B1
公开(公告)日：2002-03-19
申请号：US08595901
申请日：1996-02-06
申请人： John C. Ehmke
发明人： John C. Ehmke
IPC分类号： H01L300
CPC分类号： H01L24/32 , H01L21/6835 , H01L24/82 , H01L24/90 , H01L27/1465 , H01L2221/68354 , H01L2224/13019 , H01L2224/24051 , H01L2224/24998 , H01L2224/81192 , H01L2224/82007 , H01L2924/01005 , H01L2924/01006 , H01L2924/01019 , H01L2924/01033 , H01L2924/01042 , H01L2924/0105 , H01L2924/01074 , H01L2924/01079 , H01L2924/14
摘要： A method of making a diode and the diode wherein there is provided a substrate of p-type group II-VI semiconductor material and an electrically conductive material capable of forming an ohmic contact with the substrate is forced into the lattice of the substrate to create an n-type region in the substrate in contact with the material and forming an electrical contact to the p-type region of said substrate. The substrate is preferably HgCdTe and the electrically conductive material is preferably tungsten or tin coated tungsten or tungsten coated with a mercury amalgam. Also a method of making an infrared focal plane array and the array wherein there is provided a semiconductor integrated circuit having electrically conductive pads on a surface thereof, forming bumps of an electrically conductive material on predetermined ones of the pads, providing a substrate of p-type group II-VI semiconductor material, disposing a layer of bonding material over one of the surface of the integrated circuit containing the pads or a surface of the substrate, forcing the bumps into the lattice of the substrate to create an n-type region in the substrate in contact with the material, bonding the substrate to the integrated circuit and forming an electrical connection between the p-type region of the substrate and one of the pads. The process is otherwise the same as the diode fabrication.
摘要翻译：制备二极管和二极管的方法，其中提供了p型II-VI族半导体材料的衬底和能够与衬底形成欧姆接触的导电材料，被迫进入衬底的晶格，以形成所述衬底中的所述n型区域与所述材料接触并形成与所述衬底的p型区域的电接触。基底优选为HgCdTe，并且导电材料优选为涂覆有汞齐汞的钨或锡涂覆的钨或钨。还有一种制造红外焦平面阵列的方法，其中提供了一种在其表面上具有导电焊盘的半导体集成电路，在预定焊盘上形成导电材料的凸块，提供p- 型II-VI族半导体材料，在包含焊盘或基板的表面的集成电路的表面之一上设置接合材料层，迫使凸块进入基板的晶格以形成n型区域所述基板与所述材料接触，将所述基板接合到所述集成电路并且在所述基板的所述p型区域和所述焊盘中的一个之间形成电连接。该过程在另外与二极管制造相同。

9. 发明授权

US5298733A Infrared focal plane array with integral slot shield using spin-on epoxy and method of making same 失效
标题翻译：红外焦平面阵列，采用旋涂环氧树脂整体槽屏蔽及其制作方法
公开(公告)号：US5298733A
公开(公告)日：1994-03-29
申请号：US988513
申请日：1992-12-10
申请人： John C. Ehmke , James C. Baker
发明人： John C. Ehmke , James C. Baker
IPC分类号： G01J1/02 , H01L27/146 , H01L31/0232 , H01L31/16 , H01J40/14
CPC分类号： H01L27/146
摘要： A method of fabricating a focal plane array having an integral slot shield which comprises fabricating a focal plane array having a plurality of detector elements. A layer of electrically insulating material, preferably a spun on epoxy, having a planar top surface is then formed over the array. A reflective layer is then formed over the layer of electrically insulating material and the electrically insulating layer and reflective layer are etched only in the regions thereof over the detector elements to form slots over said detector elements. The electrically insulating layer is etched with a directional etchant. The etched layer of electrically insulating material defines side walls in the slots, material from the side walls being removed to define non-planar sidewalls. The non-planar side walls preferably have an essentially sawtooth shape.
摘要翻译：一种制造具有整体槽屏蔽的焦平面阵列的方法，其包括制造具有多个检测器元件的焦平面阵列。然后在阵列上形成一层电绝缘材料，优选具有平面顶表面的旋涂环氧树脂。然后在电绝缘材料层上形成反射层，并且电绝缘层和反射层仅在其检测器元件的区域中被蚀刻，以在所述检测器元件上形成狭缝。用定向蚀刻剂蚀刻电绝缘层。电绝缘材料的蚀刻层限定槽中的侧壁，去除来自侧壁的材料以限定非平面侧壁。非平面侧壁优选地具有基本上锯齿形状。

10. 发明授权

US07977208B2 Method and apparatus for packaging circuit devices 有权
公开(公告)号：US07977208B2
公开(公告)日：2011-07-12
申请号：US12982346
申请日：2010-12-30
申请人： Billy D. Ables , John C. Ehmke , Roland W. Gooch
发明人： Billy D. Ables , John C. Ehmke , Roland W. Gooch
IPC分类号： H01L21/30 , H01L21/46
CPC分类号： H01L23/04 , B81B2207/07 , B81C1/00095 , B81C1/00301 , H01L23/66 , H01L2223/6622 , H01L2924/0002 , H01L2924/01079 , H01L2924/16153 , H01L2924/00
摘要： A hermetically sealed package includes a lid (14) hermetically bonded to a wafer or substrate (12), with a chamber therebetween defined by a recess (16) in the lid. A circuit device (26) such as MEMS device is provided within the chamber on the substrate. A plurality of vias (41-46) are provided through the substrate, and each have a structure which facilitates a hermetic seal of a suitable level between opposite sides of the substrate. The vias provide electrical communication from externally of the assembly to the device disposed in the chamber.

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