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    • 10. 发明授权
    • Single electron transistor using porous silicon
    • 单电子晶体管采用多孔硅
    • US06414333B1
    • 2002-07-02
    • US09522603
    • 2000-03-10
    • Jo-won LeeChung-woo KimByong-man KimMoon-kyung Kim
    • Jo-won LeeChung-woo KimByong-man KimMoon-kyung Kim
    • H01L2906
    • H01L29/7613B82Y10/00H01L29/16Y10S438/96Y10S977/937
    • A single electron transistor using porous silicon, which is fabricated by applying porous silicon having a size of several tens of nanometers obtained by electrochemically etching silicon, and a fabrication method thereof, are provided. In the single electron transistor using porous silicon, silicon pores, each of which has a diameter of 5 nm or less, are fabricated by electrochemically etching a silicon on insulator (SOI) substrate having silicon dioxide (SiO2) in its lower portion using an HF-based solution, and serve as islands of a single electron transistor. Also, a source and a drain are formed of silicon on which metal is deposited or silicon doped with impurities. Hence, formation of islands and tunnel barriers is easy, mass production is possible, and the sizes of islands can be controlled by oxidation, so that single electron transistors capable of operating at room temperature can be easily fabricated.
    • 提供了通过使用通过电化学蚀刻硅获得的尺寸为几十纳米的多孔硅制造的使用多孔硅的单电子晶体管及其制造方法。 在使用多孔硅的单电子晶体管中,通过使用HF在其下部电化学蚀刻其下部具有二氧化硅(SiO 2)的绝缘体上硅(SOI)衬底,制造每个具有5nm或更小直径的硅孔。 的溶液,并且用作单电子晶体管的岛。 此外,源极和漏极由其上沉积有金属的硅或掺杂有杂质的硅形成。 因此,岛和隧道壁垒的形成是容易的,批量生产是可能的,并且可以通过氧化来控制岛的尺寸,使得能够容易地制造能够在室温下操作的单电子晶体管。