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1. 发明授权

US08160862B1 Method and apparatus for controlling power in an emulation system 有权
标题翻译：用于在仿真系统中控制功率的方法和装置
公开(公告)号：US08160862B1
公开(公告)日：2012-04-17
申请号：US11950797
申请日：2007-12-05
申请人： Mitchell Grant Poplack , William F. Beausoleil , N. James Tomassetti , Tung-sun Tung
发明人： Mitchell Grant Poplack , William F. Beausoleil , N. James Tomassetti , Tung-sun Tung
IPC分类号： G06F9/455 , G06G7/54
CPC分类号： G06F1/3287 , G06F1/3206 , G06F17/5027 , Y02D10/171
摘要： Method and apparatus for controlling power in an emulation system is described. In one example, power is controlled in a processor-based emulation system coupled to a host computer. A logic design is processed to identify unused resources in the emulation system during an emulation cycle. Power of the unused resources is controlled during emulation of a design under verification corresponding to the logic design by the emulation system. The resources may be identified as being unused during one or more steps of the emulation cycle. The power of the unused resources may be controlled by at least one of: powering down one or more of the unused resources; disabling one or more of the unused resources; freezing inputs to one or more of the unused resources; or setting inputs to one or more of the unused resources to a constant state. In this manner, power consumption of the emulation system is reduced.
摘要翻译：描述了用于在仿真系统中控制功率的方法和装置。在一个示例中，在耦合到主计算机的基于处理器的仿真系统中控制功率。在仿真周期期间，处理逻辑设计以识别仿真系统中的未使用资源。在模拟仿真期间控制未使用资源的功率，该设计在仿真系统对应于逻辑设计的验证下进行。可以在仿真周期的一个或多个步骤期间将资源识别为未被使用。未使用资源的功率可以由以下中的至少一个来控制：关闭一个或多个未使用的资源; 禁用一个或多个未使用的资源; 将输入冻结到一个或多个未使用的资源; 或将一个或多个未使用资源的输入设置为恒定状态。以这种方式，减少了仿真系统的功耗。

2. 发明授权

US07047179B2 Clustered processors in an emulation engine 有权
公开(公告)号：US07047179B2
公开(公告)日：2006-05-16
申请号：US10459340
申请日：2003-06-11
申请人： William F. Beausoleil , Tak-kwong Ng , Helmut Roth , Peter Tannenbaum , N. James Tomassetti
发明人： William F. Beausoleil , Tak-kwong Ng , Helmut Roth , Peter Tannenbaum , N. James Tomassetti
IPC分类号： G06F9/455
CPC分类号： G06F17/5027
摘要： Clusters of processors are interconnected as an emulation engine such that processors share input and data stacks, and the setup and storing of results are done in parallel, but the output of one evaluation unit is connected to the input of the next evaluation unit. A set of ‘cascade’ connections provides access to the intermediate values. By tapping intermediate values from one processor, and feeding them to the next, a significant emulation speedup is achieved.

3. 发明授权

US06618698B1 Clustered processors in an emulation engine 有权
标题翻译：集群处理器在仿真引擎中
公开(公告)号：US06618698B1
公开(公告)日：2003-09-09
申请号：US09373125
申请日：1999-08-12
申请人： William F. Beausoleil , Tak-kwong Ng , Helmut Roth , Peter Tannenbaum , N. James Tomassetti
发明人： William F. Beausoleil , Tak-kwong Ng , Helmut Roth , Peter Tannenbaum , N. James Tomassetti
IPC分类号： G06F9455
CPC分类号： G06F17/5027
摘要： Clusters of processors are interconnected as an emulation engine such that processors share input and data stacks, and the setup and storing of results are done in parallel, but the output of one evaluation unit is connected to the input of the next evaluation unit. A set of ‘cascade’ connections provides access to the intermediate values. By tapping intermediate values from one processor, and feeding them to the next, a significant emulation speedup is achieved.
摘要翻译：处理器集群作为仿真引擎互连，使得处理器共享输入和数据堆栈，并行地完成结果的设置和存储，但是一个评估单元的输出连接到下一个评估单元的输入。一组“级联”连接提供对中间值的访问。通过点击一个处理器的中间值，并将它们馈送到下一个处理器，可以实现显着的仿真加速。

4. 发明授权

US08296121B2 Method and apparatus for controlling power in an emulation system 有权
标题翻译：用于在仿真系统中控制功率的方法和装置
公开(公告)号：US08296121B2
公开(公告)日：2012-10-23
申请号：US11789677
申请日：2007-04-25
申请人： Mitchell G. Poplack , William F. Beausoleil , Tung-Sun Tung , James Tomassetti
发明人： Mitchell G. Poplack , William F. Beausoleil , Tung-Sun Tung , James Tomassetti
IPC分类号： G06F9/455 , G06F1/00 , G06G7/54 , G01K1/00 , G01K3/00 , G01K5/00 , G01K7/00 , G01K9/00 , G01K11/00 , G01K1/08 , G01K13/00 , G01K17/00
CPC分类号： G06F1/3203 , G06F1/206 , G06F1/3296 , G06F2200/201 , Y02D10/16 , Y02D10/172
摘要： Method and apparatus for controlling power in an emulation system are described. In one example, a first interface is configured to receive requirement information for a logic module to be emulated from a host computer system. The requirement information includes at least one of a power requirement or a thermal requirement. A second interface is configured to receive measurement data from sensors in the emulation system. A controller is configured to control at least one of a synchronization system, a power regulation system, or a thermal system in the emulation system in response to the requirement information and the measurement data to reduce power load of the emulation system.
摘要翻译：描述了用于在仿真系统中控制功率的方法和装置。在一个示例中，第一接口被配置为接收要从主计算机系统仿真的逻辑模块的需求信息。需求信息包括功率需求或热要求中的至少一个。第二接口被配置为从仿真系统中的传感器接收测量数据。控制器被配置为响应于需求信息和测量数据来控制仿真系统中的同步系统，功率调节系统或热系统中的至少一个，以减少仿真系统的功率负载。

5. 发明授权

US06491205B1 Assembly of multi-chip modules using eutectic solders 失效
标题翻译：使用共晶焊料组装多芯片模块
公开(公告)号：US06491205B1
公开(公告)日：2002-12-10
申请号：US09960021
申请日：2001-09-21
申请人： Chon C. Lei , Jac A. Burke , William F. Beausoleil , N. James Tomassetti , Lawrence A. Thomas , Tak-kwong Ng , Michael Kessler
发明人： Chon C. Lei , Jac A. Burke , William F. Beausoleil , N. James Tomassetti , Lawrence A. Thomas , Tak-kwong Ng , Michael Kessler
IPC分类号： B23K3102
CPC分类号： H01L24/80 , B23K1/008 , B23K35/0244 , B23K35/025 , B23K35/26 , B23K2101/42 , H01L2224/13111 , H01L2924/01005 , H01L2924/01006 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/15787 , H01L2924/19041 , H05K3/26 , H05K3/3463 , H05K3/3484 , H05K2201/094 , H05K2201/10674 , H05K2201/10689 , H05K2201/10734 , H05K2203/047 , H05K2203/0786 , H05K2203/1476 , H01L2924/00
摘要： Chips requiring high temperature reflow for attachment to a module substrate are attached first and then a eutectic water soluble solder paste and/or water soluble flux is dispensed on both the TSOP and the PBGA chip pads instead of using the paste screening techniques. The dispensing is done by injecting solder on the solder sites individually. Characteristics of the solder paste used is that it must be fluid enough to be injected onto the individual sites yet have enough body that it remains in place and does not run from site to site once dispensed. A paste capable of providing such characteristics is one having: a ) a very fine particle size in the range of 400 to 500 mesh and preferably between 400 and 450 mesh; b) a low viscosity (below 500 k centerpoise and preferably between 425 to 375 cps); and c) a solid content of 86% or lower and preferably between 84 and 80%. The chips to be joined to the module using low temperature module joining are then placed on the module substrate surface and then put in an oven for reflow to attach these chips to the surface. After the joining process, the modules are cleaned by spraying deionized water on them to remove any flux or solder residues and the modules are electrically tested to determine if the joining process has resulted in connection with the proper mechanical and electrical characteristics.
摘要翻译：首先附加需要高温回流的芯片以附着于模块基板，然后将共晶的水溶性焊膏和/或水溶性助焊剂分配在TSOP和PBGA芯片焊盘上，而不是使用糊状物筛选技术。分配是通过在焊料点上单独注入焊料来完成的。所使用的焊膏的特征在于其必须足够流体注入到各个位置上，但具有足够的体积，其保持在适当位置，并且一旦分配就不会从现场运行。能够提供这种特性的糊料是具有：a）在400-500目范围内，优选400-450目的非常细的粒度; b）低粘度（低于500k中心，优选在425至375cps之间）; 和c）固体含量为86％以下，优选为84〜80％。然后将使用低温模块接合的与模块接合的芯片放置在模块基板表面上，然后放入烘箱中以进行回流以将这些芯片附接到表面。在连接过程之后，通过在其上喷洒去离子水来清洁模块以除去任何焊剂或焊料残留物，并且模块被电测试以确定接合过程是否已经导致与适当的机械和电气特性相关联。

6. 发明申请

US20080270105A1 Method and apparatus for controlling power in an emulation system 有权
标题翻译：用于在仿真系统中控制功率的方法和装置
公开(公告)号：US20080270105A1
公开(公告)日：2008-10-30
申请号：US11789677
申请日：2007-04-25
申请人： Mitchell Grant Poplack , William F. Beausoleil , N. James Tomassetti , Tung-sun Tung
发明人： Mitchell Grant Poplack , William F. Beausoleil , N. James Tomassetti , Tung-sun Tung
IPC分类号： G06F9/445
CPC分类号： G06F1/3203 , G06F1/206 , G06F1/3296 , G06F2200/201 , Y02D10/16 , Y02D10/172
摘要： Method and apparatus for controlling power in an emulation system are described. In one example, a first interface is configured to receive requirement information for a logic module to be emulated from a host computer system. The requirement information includes at least one of a power requirement or a thermal requirement. A second interface is configured to receive measurement data from sensors in the emulation system. A controller is configured to control at least one of a synchronization system, a power regulation system, or a thermal system in the emulation system in response to the requirement information and the measurement data to reduce power load of the emulation system.
摘要翻译：描述了用于在仿真系统中控制功率的方法和装置。在一个示例中，第一接口被配置为接收要从主计算机系统仿真的逻辑模块的需求信息。需求信息包括功率需求或热要求中的至少一个。第二接口被配置为从仿真系统中的传感器接收测量数据。控制器被配置为响应于需求信息和测量数据来控制仿真系统中的同步系统，功率调节系统或热系统中的至少一个，以减少仿真系统的功率负载。

7. 发明授权

US06774475B2 Vertically stacked memory chips in FBGA packages 失效
标题翻译： FBGA封装中垂直堆叠的存储芯片
公开(公告)号：US06774475B2
公开(公告)日：2004-08-10
申请号：US10056256
申请日：2002-01-24
申请人： Edmund D. Blackshear , William F. Beausoleil , N. James Tomassetti
发明人： Edmund D. Blackshear , William F. Beausoleil , N. James Tomassetti
IPC分类号： H01L2302
CPC分类号： G11C5/04 , H01L24/73 , H01L25/105 , H01L2224/16225 , H01L2224/32225 , H01L2224/48227 , H01L2224/48465 , H01L2224/73265 , H01L2225/1005 , H01L2225/107 , H01L2225/1094 , H01L2924/10253 , H01L2924/14 , H01L2924/15311 , H01L2924/15331 , H05K1/144 , H01L2924/00 , H01L2924/00012
摘要： A method and structure for a memory structure that includes a plurality of substrates stacked one on another is disclosed. The invention includes a plurality of connectors connecting the substrates to one another and a plurality of memory chip packages mounted on the substrates. The connectors have a size sufficient to form a gap between the substrates. The gap is larger than a height of the memory chip packages.
摘要翻译：公开了一种包括多个彼此层叠的基板的存储器结构的方法和结构。本发明包括将基板彼此连接的多个连接器和安装在基板上的多个存储芯片封装。连接器具有足以在基板之间形成间隙的尺寸。该间隙大于存储芯片封装的高度。

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