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1. 发明授权

US08296121B2 Method and apparatus for controlling power in an emulation system 有权
标题翻译：用于在仿真系统中控制功率的方法和装置
公开(公告)号：US08296121B2
公开(公告)日：2012-10-23
申请号：US11789677
申请日：2007-04-25
申请人： Mitchell G. Poplack , William F. Beausoleil , Tung-Sun Tung , James Tomassetti
发明人： Mitchell G. Poplack , William F. Beausoleil , Tung-Sun Tung , James Tomassetti
IPC分类号： G06F9/455 , G06F1/00 , G06G7/54 , G01K1/00 , G01K3/00 , G01K5/00 , G01K7/00 , G01K9/00 , G01K11/00 , G01K1/08 , G01K13/00 , G01K17/00
CPC分类号： G06F1/3203 , G06F1/206 , G06F1/3296 , G06F2200/201 , Y02D10/16 , Y02D10/172
摘要： Method and apparatus for controlling power in an emulation system are described. In one example, a first interface is configured to receive requirement information for a logic module to be emulated from a host computer system. The requirement information includes at least one of a power requirement or a thermal requirement. A second interface is configured to receive measurement data from sensors in the emulation system. A controller is configured to control at least one of a synchronization system, a power regulation system, or a thermal system in the emulation system in response to the requirement information and the measurement data to reduce power load of the emulation system.
摘要翻译：描述了用于在仿真系统中控制功率的方法和装置。在一个示例中，第一接口被配置为接收要从主计算机系统仿真的逻辑模块的需求信息。需求信息包括功率需求或热要求中的至少一个。第二接口被配置为从仿真系统中的传感器接收测量数据。控制器被配置为响应于需求信息和测量数据来控制仿真系统中的同步系统，功率调节系统或热系统中的至少一个，以减少仿真系统的功率负载。

2. 发明授权

US08090568B2 Hardware emulator having a variable input primitive 失效
标题翻译：具有可变输入原语的硬件仿真器
公开(公告)号：US08090568B2
公开(公告)日：2012-01-03
申请号：US11358527
申请日：2006-02-21
申请人： William F. Beausoleil , Beshara G. Elmufdi
发明人： William F. Beausoleil , Beshara G. Elmufdi
IPC分类号： G06F9/455
CPC分类号： G06F11/261
摘要： A hardware emulator having a first primitive for evaluating functions having a first input width and a second primitive, coupled to the first primitive, for evaluating a function having a second input width, where the first input width is unequal to the second input width. The use of either the first primitive or the second primitive is selected depending upon the function to be evaluated.
摘要翻译：一种硬件仿真器，具有用于评估具有第一输入宽度的功能的第一原语和耦合到第一基元的第二原语，用于评估具有第二输入宽度的函数，其中第一输入宽度不等于第二输入宽度。根据要评估的功能来选择使用第一原语或第二原语。

3. 发明授权

US07089538B1 High speed software driven emulator comprised of a plurality of emulation processors with a method to allow memory read/writes without interrupting the emulation 有权
标题翻译：高速软件驱动的仿真器由多个仿真处理器组成，具有允许存储器读/写而不中断仿真的方法
公开(公告)号：US07089538B1
公开(公告)日：2006-08-08
申请号：US09655596
申请日：2000-09-06
申请人： William F. Beausoleil , R. Bryan Cook , Tak-kwong Ng , Helmut Roth , Peter Tannenbaum , Lawrence A. Thomas , Norton J. Tomassetti
发明人： William F. Beausoleil , R. Bryan Cook , Tak-kwong Ng , Helmut Roth , Peter Tannenbaum , Lawrence A. Thomas , Norton J. Tomassetti
IPC分类号： G06F9/44
CPC分类号： G06F17/5022
摘要： A software driven emulator in which the stored emulation program for a processor module is compiled to include a code bit or bits in the emulation instruction step sequence that is decoded as main data memory disable command. Thus, once in each emulation program cycle, the memory controller disables the main data memories on the module, and allows the maintenance bus to read or write data to these memories.
摘要翻译：一种软件驱动的仿真器，其中存储用于处理器模块的存储的仿真程序被编译为包括被解码为主数据存储器禁止命令的仿真指令步骤序列中的代码位或位。因此，在每个仿真程序周期中，存储器控制器禁用模块上的主数据存储器，并允许维护总线读取或写入数据到这些存储器。

4. 发明授权

US06491205B1 Assembly of multi-chip modules using eutectic solders 失效
标题翻译：使用共晶焊料组装多芯片模块
公开(公告)号：US06491205B1
公开(公告)日：2002-12-10
申请号：US09960021
申请日：2001-09-21
申请人： Chon C. Lei , Jac A. Burke , William F. Beausoleil , N. James Tomassetti , Lawrence A. Thomas , Tak-kwong Ng , Michael Kessler
发明人： Chon C. Lei , Jac A. Burke , William F. Beausoleil , N. James Tomassetti , Lawrence A. Thomas , Tak-kwong Ng , Michael Kessler
IPC分类号： B23K3102
CPC分类号： H01L24/80 , B23K1/008 , B23K35/0244 , B23K35/025 , B23K35/26 , B23K2101/42 , H01L2224/13111 , H01L2924/01005 , H01L2924/01006 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/15787 , H01L2924/19041 , H05K3/26 , H05K3/3463 , H05K3/3484 , H05K2201/094 , H05K2201/10674 , H05K2201/10689 , H05K2201/10734 , H05K2203/047 , H05K2203/0786 , H05K2203/1476 , H01L2924/00
摘要： Chips requiring high temperature reflow for attachment to a module substrate are attached first and then a eutectic water soluble solder paste and/or water soluble flux is dispensed on both the TSOP and the PBGA chip pads instead of using the paste screening techniques. The dispensing is done by injecting solder on the solder sites individually. Characteristics of the solder paste used is that it must be fluid enough to be injected onto the individual sites yet have enough body that it remains in place and does not run from site to site once dispensed. A paste capable of providing such characteristics is one having: a ) a very fine particle size in the range of 400 to 500 mesh and preferably between 400 and 450 mesh; b) a low viscosity (below 500 k centerpoise and preferably between 425 to 375 cps); and c) a solid content of 86% or lower and preferably between 84 and 80%. The chips to be joined to the module using low temperature module joining are then placed on the module substrate surface and then put in an oven for reflow to attach these chips to the surface. After the joining process, the modules are cleaned by spraying deionized water on them to remove any flux or solder residues and the modules are electrically tested to determine if the joining process has resulted in connection with the proper mechanical and electrical characteristics.
摘要翻译：首先附加需要高温回流的芯片以附着于模块基板，然后将共晶的水溶性焊膏和/或水溶性助焊剂分配在TSOP和PBGA芯片焊盘上，而不是使用糊状物筛选技术。分配是通过在焊料点上单独注入焊料来完成的。所使用的焊膏的特征在于其必须足够流体注入到各个位置上，但具有足够的体积，其保持在适当位置，并且一旦分配就不会从现场运行。能够提供这种特性的糊料是具有：a）在400-500目范围内，优选400-450目的非常细的粒度; b）低粘度（低于500k中心，优选在425至375cps之间）; 和c）固体含量为86％以下，优选为84〜80％。然后将使用低温模块接合的与模块接合的芯片放置在模块基板表面上，然后放入烘箱中以进行回流以将这些芯片附接到表面。在连接过程之后，通过在其上喷洒去离子水来清洁模块以除去任何焊剂或焊料残留物，并且模块被电测试以确定接合过程是否已经导致与适当的机械和电气特性相关联。

5. 发明授权

US6035117A Tightly coupled emulation processors 失效
标题翻译：紧耦合仿真处理器
公开(公告)号：US6035117A
公开(公告)日：2000-03-07
申请号：US52732
申请日：1998-03-31
申请人： William F. Beausoleil , Roy G. Musselman , Tak-Kwong Ng , Helmut Roth
发明人： William F. Beausoleil , Roy G. Musselman , Tak-Kwong Ng , Helmut Roth
IPC分类号： G06F15/16 , G06F11/22 , G06F17/50 , G06F9/455
CPC分类号： G06F17/5027
摘要： In an emulation system, the emulation processors are grouped in clusters which are capable of interchanging information between both input memory stacks and data memory stacks associated with each of the processor elements. This capability significantly enhances the performance of emulation engines and, in particular, it provides a mechanism for emulation of memory array elements in computer systems in a more efficient and faster manner.
摘要翻译：在仿真系统中，仿真处理器被分组成能够在输入存储器堆栈和与每个处理器元件相关联的数据存储器堆栈之间交换信息的簇。该功能显着提高了仿真引擎的性能，特别是提供了一种以更有效和更快速的方式在计算机系统中仿真存储器阵列元件的机制。

6. 发明授权

US4078254A Hierarchical memory with dedicated high speed buffers 失效
标题翻译：具有专用高速缓冲器的分层存储器
公开(公告)号：US4078254A
公开(公告)日：1978-03-07
申请号：US427889
申请日：1973-12-26
申请人： William F. Beausoleil , Byron E. Phelps
发明人： William F. Beausoleil , Byron E. Phelps
IPC分类号： G06F12/08 , G06F15/16 , G06F13/00
CPC分类号： G06F12/0811 , G06F15/16
摘要： A hierarchical memory for a data processing system which is comprised of a number of different independent storage modules and a main memory backing store. Each data handling element of the system has an independent storage module associated with it as a dedicated buffer. A larger high speed main storage is used as a backing store. Each data handling element presumes that any data it needs is located in its dedicated buffer. If the data is not in the dedicated buffer, the data handling element scans all the other buffers until the desired data is located.
摘要翻译：用于数据处理系统的分层存储器，其由许多不同的独立存储模块和主存储器后备存储器组成。系统的每个数据处理元件具有与其相关联的独立存储模块作为专用缓冲器。较大的高速主存储器用作后备存储。每个数据处理元素假定其所需的任何数据位于其专用缓冲区中。如果数据不在专用缓冲区中，则数据处理元件将扫描所有其他缓冲区，直到找到所需的数据。

7. 发明授权

US4068304A Storage hierarchy performance monitor 失效
标题翻译：存储层次结构性能监视器
公开(公告)号：US4068304A
公开(公告)日：1978-01-10
申请号：US320222
申请日：1973-01-02
申请人： William F. Beausoleil , Klim Maling
发明人： William F. Beausoleil , Klim Maling
IPC分类号： G06F11/34 , G06F12/08 , G06F1/00
CPC分类号： G06F12/0897 , G06F11/3461 , G06F11/3409 , G06F11/3419 , G06F11/348 , G06F11/3485 , G06F2201/88
摘要： A machine for emulating the results of multi-level storage hierarchies by providing an associative storage directory for each level other than main storage. Address sequences to drive the directories are derived from a single level digital computer by recording sequences on tape or by dynamically monitoring computer operation. Individual addresses are skewed an appropriate number of bits depending upon the block size and the number of classes being emulated at any given level, so that those bits of the monitored address indicating segment name are presented to the directory for comparison with its contents in the appropriate class. Means are provided for transposing the segment and class names at higher levels to segment and class names at lower levels. Counting means are provided to record hits, misses and pushes at various levels in order to provide data for calculating average access times for the particular multi-level storage hierarchy being emulated.
摘要翻译：一种用于通过为除主存储之外的每个级别提供关联存储目录来模拟多级存储层次结果的机器。通过在磁带上记录序列或通过动态监视计算机操作，从单级数字计算机派生用于驱动目录的地址序列。单个地址根据块大小和在任何给定级别仿真的类的数量而偏移适当数量的位，使得指示段名的监视地址的那些位被提供给目录以与其内容在适当的位置进行比较类。提供了将较高级别的段和类名称转换为较低级别的段和类名的方法。提供计数装置以记录各种级别的命中，未命中和推送，以提供用于计算正在仿真的特定多级存储层级的平均访问时间的数据。

8. 发明授权

US07904288B1 Hardware emulator having a variable input emulation group 有权
标题翻译：具有可变输入仿真组的硬件仿真器
公开(公告)号：US07904288B1
公开(公告)日：2011-03-08
申请号：US11593295
申请日：2006-11-06
申请人： William F. Beausoleil , Beshara G. Elmufdi , Mitchell G. Poplack , Tai Su
发明人： William F. Beausoleil , Beshara G. Elmufdi , Mitchell G. Poplack , Tai Su
IPC分类号： G06F9/455
CPC分类号： G06F17/5022 , G06F17/5027
摘要： A hardware emulator having a variable input emulation group is described. Each emulation group comprises two or more processors, where one of the processors (a first processor) is coupled to a data input selector and another one of the processors (a second processor) processes a first amount of data received from a data array. The data input selector receives the first amount of data and a second amount of data from the data array, and selects a third amount of data from among the first and second amounts of data. The third amount of data is provided to the first processor for evaluation.
摘要翻译：描述具有可变输入仿真组的硬件仿真器。每个仿真组包括两个或多个处理器，其中一个处理器（第一处理器）耦合到数据输入选择器，另一个处理器（第二处理器）处理从数据阵列接收的第一数据量。数据输入选择器从数据阵列接收第一数据量和第二数据量，并从第一和第二数据量中选择第三数据量。将第三数据量提供给第一处理器用于评估。

9. 发明授权

US07827023B2 Method and apparatus for increasing the efficiency of an emulation engine 有权
标题翻译：提高仿真引擎效率的方法和装置
公开(公告)号：US07827023B2
公开(公告)日：2010-11-02
申请号：US11344766
申请日：2006-02-01
申请人： William F. Beausoleil , Beshara G. Elmufdi , Mitchell G. Poplack , Tai Su
发明人： William F. Beausoleil , Beshara G. Elmufdi , Mitchell G. Poplack , Tai Su
IPC分类号： G06F17/50 , G06F9/455 , G06F13/36 , G06F9/44 , G06F9/45 , H03K17/693 , H03K19/00
CPC分类号： G06F17/5022
摘要： A method and apparatus for a memory efficient hardware emulator. The emulator comprises a plurality of processor dusters having data within the duster is stored in at least one data array, where the at least one data array comprises a plurality of sub-arrays. The sub-arrays that are not of uniform size (e.g., the size of each sub-array is determined by the probability that a particular sub-array will be accessed by the processor during a future emulation step). For example, at least one first sub-array is equal in depth to instruction memory within a processor (i.e., equal to the number of instructions in an emulation cycle), and the remaining sub-arrays are a fractional depth of the first sub-array.
摘要翻译：一种用于存储器高效硬件仿真器的方法和装置。模拟器包括多个处理器喷粉器，其中除尘器内的数据被存储在至少一个数据阵列中，其中至少一个数据阵列包括多个子阵列。不均匀大小的子阵列（例如，每个子阵列的大小由在未来仿真步骤期间由处理器访问特定子阵列的概率确定）。例如，至少一个第一子阵列在处理器内的深度与指令存储器相等（即，等于仿真周期中的指令数），而其余的子阵列是第一子阵列的分数深度，数组。

10. 发明申请

US20080270105A1 Method and apparatus for controlling power in an emulation system 有权
标题翻译：用于在仿真系统中控制功率的方法和装置
公开(公告)号：US20080270105A1
公开(公告)日：2008-10-30
申请号：US11789677
申请日：2007-04-25
申请人： Mitchell Grant Poplack , William F. Beausoleil , N. James Tomassetti , Tung-sun Tung
发明人： Mitchell Grant Poplack , William F. Beausoleil , N. James Tomassetti , Tung-sun Tung
IPC分类号： G06F9/445
CPC分类号： G06F1/3203 , G06F1/206 , G06F1/3296 , G06F2200/201 , Y02D10/16 , Y02D10/172
摘要： Method and apparatus for controlling power in an emulation system are described. In one example, a first interface is configured to receive requirement information for a logic module to be emulated from a host computer system. The requirement information includes at least one of a power requirement or a thermal requirement. A second interface is configured to receive measurement data from sensors in the emulation system. A controller is configured to control at least one of a synchronization system, a power regulation system, or a thermal system in the emulation system in response to the requirement information and the measurement data to reduce power load of the emulation system.
摘要翻译：描述了用于在仿真系统中控制功率的方法和装置。在一个示例中，第一接口被配置为接收要从主计算机系统仿真的逻辑模块的需求信息。需求信息包括功率需求或热要求中的至少一个。第二接口被配置为从仿真系统中的传感器接收测量数据。控制器被配置为响应于需求信息和测量数据来控制仿真系统中的同步系统，功率调节系统或热系统中的至少一个，以减少仿真系统的功率负载。

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