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1. 发明申请

US20060102725A1 Identification of units in customized production 有权
标题翻译：确定定制生产中的单位
公开(公告)号：US20060102725A1
公开(公告)日：2006-05-18
申请号：US11253488
申请日：2005-10-18
申请人： James Culp , Kwan Ho , Shiva Sambu , Srinivas Kaza , Graig Farren , Samuel Kass , Sergey Nikolsky
发明人： James Culp , Kwan Ho , Shiva Sambu , Srinivas Kaza , Graig Farren , Samuel Kass , Sergey Nikolsky
IPC分类号： G06K7/10
CPC分类号： G06K19/06037 , B29C64/135 , B33Y80/00 , G06K7/10 , G06K7/1097 , G06K19/06028 , G06K2019/06225
摘要： Systems and methods are disclosed for identifying a mass-customized part by encoding a part identification into a multi-dimensional bar code; and using a stereolithography apparatus (SLA) to make the part with multi-dimensional bar code embedded therein.
摘要翻译：公开了用于通过将零件识别编码为多维条形码来识别质量定制部件的系统和方法; 并使用立体光刻设备（SLA）制作嵌入其中的多维条形码的部分。

2. 发明申请

US20050150709A1 Energy absorbing propeller shaft system 有权
标题翻译：吸能螺旋桨轴系
公开(公告)号：US20050150709A1
公开(公告)日：2005-07-14
申请号：US10754422
申请日：2004-01-09
申请人： Nicolaos Tapazoglou , Hai Gu , Gerald Burke , Troy Cornell , James Culp , Mark Kirschmann , Douglas Nieset
发明人： Nicolaos Tapazoglou , Hai Gu , Gerald Burke , Troy Cornell , James Culp , Mark Kirschmann , Douglas Nieset
IPC分类号： B60K17/22 , F16C3/02 , B60K17/24
CPC分类号： B60K17/22 , F16C3/02
摘要： A dual-sectioned automotive propeller shaft features a weakened area in a first section. Under an axial load, the first section buckles transversely to a longitudinal axis of the shaft to absorb substantially all of the energy exerted against the shaft. A second section of the shaft is thereby isolated from consequences of the axial load enabling its placement and proximity to other components mounted to the undercarriage of the vehicle.
摘要翻译：双分段汽车传动轴在第一部分具有弱化区域。在轴向负载下，第一部分横向于轴的纵向轴线弯曲，以吸收基本上施加在轴上的所有能量。因此，轴的第二部分与轴向负载的后果隔离，使得其能够安置和接近安装到车辆的底架上的其他部件。

3. 发明申请

US20070212863A1 Double Exposure Double Resist Layer Process For Forming Gate Patterns 失效
标题翻译：双重曝光双抗蚀层工艺形成栅格图案
公开(公告)号：US20070212863A1
公开(公告)日：2007-09-13
申请号：US11308106
申请日：2006-03-07
申请人： Timothy Brunner , James Culp , Lars Liebmann
发明人： Timothy Brunner , James Culp , Lars Liebmann
IPC分类号： H01L21/467
CPC分类号： H01L21/76895 , H01L21/0274 , H01L21/28035 , H01L21/28123
摘要： A method of forming a planar CMOS transistor divides the step of forming the gate layer into a first step of patterning a resist layer with a first portion of the gate layer pattern and then etching the polysilicon with the pattern of the gates. A second step patterns a second resist layer with the image of the gate pads and local interconnect and then etching the polysilicon with the pattern of the gate pads and local interconnect, thereby reducing the number of diffraction and other cross-talk from different exposed areas.
摘要翻译：形成平面CMOS晶体管的方法将形成栅极层的步骤分成用栅极层图案的第一部分图案化抗蚀剂层，然后用栅极图案蚀刻多晶硅的第一步骤。第二步利用栅极焊盘和局部互连的图像来形成第二抗蚀剂层，然后用栅极焊盘和局部互连的图案蚀刻多晶硅，从而减少来自不同曝光区域的衍射数量和其它串扰。

4. 发明申请

US20070106968A1 OPC TRIMMING FOR PERFORMANCE 失效
公开(公告)号：US20070106968A1
公开(公告)日：2007-05-10
申请号：US11164044
申请日：2005-11-08
申请人： James Culp , Lars Liebmann , Rajeev Malik , K. Paul Muller , Shreesh Narasimha , Stephen Runyon , Patrick Williams
发明人： James Culp , Lars Liebmann , Rajeev Malik , K. Paul Muller , Shreesh Narasimha , Stephen Runyon , Patrick Williams
IPC分类号： G06F17/50
CPC分类号： G06F17/5068
摘要： An iterative timing analysis is analytically performed before a chip is fabricated, based on a methodology using optical proximity correction techniques for shortening the gate lengths and adjusting metal line widths and proximity distances of critical time sensitive devices. The additional mask is used as a selective trim to form shortened gate lengths or wider metal lines for the selected, predetermined transistors, affecting the threshold voltages and the RC time constants of the selected devices. Marker shapes identify a predetermined subgroup of circuitry that constitutes the devices in the critical timing path. The analysis methodology is repeated as often as needed to improve the timing of the circuit with shortened designed gate lengths and modified RC timing constants until manufacturing limits are reached. A mask is made for the selected critical devices using OPC techniques.
摘要翻译：基于使用光学邻近校正技术的方法，在制造芯片之前分析地执行迭代时序分析，以缩短栅极长度并调整关键时间敏感器件的金属线宽度和接近距离。附加掩模用作选择性修整以形成用于所选择的预定晶体管的缩短的栅极长度或更宽的金属线，影响所选器件的阈值电压和RC时间常数。标记形状识别构成关键定时路径中的装置的电路的预定子组。根据需要经常重复分析方法，以在缩短设计的栅极长度和修改的RC定时常数的情况下改善电路的时序，直到达到制造限值。使用OPC技术为所选的关键设备制作掩码。

5. 发明申请

US20060029515A1 Integrated blood handling system having active gas removal system and method of use 失效
标题翻译：具有活性气体去除系统和使用方法的集成血液处理系统
公开(公告)号：US20060029515A1
公开(公告)日：2006-02-09
申请号：US11236269
申请日：2005-09-26
申请人： Steven Stringer , Kevin Hultquist , Mehrdad Farhangnia , Ben Brian , Fred Linker , James Culp , Jean-Pierre Dueri , Thomas Afzal
发明人： Steven Stringer , Kevin Hultquist , Mehrdad Farhangnia , Ben Brian , Fred Linker , James Culp , Jean-Pierre Dueri , Thomas Afzal
IPC分类号： A61M1/14
CPC分类号： A61M1/3626 , A61M1/1006 , A61M1/101 , A61M1/1013 , A61M1/1025 , A61M1/262 , A61M1/267 , A61M1/3606 , A61M1/3627 , A61M1/3666 , Y10S261/28
摘要： Apparatus and methods for pumping and oxygenating blood are provided that include a gas removal system. An integrated blood processing unit is provided in which a gas removal/blood filter, pump and blood oxygenation element are mounted within a common housing. The gas removal system includes a sensor mounted on the housing to sense the presence of gas, and a valve is operably coupled to the sensor to evacuate gas from the system when the sensor detects an accumulation of gas.
摘要翻译：提供用于泵送和充氧血液的装置和方法，其包括气体去除系统。提供了一种集成血液处理单元，其中气体去除/血液过滤器，泵和血氧元件安装在公共壳体内。气体去除系统包括安装在壳体上以感测气体存在的传感器，并且当传感器检测到气体积聚时，阀可操作地耦合到传感器以从系统排出气体。

6. 发明申请

US20050261571A1 3-D ultrasound navigation during radio-frequency ablation 审中-公开
标题翻译：射频消融过程中的三维超声导航
公开(公告)号：US20050261571A1
公开(公告)日：2005-11-24
申请号：US10850845
申请日：2004-05-21
申请人： Nathaniel Willis , James Culp , Vincent Sullivan
发明人： Nathaniel Willis , James Culp , Vincent Sullivan
IPC分类号： A61B8/08 , A61B18/12 , A61B5/05
CPC分类号： A61B8/0833 , A61B8/0841
摘要： System and method for simultaneously tracking a position of a medical device and ablating a tissue within a body. The system includes a power supply, a navigation device, and a control circuit. The power supply generates a current that is suitable for ablating tissue, such as heart tissue. The navigation device establishes a three-dimensional reference coordinate system and identifies a location of an energy delivery device in relation to the established coordinate system. The control circuit switches or alternates between activating the power supply and acquiring ultrasound data that identifies the location of the medical device within the established coordinate system.
摘要翻译：用于同时跟踪医疗装置的位置并消融身体内的组织的系统和方法。该系统包括电源，导航装置和控制电路。电源产生适合于消融诸如心脏组织的组织的电流。导航装置建立三维参考坐标系，并且相对于所建立的坐标系来识别能量输送装置的位置。控制电路在激活电源并获取标识医疗设备在所建立的坐标系中的位置的超声数据之间切换或交替。

7. 发明申请

US20060270268A1 DESIGN VERIFICATION 失效
标题翻译：设计验证
公开(公告)号：US20060270268A1
公开(公告)日：2006-11-30
申请号：US10908786
申请日：2005-05-26
申请人： James Bruce , James Culp , John Nickel , Jacek Smolinski
发明人： James Bruce , James Culp , John Nickel , Jacek Smolinski
IPC分类号： H01R4/24
CPC分类号： G06F17/5081
摘要： A design verification method, including (a) providing in a design a design electrically conducting line and a design contact region being in direct physical contact with the design electrically conducting line; (b) modeling a simulated electrically conducting line of the design electrically conducting line; (c) simulating a possible contact region of the design contact region, wherein the design contact region and the possible contact region are not identical; and (d) determining that the design electrically conducting line and the design contact region are potentially defective if an interfacing surface area of the simulated electrically conducting line and the possible contact region is less than a pre-specified value.
摘要翻译：一种设计验证方法，包括（a）在设计中提供与设计导电线直接物理接触的设计导电线和设计接触区; （b）对设计导电线的模拟导电线进行建模; （c）模拟设计接触区域的可能的接触区域，其中设计接触区域和可能的接触区域不相同; 以及（d）如果所述模拟导电线路和所述可能接触区域的接口表面积小于预定值，则确定所述设计导电线路和所述设计接触区域具有潜在的缺陷。

8. 发明申请

US20050117795A1 Mask inspection process accounting for mask writer proximity correction 失效
标题翻译：掩模检查过程负责掩模写入器邻近校正
公开(公告)号：US20050117795A1
公开(公告)日：2005-06-02
申请号：US10725854
申请日：2003-12-02
申请人： Karen Badger , James Culp , Azalia Krasnoperova
发明人： Karen Badger , James Culp , Azalia Krasnoperova
IPC分类号： G03F7/20 , G06F17/50 , G06K9/00
CPC分类号： G03F7/70441
摘要： A mask inspection method and system. Provided is a mask fabrication database describing geometrical shapes S to be printed as part of a mask pattern on a reticle to fabricate a mask through use of a mask fabrication tooling. The shapes S appear on the mask as shapes S′ upon being printed. At least one of the shapes S′ may be geometrically distorted relative to a corresponding at least one of the shapes S due to a lack of precision in the mask fabrication tooling. Also provided is a mask inspection database to be used for inspecting the mask after the mask has been fabricated by the mask fabrication tooling. The mask inspection database describes shapes S″ approximating the shapes S′. A geometric distortion between the shapes S′ and S″ is less than a corresponding geometric distortion between the shapes S′ and S.
摘要翻译：面罩检查方法和系统。提供了一种掩模制造数据库，其描述要在掩模版上作为掩模图案的一部分打印的几何形状S，以通过使用掩模制造工具来制造掩模。形状S在印刷时作为形状S'出现在掩模上。由于在掩模制造工具中缺乏精度，至少一种形状S'可能相对于形状S中的相应的至少一个形状几何失真。还提供了掩模检查数据库，用于在通过掩模制造工具制造掩模之后检查掩模。掩模检查数据库描述形状S'近似形状S'。形状S'和S“之间的几何变形小于形状S'和S之间的对应的几何变形。

9. 发明申请

US20110026806A1 Detecting Chip Alterations with Light Emission 有权
标题翻译：用光发射检测芯片变化
公开(公告)号：US20110026806A1
公开(公告)日：2011-02-03
申请号：US12512168
申请日：2009-07-30
申请人： Kerry Bernstein , James Culp , David F. Heidel , Dirk Pfeiffer , Anthony D. Polson , Peilin Song , Franco Stellari , Robert L. Wisnieff
发明人： Kerry Bernstein , James Culp , David F. Heidel , Dirk Pfeiffer , Anthony D. Polson , Peilin Song , Franco Stellari , Robert L. Wisnieff
IPC分类号： G03F9/00 , G06F19/00
CPC分类号： G01R31/311
摘要： An emission map of a circuit to be tested for alterations is obtained by measuring the physical circuit to be tested. An emission map of a reference circuit is obtained by measuring a physical reference circuit or by simulating the emissions expected from the reference circuit. The emission map of the circuit to be tested is compared with the emission map of the reference circuit, to determine presence of alterations in the circuit to be tested, as compared to the reference circuit.
摘要翻译：通过测量要测试的物理电路来获得待测试电路的发射图。通过测量物理参考电路或通过模拟从参考电路预期的发射来获得参考电路的发射图。与参考电路相比，要测试的电路的发射图与参考电路的发射图进行比较，以确定待测电路中的变化的存在。

10. 发明申请

US20070220476A1 Multilayer OPC for Design Aware Manufacturing 失效
标题翻译：用于设计感知制造的多层OPC
公开(公告)号：US20070220476A1
公开(公告)日：2007-09-20
申请号：US11306750
申请日：2006-01-10
申请人： Maharaj Mukherjee , James Culp , Lars Liebmann , Scott Mansfield
发明人： Maharaj Mukherjee , James Culp , Lars Liebmann , Scott Mansfield
IPC分类号： G06F17/50
CPC分类号： G03F1/36
摘要： A method is provided for designing a mask layout for an integrated circuit that ensures proper functional interaction among circuit features by including functional inter-layer and intra-layer constraints on the wafer. The functional constraints used according to the present invention are applied among the simulated wafer images to ensure proper functional interaction, while relaxing or eliminating the EPE constraints on the location of the wafer images.
摘要翻译：提供了一种用于设计用于集成电路的掩模布局的方法，其通过在晶片上包括功能层间和层内约束来确保电路特征之间的适当的功能交互。根据本发明使用的功能约束应用于模拟晶片图像中，以确保正确的功能交互，同时放松或消除对晶片图像的位置的EPE约束。

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