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1. 发明授权

US07242261B2 Voltage control for clock generating circuit 有权
标题翻译：时钟发生电路的电压控制
公开(公告)号：US07242261B2
公开(公告)日：2007-07-10
申请号：US10680498
申请日：2003-10-06
申请人： Keng L. Wong , Hong-Piao Ma , Greg F. Taylor
发明人： Keng L. Wong , Hong-Piao Ma , Greg F. Taylor
IPC分类号： H03B1/00
CPC分类号： H03K5/15013 , G06F1/10 , G06F1/28 , H03K3/011 , H03K3/0315 , H03K5/133
摘要： An apparatus is provided that includes a clock distribution network, a plurality of distributed oscillators provided about the clock distribution network so as to provide clock signals on the clock distribution network and a power control circuit to control power applied to the plurality of distributed oscillators. The power control circuit includes a bandgap device to produce a reference voltage based on a desired power level and a comparing/decision device to receive the reference voltage from the bandgap device and to receive the voltage signal from a source external to the apparatus. The comparing/decision device determines whether the signal received from the power source corresponds to the desired power level.
摘要翻译：提供了一种装置，其包括时钟分配网络，围绕时钟分配网络设置的多个分布式振荡器，以便在时钟分配网络上提供时钟信号;以及功率控制电路，用于控制施加到多个分布式振荡器的功率。功率控制电路包括用于基于期望功率电平产生参考电压的带隙装置和用于从带隙装置接收参考电压并且从设备外部的源接收电压信号的比较/判定装置。比较/判定装置确定从电源接收的信号是否对应于期望的功率电平。

2. 发明授权

US06809606B2 Voltage ID based frequency control for clock generating circuit 有权
标题翻译：用于时钟发生电路的基于电压ID的频率控制
公开(公告)号：US06809606B2
公开(公告)日：2004-10-26
申请号：US10136321
申请日：2002-05-02
申请人： Keng L. Wong , Hong-Piao Ma , Greg F. Taylor , Chee How Lim , Robert Greiner , Edward A. Burton , Douglas R. Huard
发明人： Keng L. Wong , Hong-Piao Ma , Greg F. Taylor , Chee How Lim , Robert Greiner , Edward A. Burton , Douglas R. Huard
IPC分类号： H03L100
CPC分类号： G06F1/3203 , G06F1/08 , G06F1/10 , H03L7/0995 , H03L7/18 , Y02D10/126
摘要： An apparatus and method are provided for operating a processor core. This may include a first circuit to operate at a frequency that is dependent on a power supply voltage. A frequency control circuit may be provided to control a frequency of the first circuit by directing a voltage regulator to increase or decrease the power supply voltage.
摘要翻译：提供了一种用于操作处理器核心的装置和方法。这可以包括在取决于电源电压的频率下操作的第一电路。可以提供频率控制电路以通过引导电压调节器来增加或减少电源电压来控制第一电路的频率。

3. 发明授权

US06778033B2 Voltage control for clock generating circuit 有权
公开(公告)号：US06778033B2
公开(公告)日：2004-08-17
申请号：US10136318
申请日：2002-05-02
申请人： Keng L. Wong , Hong-Piao Ma , Greg F. Taylor
发明人： Keng L. Wong , Hong-Piao Ma , Greg F. Taylor
IPC分类号： H03B100
CPC分类号： H03K5/15013 , G06F1/10 , G06F1/28 , H03K3/011 , H03K3/0315 , H03K5/133
摘要： An apparatus is provided that includes a clock distribution network, a plurality of distributed oscillators provided about the clock distribution network so as to provide clock signals on the clock distribution network and a power control circuit to control power applied to the plurality of distributed oscillators. The power control circuit includes a bandgap device to produce a reference voltage based on a desired power level and a comparing/decision device to receive the reference voltage from the bandgap device and to receive the voltage signal from a source external to the apparatus. The comparing/decision device determines whether the signal received from the power source corresponds to the desired power level.

4. 发明授权

US06771134B2 Frequency control for clock generating circuit 有权
标题翻译：时钟发生电路的频率控制
公开(公告)号：US06771134B2
公开(公告)日：2004-08-03
申请号：US10136474
申请日：2002-05-02
申请人： Keng L. Wong , Hong-Piao Ma , Greg F. Taylor , Chee How Lim , Edward A. Burton
发明人： Keng L. Wong , Hong-Piao Ma , Greg F. Taylor , Chee How Lim , Edward A. Burton
IPC分类号： H03B2700
CPC分类号： H03L7/0995 , G06F1/08 , G06F1/10 , H03L7/18
摘要： A clock generating circuit is provided that includes a plurality of distributed ring oscillators to drive a clock distribution network. Multiplexing devices may select a length or delay of each of the ring oscillators. The variable length or delay may thereby adjust the frequency of the clock generating circuit.
摘要翻译：提供了一种时钟发生电路，其包括多个分布式环形振荡器以驱动时钟分配网络。多路复用器件可以选择每个环形振荡器的长度或延迟。因此，可变长度或延迟可以调节时钟发生电路的频率。

5. 发明申请

US20130133731A1 CADMIUM DOPED TIN OXIDE BUFFER LAYER FOR THIN FILM PHOTOVOLTAIC DEVICES AND THEIR METHODS OF MANUFACTURE 审中-公开
标题翻译：用于薄膜光伏器件的CADMIUM DOPED氧化锌缓冲层及其制造方法
公开(公告)号：US20130133731A1
公开(公告)日：2013-05-30
申请号：US13305909
申请日：2011-11-29
申请人： Scott Daniel Feldman-Peabody , Robert Dwayne Gossman , George Theodore Dalakos , Anping Zhang , Allan Robert Northrup , Hong Piao , Laurie Le Tarte
发明人： Scott Daniel Feldman-Peabody , Robert Dwayne Gossman , George Theodore Dalakos , Anping Zhang , Allan Robert Northrup , Hong Piao , Laurie Le Tarte
IPC分类号： H01L31/0216 , H01B1/08 , H01L31/18
CPC分类号： H01L31/022475 , H01L31/03925 , H01L31/073 , Y02E10/543
摘要： Methods for forming a resistive transparent buffer layer on a substrate are provided. The method can include depositing a resistive transparent buffer layer on a transparent conductive oxide layer on a substrate. The resistive transparent buffer layer can comprise a cadmium doped tin oxide that has an as-deposited stoichiometry where cadmium is present in an atomic amount that is less than 33% of a total atomic amount of tin and cadmium. Zinc may also be provided in the resistive transparent buffer layer in certain embodiments. Additionally, thin film photovoltaic devices having such resistive transparent buffer layers are provided.
摘要翻译：提供了在基板上形成电阻透明缓冲层的方法。该方法可以包括在基板上的透明导电氧化物层上沉积电阻性透明缓冲层。电阻透明缓冲层可以包括具有沉积化学计量的镉掺杂的氧化锡，其中镉以小于锡和镉的总原子量的33％的原子量存在。在某些实施例中，锌也可以设置在电阻透明缓冲层中。另外，提供具有这种电阻性透明缓冲层的薄膜光伏器件。

6. 发明授权

US06985041B2 Clock generating circuit and method 失效
公开(公告)号：US06985041B2
公开(公告)日：2006-01-10
申请号：US10136390
申请日：2002-05-02
申请人： Keng L. Wong , Niraj Bindal , Hong-Piao Ma , George Geannopoulos , Greg F. Taylor , Edward A. Burton
发明人： Keng L. Wong , Niraj Bindal , Hong-Piao Ma , George Geannopoulos , Greg F. Taylor , Edward A. Burton
IPC分类号： H03B27/00
CPC分类号： G06F1/10 , H03K3/0315 , H03K5/133 , H03K5/15013
摘要： A clock generating circuit is provided that includes a multiplexing device coupled to a clock distribution network to select between a synchronous mode and an asynchronous mode. The device may also include a plurality of distributed ring oscillators to drive the clock distribution network in the asynchronous mode. In the synchronous mode, the multiplexing device may pass a signal from a phase lock loop circuit located external to a core.

7. 发明申请

US20130109124A1 METHODS OF MAKING A TRANSPARENT LAYER AND A PHOTOVOLTAIC DEVICE 审中-公开
标题翻译：制造透明层和光伏器件的方法
公开(公告)号：US20130109124A1
公开(公告)日：2013-05-02
申请号：US13284037
申请日：2011-10-28
申请人： Hongying Peng , Juan Carlos Rojo , Hongbo Cao , George Theodore Dalakos , Holly Ann Blaydes , David William Vernooy , Mark Jeffrey Pavol , Jae Hyuk Her , Hong Piao , Robert Dwayne Gossman , Scott Daniel Feldman-Peabody , Yangang Andrew Xi
发明人： Hongying Peng , Juan Carlos Rojo , Hongbo Cao , George Theodore Dalakos , Holly Ann Blaydes , David William Vernooy , Mark Jeffrey Pavol , Jae Hyuk Her , Hong Piao , Robert Dwayne Gossman , Scott Daniel Feldman-Peabody , Yangang Andrew Xi
IPC分类号： H01L31/18 , H01L31/0296 , H01L31/0224
CPC分类号： H01L31/1884 , C23C14/086 , C23C14/5806 , Y02E10/50
摘要： In one aspect of the present invention, a method is included. The method includes thermally processing an assembly to form at least one transparent layer. The assembly includes a first panel including a first layer disposed on a first support and a second panel including a second layer disposed on a second support, wherein the second panel faces the first panel, and wherein the first layer and the second layer include substantially amorphous cadmium tin oxide. Method of making a photovoltaic device is also included.
摘要翻译：在本发明的一个方面，包括一种方法。该方法包括热处理组件以形成至少一个透明层。所述组件包括第一面板，其包括设置在第一支撑件上的第一层和包括设置在第二支撑件上的第二层的第二面板，其中所述第二面板面向所述第一面板，并且其中所述第一层和所述第二层包括基本上无定形的氧化镉锡。还包括制造光伏器件的方法。

8. 发明授权

US06924710B2 Voltage ID based frequency control for clock generating circuit 有权
标题翻译：用于时钟发生电路的基于电压ID的频率控制
公开(公告)号：US06924710B2
公开(公告)日：2005-08-02
申请号：US10659637
申请日：2003-09-09
申请人： Keng L. Wong , Hong-Piao Ma , Greg F. Taylor , Chee How Lim , Robert Greiner , Edward A. Burton , Douglas R. Huard
发明人： Keng L. Wong , Hong-Piao Ma , Greg F. Taylor , Chee How Lim , Robert Greiner , Edward A. Burton , Douglas R. Huard
IPC分类号： G06F1/08 , G06F1/10 , H03L7/099 , H03L7/18 , H03L1/00
CPC分类号： G06F1/3203 , G06F1/08 , G06F1/10 , H03L7/0995 , H03L7/18 , Y02D10/126
摘要： An apparatus and method are provided for operating a processor core. This may include a first circuit to operate at a frequency that is dependent on a power supply voltage. A frequency control circuit may be provided to control a frequency of the first circuit by directing a voltage regulator to increase or decrease the power supply voltage.
摘要翻译：提供了一种用于操作处理器核心的装置和方法。这可以包括在取决于电源电压的频率下操作的第一电路。可以提供频率控制电路以通过引导电压调节器来增加或减少电源电压来控制第一电路的频率。

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