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1. 发明授权

US09050243B2 Multilayered body for medical containers and medical container 有权
标题翻译：用于医疗容器和医疗容器的多层体
公开(公告)号：US09050243B2
公开(公告)日：2015-06-09
申请号：US12809005
申请日：2007-12-20
申请人： Manabu Nakamura , Hiroshi Miyagi
发明人： Manabu Nakamura , Hiroshi Miyagi
IPC分类号： B32B1/02 , A61J1/10 , B32B27/08 , B32B27/32 , B32B1/08 , A61J1/20
CPC分类号： A61J1/10 , A61J1/2093 , B32B27/08 , B32B27/32 , B32B27/325 , B32B27/327 , B32B2307/306 , B32B2307/308 , B32B2307/412 , B32B2307/72 , B32B2307/744 , B32B2439/80
摘要： The present invention provides a multilayered body for medical containers, in which the innermost layer formed from a cyclic polyolefin exhibits favorable adhesion to another layer without using an adhesive, which exhibits excellent heat resistance, and which provides favorable blocking resistance when formed as a film, as well as a medical container formed from this multilayered body for medical containers, which suffers minimal deterioration in properties such as transparency and peel strength even when subjected to sterilization with high-pressure steam or the like.
摘要翻译：本发明提供一种用于医疗容器的多层体，其中由环状聚烯烃形成的最内层与不使用粘合剂的另一层具有良好的粘合性，其表现出优异的耐热性，并且当形成膜时提供良好的抗粘连性，以及由这种用于医疗容器的多层体形成的医疗容器，即使在用高压蒸汽等进行灭菌的情况下，其性能如透明性和剥离强度也几乎没有劣化。

2. 发明授权

US07876169B2 Modulating circuit 有权
标题翻译：调制电路
公开(公告)号：US07876169B2
公开(公告)日：2011-01-25
申请号：US11995453
申请日：2006-02-08
申请人： Takeshi Ikeda , Hiroshi Miyagi
发明人： Takeshi Ikeda , Hiroshi Miyagi
IPC分类号： H03C1/00 , H03C3/00
CPC分类号： H04L27/364 , H04L27/206
摘要： There are included a first quadrature modulation part (5) that divides an input signal into an I signal and a Q signal having a phase orthogonal to the phase thereof and uses a baseband frequency to perform frequency conversions of the I and Q signals, thereby performing a quadrature modulation; and a second quadrature modulation part (8) that uses in-phase and quadrature carriers of FM frequencies, which are 90 degrees out of phase with respect to each other, to perform frequency conversions of the I and Q signals, which are generated by the first quadrature modulation part (5), thereby performing a quadrature modulation. Thus, the phases of the I and Q signals, which are shifted by 90 degrees with respect to each other by the first quadrature modulation part (5), are further shifted by 90 degrees with respect to each other by the second quadrature modulation part (8), thereby providing frequency components the phases of which have been inverted, whereby the unwanted harmonic components at the spurious sides of a target frequency can be attenuated.
摘要翻译：包括将输入信号分割为I信号的第一正交调制部分（5）和具有与其相位正交的相位的Q信号，并且使用基带频率来执行I和Q信号的频率转换，由此执行正交调制; 以及第二正交调制部分（8），其使用相对于彼此相差90度的FM频率的同相和正交载波，以执行由所述I和Q信号产生的I和Q信号的频率转换第一正交调制部分（5），从而执行正交调制。因此，通过第一正交调制部（5）相对于彼此偏移90度的I和Q信号的相位通过第二正交调制部分（...）相对于彼此进一步偏移90度 8），从而提供其相位已被反转的频率分量，从而可以衰减目标频率的杂散侧的不需要的谐波分量。

3. 发明申请

US20100276321A1 MULTILAYERED BODY FOR MEDICAL CONTAINERS AND MEDICAL CONTAINER 有权
标题翻译：医用容器和医用容器的多层体
公开(公告)号：US20100276321A1
公开(公告)日：2010-11-04
申请号：US12809005
申请日：2007-12-20
申请人： Manabu Nakamura , Hiroshi Miyagi
发明人： Manabu Nakamura , Hiroshi Miyagi
IPC分类号： A61B19/02 , B65D85/00
CPC分类号： A61J1/10 , A61J1/2093 , B32B27/08 , B32B27/32 , B32B27/325 , B32B27/327 , B32B2307/306 , B32B2307/308 , B32B2307/412 , B32B2307/72 , B32B2307/744 , B32B2439/80
摘要： The present invention provides a multilayered body for medical containers, in which the innermost layer formed from a cyclic polyolefin exhibits favorable adhesion to another layer without using an adhesive, which exhibits excellent heat resistance, and which provides favorable blocking resistance when formed as a film, as well as a medical container formed from this multilayered body for medical containers, which suffers minimal deterioration in properties such as transparency and peel strength even when subjected to sterilization with high-pressure steam or the like.
摘要翻译：本发明提供一种用于医疗容器的多层体，其中由环状聚烯烃形成的最内层与不使用粘合剂的另一层具有良好的粘合性，其表现出优异的耐热性，并且当形成膜时提供良好的抗粘连性，以及由这种用于医疗容器的多层体形成的医疗容器，即使在用高压蒸汽等进行灭菌的情况下，其性能如透明性和剥离强度也几乎没有劣化。

4. 发明申请

US20100038722A1 MIS TRANSISTOR AND CMOS TRANSISTOR 有权
标题翻译： MIS晶体管和CMOS晶体管
公开(公告)号：US20100038722A1
公开(公告)日：2010-02-18
申请号：US12604015
申请日：2009-10-22
申请人： Takefumi NISHIMUTA , Hiroshi MIYAGI , Tadahiro OHMI , Shigetoshi SUGAWA , Akinobu TERAMOTO
发明人： Takefumi NISHIMUTA , Hiroshi MIYAGI , Tadahiro OHMI , Shigetoshi SUGAWA , Akinobu TERAMOTO
IPC分类号： H01L27/092
CPC分类号： H01L29/7851 , H01L21/823807 , H01L21/823821 , H01L21/82385 , H01L29/045
摘要： A MIS transistor, formed on a semiconductor substrate, assumed to comprise a semiconductor substrate (702, 910) comprising a projecting part (704, 910B) with at least two different crystal planes on the surface on a principal plane, a gate insulator (708, 920B) for covering at least a part of each of said at least two different crystal planes constituting the surface of the projecting part, a gate electrode (706, 930B), comprised on each of said at least two different crystal planes constituting the surface of the projecting part, which sandwiches the gate insulator with the said at least two different planes, and a single conductivity type diffusion region (710a, 710b, 910c, 910d) formed in the projecting part facing each of said at least two different crystal planes and individually formed on both sides of the gate electrode. Such a configuration allows control over increase in the element area and increase of channel width.
摘要翻译：形成在半导体衬底上的MIS晶体管被假设为包括半导体衬底（702,910），该半导体衬底包括在主平面上的表面上具有至少两个不同晶面的突出部分（704,910B），栅极绝缘体（708 ，920B），用于覆盖构成所述突出部分的表面的所述至少两个不同晶面的每一个的至少一部分;栅电极（706,930B），包括在构成所述表面的所述至少两个不同晶面中的每一个上所述突出部分与所述至少两个不同平面夹住所述栅极绝缘体，以及形成在所述突出部分中的所述至少两个不同晶面中的每一个的单导电型扩散区域（710a，710b，910c，910d）并分别形成在栅电极的两侧。这种配置允许控制元件面积的增加和通道宽度的增加。

5. 发明申请

US20090298454A1 RECEIVER 审中-公开
标题翻译：接收器
公开(公告)号：US20090298454A1
公开(公告)日：2009-12-03
申请号：US12295912
申请日：2006-11-08
申请人： Takeshi Ikeda , Hiroshi Miyagi
发明人： Takeshi Ikeda , Hiroshi Miyagi
IPC分类号： H04B1/16 , H04B1/26
CPC分类号： H03G3/3068 , H04B1/001
摘要： By A/D converting a signal output from a mixer (4) and inputting the A/D converted signal to a DSP (8), and generating AGC control data (DL) corresponding to a level of the signal to control a gain of an LNA (3) in such a manner that a voltage input to an A/D converting circuit (7) is lower than a full scale voltage of the A/D converting circuit (7), it is possible to prevent a signal having an excessively high level beyond a dynamic range of the A/D converting circuit (7) from being input to the A/D converting circuit (7). By controlling the gain of the LNA (3) corresponding to a level of a broad band signal before passing through a BPF (11) and controlling a gain of an IF amplifier (12) corresponding to a level of a narrow band signal after passing through the BPF (11), moreover, it is possible to properly control a gain of an AGC as a whole in consideration of signal levels of both a desirable wave and a disturbing wave.
摘要翻译：通过A / D转换从混频器（4）输出的信号并将A / D转换的信号输入到DSP（8），并产生对应于信号电平的AGC控制数据（DL）以控制一个 LNA（3），使得输入到A / D转换电路（7）的电压低于A / D转换电路（7）的满量程电压，可以防止过度的信号高于A / D转换电路（7）的动态范围的输入到A / D转换电路（7）的高电平。通过在通过BPF（11）之前控制对应于宽频带信号的电平的LNA（3）的增益，并且控制与通过后的窄频带信号的电平相对应的IF放大器（12）的增益 BPF（11），此外，考虑到期望的波和干扰波的信号电平，可以整体地适当地控制AGC的增益。

6. 发明申请

US20090268916A1 FM TRANSMITTER 审中-公开
标题翻译： FM发射机
公开(公告)号：US20090268916A1
公开(公告)日：2009-10-29
申请号：US12067164
申请日：2006-06-27
申请人： Hiroshi Miyagi
发明人： Hiroshi Miyagi
IPC分类号： H04H20/48
CPC分类号： H03C3/40 , H03C5/00 , H04H20/48
摘要： An FM transmitter improved in degree of freedom of selecting components. The FM transmitter comprises an oscillator 72 connected to a crystal oscillator 70, a clock generating circuit 50 for generating a clock signal having a frequency which is an integral multiple of the frequency of the output signal from the oscillator 72 by using the output signal as a reference frequency signal fr1, a DSP 20 operable synchronously with the clock signal and adapted for conducting digital stereo modulation, digital FM modulation, and digital IQ modulation of inputted stereo data, a frequency synthesizer 60 for generating a signal having a frequency which is an integral multiple of the frequency of the output signal from the oscillator 72 by using the output signal as a reference frequency signal fr2, mixers 40, 42 for mixing the signals outputted from the DSP 20 with the signal generated by the frequency synthesizer 60, an adder 44 for adding the outputs from the mixers 40, 42, and amplifier 46 for amplifying the output signal from the adder 44 to transmit it from an antenna 48.
摘要翻译： FM发射机在选择部件的自由度方面有所改进。 FM发射机包括连接到晶体振荡器70的振荡器72，时钟产生电路50，用于通过使用输出信号产生具有来自振荡器72的输出信号的频率的整数倍的频率的时钟信号参考频率信号fr1，与时钟信号同步操作的DSP 20，用于进行数字立体声调制，数字FM调制和输入的立体声数据的数字IQ调制;频率合成器60，用于产生频率为积分的信号通过使用输出信号作为参考频率信号fr2，来自振荡器72的输出信号的频率的倍数，用于将从DSP 20输出的信号与由频率合成器60产生的信号混合的混频器40,42，加法器44 用于添加来自混频器40,42和放大器46的输出，用于放大来自加法器44的输出信号，以从蚂蚁 enna 48。

7. 发明申请

US20090225990A1 CLOCK GENERATING CIRCUIT AND AUDIO SYSTEM 审中-公开
标题翻译：时钟发生电路和音频系统
公开(公告)号：US20090225990A1
公开(公告)日：2009-09-10
申请号：US11908602
申请日：2006-04-25
申请人： Hiroshi Miyagi
发明人： Hiroshi Miyagi
IPC分类号： H04H20/48 , H03L7/08
CPC分类号： H03L7/183
摘要： A clock generating circuit having a simple constitution and an audio system are disclosed.The clock generating circuit (300) comprises an oscillator (12) for generating a reference frequency signal by means of a crystal oscillator (10) of a resonance frequency of 32.768 kHz, a PLL circuit for generating a signal synchronizing with the reference frequency signal generated by the oscillator (12) and having a frequency which is M times the reference frequency signal, a first frequency divider (30) for generating a first clock signal (CLK1) having a frequency of 32 kHz by frequency-dividing the signal generated by the PLL circuit at a division ratio N1, a second frequency divider (32) for generating a second clock signal (CLK2) having a frequency of 38 kHz by frequency-dividing the signal generated by the PLL circuit at a division ratio N2, and a third frequency divider (34) for generating a third clock signal (CLK3) having a frequency of 48 kHz by frequency-dividing the signal generated by the PLL circuit at a division ratio N3.
摘要翻译：公开了一种具有简单结构和音频系统的时钟发生电路。时钟发生电路（300）包括：振荡器（12），用于通过共振频率为32.768kHz的晶体振荡器（10）产生参考频率信号; PLL电路，用于产生与产生的参考频率信号同步的信号通过所述振荡器（12）并且具有所述参考频率信号的M倍的频率的第一分频器（30），用于通过对由所述基准频率信号产生的信号进行分频来产生具有32kHz频率的第一时钟信号（CLK1） PLL电路，分频比N1的第二分频器（32），通过以分频比N2分频由PLL电路产生的信号，产生频率为38kHz的第二时钟信号（CLK2）的第二分频器（32）分频器（34），用于通过以分频比N3对由PLL电路产生的信号进行分频来产生具有48kHz频率的第三时钟信号（CLK3）。

8. 发明申请

US20090215414A1 AM BROADCAST RECEIVING CIRCUIT 审中-公开
标题翻译： AM广播接收电路
公开(公告)号：US20090215414A1
公开(公告)日：2009-08-27
申请号：US12393134
申请日：2009-02-26
申请人： Takeshi Ikeda , Hiroshi Miyagi
发明人： Takeshi Ikeda , Hiroshi Miyagi
IPC分类号： H04B1/18
CPC分类号： H04B1/18
摘要： A JFET 4 to be an antenna buffer for an AM broadcasting signal is constituted in a source follower form of a 100% negative feedback type, and a tuning circuit including a variable capacitive circuit 7 and a transformer 6 is provided in a subsequent stage to the JFET 4 and an amplifying circuit including MOSFETs 10 and 11 is provided in a further subsequent stage thereto. Consequently, it is possible to reduce a signal distortion rate in the JFET 4 and to eliminate a drawback that every frequency component enters the amplifying circuit to saturate the amplifying circuit, resulting in an occurrence of a distortion in an output signal. By switching a plurality of capacitors CT1, CT2, . . . CTn to cause a capacitance value to be variable without using a varactor diode, it is possible to integrate the capacitors CT1, CT2, . . . CTn in an IC 20.
摘要翻译：作为AM广播信号的天线缓冲器的JFET 4以100％负反馈型的源极跟随器形式构成，并且在随后的阶段中提供包括可变电容电路7和变压器6的调谐电路 JFET 4和包括MOSFET 10和11的放大电路在其后续阶段提供。因此，可以降低JFET 4中的信号失真率，并且消除每个频率分量进入放大电路以使放大电路饱和，从而导致输出信号中出现失真的缺点。通过切换多个电容器CT1，CT2，...。。。 CTn使得电容值可变，而不使用变容二极管，可以集成电容器CT1，CT2。。。 CTn在IC 20。

9. 发明授权

US07561863B2 Automatic gain control device 失效
标题翻译：自动增益控制装置
公开(公告)号：US07561863B2
公开(公告)日：2009-07-14
申请号：US11441055
申请日：2006-05-26
申请人： Takeshi Ikeda , Hiroshi Miyagi
发明人： Takeshi Ikeda , Hiroshi Miyagi
IPC分类号： H04B1/06 , H04B7/00
CPC分类号： H03G3/3052
摘要： A received signal level is detected in each of a wide band, middle band, and narrow band and each detected signal is converted to a digital signal. A DSP 18 determines the enabled/disabled state of an LNA 3 and an attenuator 4 as well as a gain adjustment amount based on the signal level of each band. For example, the gain adjustment is not performed when the signal level of the narrow band including a desired frequency is not larger than a prescribed value even the signal level of the wide band or middle band is larger than a prescribed value. When the signal level of the narrow band is larger than the prescribed value exceeding a gain adjustable limit level in the attenuator 4, the gain of the LNA 3 is adjusted, while maintaining the gain adjustable amount in the attenuator 4 around the limit level, to reduce the gain as a whole.
摘要翻译：在宽带，中频带和窄带中的每一个中检测到接收信号电平，并且将每个检测信号转换为数字信号。 DSP18根据每个频带的信号电平确定LNA 3和衰减器4的使能/禁止状态以及增益调整量。例如，即使宽带或中频带的信号电平大于规定值，当包含期望频率的窄带的信号电平不大于规定值时，也不进行增益调整。当窄带的信号电平大于衰减器4中超过增益可调极限电平的规定值时，调节LNA 3的增益，同时将衰减器4中的增益可调量保持在限制电平附近，至减少整体收益。

10. 发明授权

US07403140B2 Receiver, digital-analog converter and tuning circuit 失效
标题翻译：接收器，数模转换器和调谐电路
公开(公告)号：US07403140B2
公开(公告)日：2008-07-22
申请号：US11751034
申请日：2007-05-20
申请人： Hiroshi Miyagi , Isami Kato
发明人： Hiroshi Miyagi , Isami Kato
IPC分类号： H03M1/06
CPC分类号： H04B1/28 , H03J1/005
摘要： An object of the present invention is to provide a receiver, a digital-analog converter and a tuning circuit in which temperature compensating components can be formed on a semiconductor substrate while reducing component costs. An FM receiver 100 is constituted by including an antenna 1, a high frequency receiving circuit 2, a local oscillator 3, two digital-analog converters (DACs) 4, 6, a control section 8, a mixing circuit 9, an intermediate frequency amplification circuit 10, a detection circuit 11, a low frequency amplification circuit 12 and the speaker 13. The DACs 4, 6 have a predetermined temperature coefficient, of which output voltage is changed in accordance with ambient temperature. When a characteristic of VCO 31 is changed with variations of ambient temperature so as to cause a control voltage applied to the VCO 31 to be changed, output voltages of the DACs 4, 6 are also changed similarly.
摘要翻译：本发明的目的是提供一种接收器，数模转换器和调谐电路，其中可以在半导体衬底上形成温度补偿部件，同时降低部件成本。 FM接收机100包括天线1，高频接收电路2，本地振荡器3，两个数模转换器（DAC）4,6，控制部分8，混合电路9，中频放大电路10，检测电路11，低频放大电路12和扬声器13。 DAC4,6具有预定的温度系数，其输出电压根据环境温度而改变。当VCO 31的特性随着环境温度的变化而改变，以便施加到VCO 31的控制电压被改变时，DAC4,6的输出电压也被类似地改变。

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