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1. 发明授权

US07821819B2 Semiconductor memory device and its data reading method 失效
标题翻译：半导体存储器件及其数据读取方法
公开(公告)号：US07821819B2
公开(公告)日：2010-10-26
申请号：US12149558
申请日：2008-05-05
申请人： Hidenari Hachino
发明人： Hidenari Hachino
IPC分类号： G11C11/00
CPC分类号： G11C11/15
摘要： Disclosed herein is a semiconductor memory device including a plurality of magnetic memory elements, a control line group and a read driving circuit.
摘要翻译：这里公开了包括多个磁存储元件，控制线组和读驱动电路的半导体存储器件。

2. 发明授权

US07719873B2 Memory and semiconductor device with memory state detection 有权
标题翻译：具有存储器状态检测的存储器和半导体器件
公开(公告)号：US07719873B2
公开(公告)日：2010-05-18
申请号：US11265894
申请日：2005-11-03
申请人： Hidenari Hachino , Hironobu Mori , Nobumichi Okazaki , Katsuhisa Aratani
发明人： Hidenari Hachino , Hironobu Mori , Nobumichi Okazaki , Katsuhisa Aratani
IPC分类号： G11C11/00
CPC分类号： G11C13/0064 , G11C13/004 , G11C13/0069 , G11C2013/0054 , G11C2213/79
摘要： A memory includes: memory elements arranged in a matrix, each memory element having such characteristics that when an electric signal at a level equal to or higher than that of a first threshold signal is applied to the memory element, the resistance thereof is changed from a high value to a low value, and when an electric signal at a level equal to or higher than that of a second threshold signal is applied thereto, the resistance is changed from the low value to the high value, the polarities of the first and second threshold signals being different from each other; electric circuits for applying electric signals to the memory elements; and detection units each for measuring a current flowing through the corresponding memory element or a voltage applied thereto from the start of the application of electric signals to detect whether the resistance is high or low.
摘要翻译：存储器包括：排列成矩阵的存储器元件，每个存储元件具有这样的特性，即当等于或高于第一阈值信号的电信号被施加到存储元件时，其电阻从高值为低值，当施加等于或高于第二阈值信号的电信号时，电阻从低值变为高值，第一和第二极性的极性阈值信号彼此不同; 用于向存储元件施加电信号的电路; 以及各自的检测单元，用于测量从开始施加电信号开始流过相应的存储元件的电流或施加到其上的电压，以检测电阻是高还是低。

3. 发明申请

US20070070682A1 STORAGE DEVICE AND SEMICONDUCTOR DEVICE 有权
标题翻译：存储器件和半导体器件
公开(公告)号：US20070070682A1
公开(公告)日：2007-03-29
申请号：US11530716
申请日：2006-09-11
申请人： Chieko Nakashima , Hidenari Hachino , Hajime Nagao , Nobumichi Okazaki
发明人： Chieko Nakashima , Hidenari Hachino , Hajime Nagao , Nobumichi Okazaki
IPC分类号： G11C11/00
CPC分类号： G11C13/0011 , G11C13/0007 , G11C13/0069 , G11C2013/009 , G11C2213/31 , G11C2213/79
摘要： A storage device includes a memory cell having a storage element having a characteristic of changing from a state of a high resistance value to a state of a low resistance value by being supplied with a voltage equal to or higher than a first threshold voltage, and changing from a state of a low resistance value to a state of a high resistance value by being supplied with a voltage equal to or higher than a second threshold voltage different in polarity from the first threshold voltage, and a circuit element connected in series with the storage element, wherein letting R be a resistance value of the storage element after writing, V be the second threshold voltage, and I be a current that can be passed through the storage element at a time of erasure, R≧V/I.
摘要翻译：存储装置包括具有存储元件的存储单元，存储元件具有通过提供等于或高于第一阈值电压的电压而从高电阻值状态变为低电阻值状态的特性，以及改变通过提供等于或高于极性与第一阈值电压不同的第二阈值电压的电压，从低电阻值的状态到高电阻值的状态，以及与存储器串联连接的电路元件元件，其中令R为写入后存储元件的电阻值，V为第二阈值电压，I为在擦除时能够通过存储元件的电流R> = V / I。

4. 发明申请

US20070012959A1 MEMORY DEVICE 有权
标题翻译：内存设备
公开(公告)号：US20070012959A1
公开(公告)日：2007-01-18
申请号：US11456436
申请日：2006-07-10
申请人： Hidenari Hachino , Nobumichi Okazaki , Katsuhisa Aratani
发明人： Hidenari Hachino , Nobumichi Okazaki , Katsuhisa Aratani
IPC分类号： H01L29/80
CPC分类号： H01L27/2472 , G11C13/0007 , G11C13/0011 , G11C2213/31 , G11C2213/79 , H01L27/2436 , H01L45/085 , H01L45/1233 , H01L45/1266 , H01L45/146
摘要： The present invention is to provide a memory device including: a plurality of memory cells that each include a memory element having a memory layer and first and second electrodes that sandwich the memory layer, the plurality of memory cells being divided into memory blocks of m columns by n rows (m and n are each an integer of not less than 1, m+n≧3), the memory elements in the same memory block having the first electrode that is formed of a single layer in common to the memory elements; and a voltage application unit that applies any voltage to the first electrode of the memory block.
摘要翻译：本发明提供一种存储器件，包括：多个存储单元，每个存储单元包括具有存储层的存储元件和夹持存储层的第一和第二电极，多个存储单元被分成m列的存储块由n行（m和n各自为不小于1的整数，m + n> = 3），相同存储块中的存储元件具有由存储元件共同的单层形成的第一电极 ; 以及向存储块的第一电极施加任何电压的电压施加单元。

5. 发明授权

US07471543B2 Storage device and semiconductor device 有权
标题翻译：存储设备和半导体器件
公开(公告)号：US07471543B2
公开(公告)日：2008-12-30
申请号：US11530716
申请日：2006-09-11
申请人： Chieko Nakashima , Hidenari Hachino , Hajime Nagao , Nobumichi Okazaki
发明人： Chieko Nakashima , Hidenari Hachino , Hajime Nagao , Nobumichi Okazaki
IPC分类号： G11C11/00
CPC分类号： G11C13/0011 , G11C13/0007 , G11C13/0069 , G11C2013/009 , G11C2213/31 , G11C2213/79
摘要： A storage device includes a memory cell having a storage element having a characteristic of changing from a state of a high resistance value to a state of a low resistance value by being supplied with a voltage equal to or higher than a first threshold voltage, and changing from a state of a low resistance value to a state of a high resistance value by being supplied with a voltage equal to or higher than a second threshold voltage different in polarity from the first threshold voltage, and a circuit element connected in series with the storage element, wherein letting R be a resistance value of the storage element after writing, V be the second threshold voltage, and I be a current that can be passed through the storage element at a time of erasure, R≧V/I.
摘要翻译：存储装置包括具有存储元件的存储单元，存储元件具有通过提供等于或高于第一阈值电压的电压而从高电阻值状态变为低电阻值状态的特性，以及改变通过提供等于或高于极性与第一阈值电压不同的第二阈值电压的电压，从低电阻值的状态到高电阻值的状态，以及与存储器串联连接的电路元件元件，其中令R为写入后存储元件的电阻值，V为第二阈值电压，I为在擦除时能够通过存储元件的电流R> = V / I。

6. 发明申请

US20080083918A1 Storage Element 有权
标题翻译：存储元件
公开(公告)号：US20080083918A1
公开(公告)日：2008-04-10
申请号：US11632594
申请日：2005-07-08
申请人： Katsuhisa Aratani , Tomohito Tsushima , Hiroaki Narisawa , Wataru Otsuka , Hidenari Hachino
发明人： Katsuhisa Aratani , Tomohito Tsushima , Hiroaki Narisawa , Wataru Otsuka , Hidenari Hachino
IPC分类号： H01L45/00
CPC分类号： G11C13/0011 , G11C13/0069 , G11C2013/009 , G11C2213/56 , G11C2213/79 , H01L27/2436 , H01L27/2472 , H01L45/085 , H01L45/1233 , H01L45/1266 , H01L45/141 , H01L45/145 , H01L45/146 , H01L45/148 , H01L45/149 , H01L45/1675
摘要： It is intended to provide a storage element having an arrangement which becomes able to be manufactured easily with high density.A storage element includes resistance changing elements 10 having recording layers 2, 3 provided between two electrodes 1, 4 and in which resistance values of the recording layers 2, 3 are reversibly changed with application of electric potential with different polarities to these two electrodes 1, 4, at least part of the layers 2, 3 constructing the recording layers of the resistance changing elements 10 being formed commonly by the same layer in a plurality of adjacent memory cells.
摘要翻译：旨在提供具有能够以高密度容易地制造的布置的存储元件。存储元件包括电阻变化元件10，其具有设置在两个电极1,4之间的记录层2,3，并且其中记录层2,3的电阻值可通过向这两个电极1施加不同极性的电位而可逆地改变，如图4所示，构成电阻变化元件10的记录层的层2,3的至少一部分由多个相邻存储单元中的相同层共同形成。

7. 发明授权

US07345908B2 Memory device 有权
标题翻译：内存设备
公开(公告)号：US07345908B2
公开(公告)日：2008-03-18
申请号：US11456436
申请日：2006-07-10
申请人： Hidenari Hachino , Nobumichi Okazaki , Katsuhisa Aratani
发明人： Hidenari Hachino , Nobumichi Okazaki , Katsuhisa Aratani
IPC分类号： G11C11/00
CPC分类号： H01L27/2472 , G11C13/0007 , G11C13/0011 , G11C2213/31 , G11C2213/79 , H01L27/2436 , H01L45/085 , H01L45/1233 , H01L45/1266 , H01L45/146
摘要： The present invention is to provide a memory device including: a plurality of memory cells that each include a memory element having a memory layer and first and second electrodes that sandwich the memory layer, the plurality of memory cells being divided into memory blocks of m columns by n rows (m and n are each an integer of not less than 1, m+n≧3), the memory elements in the same memory block having the first electrode that is formed of a single layer in common to the memory elements; and a voltage application unit that applies any voltage to the first electrode of the memory block.
摘要翻译：本发明提供一种存储器件，包括：多个存储单元，每个存储单元包括具有存储层的存储元件和夹持存储层的第一和第二电极，多个存储单元被分成m列的存储块由n行（m和n各自为不小于1的整数，m + n> = 3），相同存储块中的存储元件具有由存储元件共同的单层形成的第一电极 ; 以及向存储块的第一电极施加任何电压的电压施加单元。

8. 发明授权

US07242606B2 Storage apparatus and semiconductor apparatus 有权
标题翻译：存储装置和半导体装置
公开(公告)号：US07242606B2
公开(公告)日：2007-07-10
申请号：US11225593
申请日：2005-09-13
申请人： Hidenari Hachino , Nobumichi Okazaki , Wataru Otsuka , Tomohito Tsushima , Tsutomu Sagara , Chieko Nakashima , Hironobu Mori , Hajime Nagao
发明人： Hidenari Hachino , Nobumichi Okazaki , Wataru Otsuka , Tomohito Tsushima , Tsutomu Sagara , Chieko Nakashima , Hironobu Mori , Hajime Nagao
IPC分类号： G11C11/00
CPC分类号： G11C13/02 , G11C13/0069 , G11C2213/79
摘要： A storage apparatus includes memory devices each having a storage element with a characteristic that the application of an electric signal not lower than a first threshold signal allows the storage element to shift from a high resistance value state to a low resistance value state, and that the application of an electric signal not lower than a second threshold signal, which has a polarity different from that of the first threshold signal, allows the storage element to shift form a low resistance value state to a high resistance value state, and a circuit element connected to the storage element in series to be a load; wherein the memory devices are arranged in a matrix and one terminal of each of the memory devices is connected to a common line; and wherein an intermediate potential between a power supply potential and a ground potential is applied to the common line.
摘要翻译：一种存储装置，具有各自具有存储元件的存储器件，该存储元件具有不低于第一阈值信号的电信号的施加使得存储元件从高电阻值状态向低电阻值状态移动的特征，施加不低于第一阈值信号极性的第二阈值信号的电信号允许存储元件从低电阻值状态移位到高电阻值状态，并且连接的电路元件将串联的存储元件作为负载; 其中所述存储器件被布置在矩阵中，并且每个所述存储器件的一个端子连接到公共线; 并且其中电源电位和接地电位之间的中间电位被施加到公共线。

9. 发明授权

US07239542B2 Storage apparatus 有权
标题翻译：储存装置
公开(公告)号：US07239542B2
公开(公告)日：2007-07-03
申请号：US11245325
申请日：2005-10-05
申请人： Wataru Ootsuka , Tomohito Tsushima , Hidenari Hachino
发明人： Wataru Ootsuka , Tomohito Tsushima , Hidenari Hachino
IPC分类号： G11C11/00
CPC分类号： G11C11/16
摘要： The present invention provides a storage apparatus including a variable resistance element having a recording layer between two electrodes. In the variable resistance element, a resistance value of the recording layer is reversibly changed to one of a value in a high-resistance state and a value in a low-resistance state by applying potentials of different polarities to the two electrodes. An absolute value of a threshold value of an applied signal at a time of change from the high-resistance state to the low-resistance state and an absolute value of a threshold value of an applied signal at a time of change from the low-resistance state to the high-resistance state differ from each other. A reading signal for detecting the resistance value of the recording layer in the variable resistance element is applied with a polarity of one of the threshold values of the applied signals which one has a higher absolute value and with a value lower than the absolute value.
摘要翻译：本发明提供了一种存储装置，包括在两个电极之间具有记录层的可变电阻元件。在可变电阻元件中，通过向两个电极施加不同极性的电位，记录层的电阻值被可逆地改变为高电阻状态的值和低电阻状态的值之一。从高电阻状态向低电阻状态变化时的施加信号的阈值的绝对值和从低电阻变化时的施加信号的阈值的绝对值状态到高电阻状态彼此不同。用于检测可变电阻元件中的记录层的电阻值的读取信号以一个具有较高绝对值并且具有低于绝对值的值的施加信号的阈值之一的极性被施加。

10. 发明申请

US20060279983A1 STORAGE DEVICE AND SEMICONDUCTOR APPARATUS 失效
标题翻译：存储器件和半导体器件
公开(公告)号：US20060279983A1
公开(公告)日：2006-12-14
申请号：US11422483
申请日：2006-06-06
申请人： Hidenari Hachino , Nobumichi Okazaki , Katsuhisa Aratani
发明人： Hidenari Hachino , Nobumichi Okazaki , Katsuhisa Aratani
IPC分类号： G11C11/00
CPC分类号： G11C13/003 , G11C13/0004 , G11C13/0007 , G11C13/0069 , G11C2013/0078 , G11C2213/15 , G11C2213/34 , G11C2213/76 , G11C2213/79
摘要： A storage device includes a storage element having first and second terminals that cause a first electrical characteristic change when an electric signal of a first threshold level or higher is applied and that cause a second electrical characteristic change, which is asymmetrical to the first electrical characteristic change, when an electric signal of a second threshold level or higher, the polarity of the electric signal of the second threshold level or higher being different from the polarity of the electric signal of the first threshold level or higher, is applied; and a unipolar transistor connected in series with the storage element. One of the first terminal and the second terminal of the storage element is electrically connected to the unipolar transistor. The unipolar transistor has a negative polarity or a positive polarity in accordance with the first terminal or the second terminal electrically connected to the unipolar transistor.
摘要翻译：存储装置包括具有第一和第二端子的存储元件，当施加第一阈值电平或更高的电信号并且引起与第一电特性变化不对称的第二电特性变化时，第一和第二端子引起第一电特性变化当施加第二阈值以上的电信号时，施加与第一阈值电平以上的电信号的极性不同的第二阈值电平以上的电信号的极性; 以及与存储元件串联连接的单极晶体管。存储元件的第一端子和第二端子之一电连接到单极晶体管。单极晶体管根据与单极晶体管电连接的第一端子或第二端子具有负极性或正极性。

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