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1. 发明授权

US08877576B2 Integrated circuit including a first channel and a second channel 有权
标题翻译：集成电路包括第一通道和第二通道
公开(公告)号：US08877576B2
公开(公告)日：2014-11-04
申请号：US11843883
申请日：2007-08-23
申请人： Gerhard Knoblinger , Franz Kuttner
发明人： Gerhard Knoblinger , Franz Kuttner
IPC分类号： H01L21/336 , H01L29/78 , H01L27/092 , H01L21/8238
CPC分类号： H01L21/823807 , H01L27/092 , H01L29/7843
摘要： An integrated circuit is disclosed. In one embodiment, the integrated circuit includes a first area and a second area. The first area is stress engineered to provide enhanced mobility in a first channel that has a first width. The second area is stress engineered to provide enhanced mobility in a second channel that has a second width. The first channel and the second channel provide a combined current that is greater than a single current provided via a single channel having a single width that is substantially equal to the sum of the first width and the second width.
摘要翻译：公开了一种集成电路。在一个实施例中，集成电路包括第一区域和第二区域。第一个区域是应力工程，以在具有第一宽度的第一通道中提供增强的移动性。第二区域是应力工程，以在具有第二宽度的第二通道中提供增强的移动性。第一通道和第二通道提供大于通过具有基本上等于第一宽度和第二宽度的总和的单个宽度的单个通道提供的单个电流的组合电流。

2. 发明申请

US20090250763A1 INTEGRATED CIRCUIT INCLUDING A FIRST CHANNEL AND A SECOND CHANNEL 审中-公开
标题翻译：集成电路，包括第一个通道和第二个通道
公开(公告)号：US20090250763A1
公开(公告)日：2009-10-08
申请号：US12486165
申请日：2009-06-17
申请人： Gerhard Knoblinger , Franz Kuttner
发明人： Gerhard Knoblinger , Franz Kuttner
IPC分类号： H01L27/092
CPC分类号： H01L21/823807 , H01L27/092 , H01L29/7843
摘要： An integrated circuit is disclosed. In one embodiment, the integrated circuit includes a first area and a second area. The first area is stress engineered to provide enhanced mobility in a first channel that has a first width. The second area is stress engineered to provide enhanced mobility in a second channel that has a second width. The first channel and the second channel provide a combined current that is greater than a single current provided via a single channel having a single width that is substantially equal to the sum of the first width and the second width.
摘要翻译：公开了一种集成电路。在一个实施例中，集成电路包括第一区域和第二区域。第一个区域是应力工程，以在具有第一宽度的第一通道中提供增强的移动性。第二区域是应力工程，以在具有第二宽度的第二通道中提供增强的移动性。第一通道和第二通道提供大于通过具有基本上等于第一宽度和第二宽度的总和的单个宽度的单个通道提供的单个电流的组合电流。

3. 发明授权

US08368144B2 Isolated multigate FET circuit blocks with different ground potentials 有权
标题翻译：具有不同接地电位的隔离式多重FET电路块
公开(公告)号：US08368144B2
公开(公告)日：2013-02-05
申请号：US11612233
申请日：2006-12-18
申请人： Franz Kuttner , Gerhard Knoblinger
发明人： Franz Kuttner , Gerhard Knoblinger
IPC分类号： H01L27/12
CPC分类号： H01L27/1203 , H01L29/785
摘要： An electronic circuit on a semiconductor substrate having isolated multiple gate field effect transistor circuit blocks is disclosed. In some embodiments, an electronic circuit has a substrate having a buried oxide insulating region. A MuGFET device may be formed above the buried oxide region and coupled to a first source of reference potential. A semiconductor device may be formed above the substrate and coupled to a second source of reference potential. A coupling network may be formed to couple the MuGFET device to the semiconductor device.
摘要翻译：公开了一种具有隔离多栅极场效应晶体管电路块的半导体衬底上的电子电路。在一些实施例中，电子电路具有具有掩埋氧化物绝缘区域的衬底。 MuGFET器件可以形成在掩埋氧化物区域上方并耦合到第一参考电位源。可以在衬底上方形成半导体器件，并耦合到第二参考电位源。可以形成耦合网络以将MuGFET器件耦合到半导体器件。

4. 发明申请

US20110043294A1 DeMOS DCO 审中-公开
公开(公告)号：US20110043294A1
公开(公告)日：2011-02-24
申请号：US12543637
申请日：2009-08-19
申请人： Gerhard KNOBLINGER , Marc TIEBOUT , Franz KUTTNER
发明人： Gerhard KNOBLINGER , Marc TIEBOUT , Franz KUTTNER
IPC分类号： H03B5/12
CPC分类号： H03B5/1228 , H03B5/1215 , H03B5/1265
摘要： The present disclosure relates voltage controlled oscillators (VCO) and digitally controlled oscillators (DCO). In one implementation, a VCO is implemented with drain extended MOS transistors (DeMOS). In another implementation, a DCO is implemented with DeMOS devices.
摘要翻译：本公开涉及压控振荡器（VCO）和数字控制振荡器（DCO）。在一个实现中，使用漏极扩展MOS晶体管（DeMOS）实现VCO。在另一个实现中，使用DeMOS设备实现DCO。

5. 发明授权

US07638370B2 Method for producing multi-gate field-effect transistor with fin structure having drain-extended MOS field-effect transistor 有权
标题翻译：具有漏极扩展MOS场效应晶体管的鳍结构的多栅极场效应晶体管的制造方法
公开(公告)号：US07638370B2
公开(公告)日：2009-12-29
申请号：US11800984
申请日：2007-05-08
申请人： Harald Gossner , Thomas Schulz , Christian Russ , Gerhard Knoblinger
发明人： Harald Gossner , Thomas Schulz , Christian Russ , Gerhard Knoblinger
IPC分类号： H01L29/78 , H01L21/332
CPC分类号： H01L29/78624 , H01L21/26586 , H01L21/84 , H01L27/0262 , H01L27/1203 , H01L29/66393 , H01L29/7436 , H01L29/78696 , H01L2924/0002 , H01L2924/00
摘要： In a method for producing an electronic component, a first doped connection region and a second doped connection region are formed on or above a substrate; a body region is formed between the first doped connection region and the second doped connection region; at least two gate regions separate from one another are formed on or above the body region; at least one partial region of the body region is doped by means of introducing dopant atoms, wherein the dopant atoms are introduced into the at least one partial region of the body region through at least one intermediate region formed between the at least two separate gate regions.
摘要翻译：在电子部件的制造方法中，在基板上或上方形成第一掺杂连接区域和第二掺杂连接区域，在所述第一掺杂连接区域和所述第二掺杂连接区域之间形成体区; 在身体区域上或上方形成彼此分离的至少两个栅极区域; 通过引入掺杂剂原子来掺杂体区的至少一个部分区域，其中通过形成在至少两个分开的栅极区域之间的至少一个中间区域将掺杂剂原子引入到体区的至少一个部分区域中。

6. 发明授权

US08492796B2 MuGFET switch 有权
标题翻译： MuGFET开关
公开(公告)号：US08492796B2
公开(公告)日：2013-07-23
申请号：US11685346
申请日：2007-03-13
申请人： Gerhard Knoblinger
发明人： Gerhard Knoblinger
IPC分类号： H01L27/118 , H01L27/148
CPC分类号： H01L29/785 , H01L27/1211
摘要： An electronic circuit on a semiconductor substrate having isolated multiple field effect transistor circuit blocks is disclosed. In some embodiment, an apparatus includes a substrate, a first semiconductor circuit formed above the substrate, a second semiconductor circuit formed above the substrate, and a MuGFET device overlying the substrate and electrically coupled to the first semiconductor circuit and the second semiconductor circuit, wherein the MuGFET device provides a signal path between the first semiconductor circuit and the second semiconductor circuit in response to an input signal.
摘要翻译：公开了具有隔离的多个场效应晶体管电路块的半导体衬底上的电子电路。在一些实施例中，一种装置包括衬底，形成在衬底上方的第一半导体电路，形成在衬底上方的第二半导体电路以及覆盖衬底并电耦合到第一半导体电路和第二半导体电路的MuGFET器件，其中 MuGFET器件响应于输入信号在第一半导体电路和第二半导体电路之间提供信号路径。

7. 发明申请

US20090050973A1 INTEGRATED CIRCUIT INCLUDING A FIRST CHANNEL AND A SECOND CHANNEL 有权
公开(公告)号：US20090050973A1
公开(公告)日：2009-02-26
申请号：US11843883
申请日：2007-08-23
申请人： Gerhard Knoblinger , Franz Kuttner
发明人： Gerhard Knoblinger , Franz Kuttner
IPC分类号： H01L21/8234 , H01L29/76
CPC分类号： H01L21/823807 , H01L27/092 , H01L29/7843
摘要： An integrated circuit is disclosed. In one embodiment, the integrated circuit includes a first area and a second area. The first area is stress engineered to provide enhanced mobility in a first channel that has a first width. The second area is stress engineered to provide enhanced mobility in a second channel that has a second width. The first channel and the second channel provide a combined current that is greater than a single current provided via a single channel having a single width that is substantially equal to the sum of the first width and the second width.

8. 发明申请

US20080142907A1 ISOLATED MULTIGATE FET CIRCUIT BLOCKS WITH DIFFERENT GROUND POTENTIALS 有权
标题翻译：具有不同接地电位的绝缘多极化FET电路块
公开(公告)号：US20080142907A1
公开(公告)日：2008-06-19
申请号：US11612233
申请日：2006-12-18
申请人： Franz Kuttner , Gerhard Knoblinger
发明人： Franz Kuttner , Gerhard Knoblinger
IPC分类号： H01L27/06 , H01L27/088 , H01L21/77
CPC分类号： H01L27/1203 , H01L29/785
摘要： An electronic circuit on a semiconductor substrate having isolated multiple gate field effect transistor circuit blocks is disclosed. In some embodiments, an electronic circuit has a substrate having a buried oxide insulating region. A MuGFET device may be formed above the buried oxide region and coupled to a first source of reference potential. A semiconductor device may be formed above the substrate and coupled to a second source of reference potential. A coupling network may be formed to couple the MuGFET device to the semiconductor device.
摘要翻译：公开了一种具有隔离多栅极场效应晶体管电路块的半导体衬底上的电子电路。在一些实施例中，电子电路具有具有掩埋氧化物绝缘区域的衬底。 MuGFET器件可以形成在掩埋氧化物区域上方并耦合到第一参考电位源。可以在衬底上方形成半导体器件，并耦合到第二参考电位源。可以形成耦合网络以将MuGFET器件耦合到半导体器件。

9. 发明授权

US08450156B2 Method for producing a thyristor 有权
标题翻译：晶闸管的制造方法
公开(公告)号：US08450156B2
公开(公告)日：2013-05-28
申请号：US13481969
申请日：2012-05-29
申请人： Harald Gossner , Thomas Schulz , Christian Russ , Gerhard Knoblinger
发明人： Harald Gossner , Thomas Schulz , Christian Russ , Gerhard Knoblinger
IPC分类号： H01L21/332
CPC分类号： H01L29/78624 , H01L21/26586 , H01L21/84 , H01L27/0262 , H01L27/1203 , H01L29/66393 , H01L29/7436 , H01L29/78696 , H01L2924/0002 , H01L2924/00
摘要： In a method for producing a thyristor, first and second connection regions are formed on or above a substrate; the first connection region is doped with dopant atoms of a first conductivity type and the second connection region is doped with dopant atoms of a second conductivity type; first and second body regions are formed between the connection regions, wherein the first body region is formed between the first connection region and second body region, and the second body region is formed between the first body region and second connection region; the first body region is doped with dopant atoms of the second conductivity type and the second body region is doped with dopant atoms of the first conductivity type, wherein the dopant atoms are in each case introduced into the respective body region using a Vt implantation method; a gate region is formed on or above the body regions.
摘要翻译：在晶闸管的制造方法中，在基板上或上方形成有第一和第二连接区域，第一连接区域掺杂有第一导电类型的掺杂剂原子，并且第二连接区域掺杂有第二导电类型的掺杂剂原子; 第一和第二体区域形成在连接区域之间，其中第一体区形成在第一连接区域和第二体区域之间，第二体区域形成在第一体区域和第二连接区域之间; 所述第一体区掺杂有所述第二导电类型的掺杂剂原子，并且所述第二体区掺杂有所述第一导电类型的掺杂剂原子，其中所述掺杂剂原子在每种情况下使用Vt注入方法引入相应的体区; 在身体区域上或上方形成栅极区域。

10. 发明申请

US20120252172A1 Method for producing a thyristor 有权
标题翻译：晶闸管的制造方法
公开(公告)号：US20120252172A1
公开(公告)日：2012-10-04
申请号：US13481969
申请日：2012-05-29
申请人： Harald Gossner , Thomas Schulz , Christian Russ , Gerhard Knoblinger
发明人： Harald Gossner , Thomas Schulz , Christian Russ , Gerhard Knoblinger
IPC分类号： H01L21/332
CPC分类号： H01L29/78624 , H01L21/26586 , H01L21/84 , H01L27/0262 , H01L27/1203 , H01L29/66393 , H01L29/7436 , H01L29/78696 , H01L2924/0002 , H01L2924/00
摘要： In a method for producing a thyristor, first and second connection regions are formed on or above a substrate; the first connection region is doped with dopant atoms of a first conductivity type and the second connection region is doped with dopant atoms of a second conductivity type; first and second body regions are formed between the connection regions, wherein the first body region is formed between the first connection region and second body region, and the second body region is formed between the first body region and second connection region; the first body region is doped with dopant atoms of the second conductivity type and the second body region is doped with dopant atoms of the first conductivity type, wherein the dopant atoms are in each case introduced into the respective body region using a Vt implantation method; a gate region is formed on or above the body regions.
摘要翻译：在晶闸管的制造方法中，在基板上或上方形成有第一和第二连接区域，第一连接区域掺杂有第一导电类型的掺杂剂原子，并且第二连接区域掺杂有第二导电类型的掺杂剂原子; 第一和第二体区域形成在连接区域之间，其中第一体区形成在第一连接区域和第二体区域之间，第二体区域形成在第一体区域和第二连接区域之间; 所述第一体区掺杂有所述第二导电类型的掺杂剂原子，并且所述第二体区掺杂有所述第一导电类型的掺杂剂原子，其中所述掺杂剂原子在每种情况下都使用Vt注入法引入所述体区; 在身体区域上或上方形成栅极区域。

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