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1. 发明授权

US08877576B2 Integrated circuit including a first channel and a second channel 有权
标题翻译：集成电路包括第一通道和第二通道
公开(公告)号：US08877576B2
公开(公告)日：2014-11-04
申请号：US11843883
申请日：2007-08-23
申请人： Gerhard Knoblinger , Franz Kuttner
发明人： Gerhard Knoblinger , Franz Kuttner
IPC分类号： H01L21/336 , H01L29/78 , H01L27/092 , H01L21/8238
CPC分类号： H01L21/823807 , H01L27/092 , H01L29/7843
摘要： An integrated circuit is disclosed. In one embodiment, the integrated circuit includes a first area and a second area. The first area is stress engineered to provide enhanced mobility in a first channel that has a first width. The second area is stress engineered to provide enhanced mobility in a second channel that has a second width. The first channel and the second channel provide a combined current that is greater than a single current provided via a single channel having a single width that is substantially equal to the sum of the first width and the second width.
摘要翻译：公开了一种集成电路。在一个实施例中，集成电路包括第一区域和第二区域。第一个区域是应力工程，以在具有第一宽度的第一通道中提供增强的移动性。第二区域是应力工程，以在具有第二宽度的第二通道中提供增强的移动性。第一通道和第二通道提供大于通过具有基本上等于第一宽度和第二宽度的总和的单个宽度的单个通道提供的单个电流的组合电流。

2. 发明申请

US20090250763A1 INTEGRATED CIRCUIT INCLUDING A FIRST CHANNEL AND A SECOND CHANNEL 审中-公开
标题翻译：集成电路，包括第一个通道和第二个通道
公开(公告)号：US20090250763A1
公开(公告)日：2009-10-08
申请号：US12486165
申请日：2009-06-17
申请人： Gerhard Knoblinger , Franz Kuttner
发明人： Gerhard Knoblinger , Franz Kuttner
IPC分类号： H01L27/092
CPC分类号： H01L21/823807 , H01L27/092 , H01L29/7843
摘要： An integrated circuit is disclosed. In one embodiment, the integrated circuit includes a first area and a second area. The first area is stress engineered to provide enhanced mobility in a first channel that has a first width. The second area is stress engineered to provide enhanced mobility in a second channel that has a second width. The first channel and the second channel provide a combined current that is greater than a single current provided via a single channel having a single width that is substantially equal to the sum of the first width and the second width.
摘要翻译：公开了一种集成电路。在一个实施例中，集成电路包括第一区域和第二区域。第一个区域是应力工程，以在具有第一宽度的第一通道中提供增强的移动性。第二区域是应力工程，以在具有第二宽度的第二通道中提供增强的移动性。第一通道和第二通道提供大于通过具有基本上等于第一宽度和第二宽度的总和的单个宽度的单个通道提供的单个电流的组合电流。

3. 发明申请

US20090050973A1 INTEGRATED CIRCUIT INCLUDING A FIRST CHANNEL AND A SECOND CHANNEL 有权
公开(公告)号：US20090050973A1
公开(公告)日：2009-02-26
申请号：US11843883
申请日：2007-08-23
申请人： Gerhard Knoblinger , Franz Kuttner
发明人： Gerhard Knoblinger , Franz Kuttner
IPC分类号： H01L21/8234 , H01L29/76
CPC分类号： H01L21/823807 , H01L27/092 , H01L29/7843
摘要： An integrated circuit is disclosed. In one embodiment, the integrated circuit includes a first area and a second area. The first area is stress engineered to provide enhanced mobility in a first channel that has a first width. The second area is stress engineered to provide enhanced mobility in a second channel that has a second width. The first channel and the second channel provide a combined current that is greater than a single current provided via a single channel having a single width that is substantially equal to the sum of the first width and the second width.

4. 发明申请

US20080142907A1 ISOLATED MULTIGATE FET CIRCUIT BLOCKS WITH DIFFERENT GROUND POTENTIALS 有权
标题翻译：具有不同接地电位的绝缘多极化FET电路块
公开(公告)号：US20080142907A1
公开(公告)日：2008-06-19
申请号：US11612233
申请日：2006-12-18
申请人： Franz Kuttner , Gerhard Knoblinger
发明人： Franz Kuttner , Gerhard Knoblinger
IPC分类号： H01L27/06 , H01L27/088 , H01L21/77
CPC分类号： H01L27/1203 , H01L29/785
摘要： An electronic circuit on a semiconductor substrate having isolated multiple gate field effect transistor circuit blocks is disclosed. In some embodiments, an electronic circuit has a substrate having a buried oxide insulating region. A MuGFET device may be formed above the buried oxide region and coupled to a first source of reference potential. A semiconductor device may be formed above the substrate and coupled to a second source of reference potential. A coupling network may be formed to couple the MuGFET device to the semiconductor device.
摘要翻译：公开了一种具有隔离多栅极场效应晶体管电路块的半导体衬底上的电子电路。在一些实施例中，电子电路具有具有掩埋氧化物绝缘区域的衬底。 MuGFET器件可以形成在掩埋氧化物区域上方并耦合到第一参考电位源。可以在衬底上方形成半导体器件，并耦合到第二参考电位源。可以形成耦合网络以将MuGFET器件耦合到半导体器件。

5. 发明授权

US08368144B2 Isolated multigate FET circuit blocks with different ground potentials 有权
标题翻译：具有不同接地电位的隔离式多重FET电路块
公开(公告)号：US08368144B2
公开(公告)日：2013-02-05
申请号：US11612233
申请日：2006-12-18
申请人： Franz Kuttner , Gerhard Knoblinger
发明人： Franz Kuttner , Gerhard Knoblinger
IPC分类号： H01L27/12
CPC分类号： H01L27/1203 , H01L29/785
摘要： An electronic circuit on a semiconductor substrate having isolated multiple gate field effect transistor circuit blocks is disclosed. In some embodiments, an electronic circuit has a substrate having a buried oxide insulating region. A MuGFET device may be formed above the buried oxide region and coupled to a first source of reference potential. A semiconductor device may be formed above the substrate and coupled to a second source of reference potential. A coupling network may be formed to couple the MuGFET device to the semiconductor device.
摘要翻译：公开了一种具有隔离多栅极场效应晶体管电路块的半导体衬底上的电子电路。在一些实施例中，电子电路具有具有掩埋氧化物绝缘区域的衬底。 MuGFET器件可以形成在掩埋氧化物区域上方并耦合到第一参考电位源。可以在衬底上方形成半导体器件，并耦合到第二参考电位源。可以形成耦合网络以将MuGFET器件耦合到半导体器件。

6. 发明授权

US09699014B2 Digital modulation jitter compensation for polar transmitter 有权
公开(公告)号：US09699014B2
公开(公告)日：2017-07-04
申请号：US13412533
申请日：2012-03-05
申请人： Markus Schimper , Franz Kuttner
发明人： Markus Schimper , Franz Kuttner
IPC分类号： H04L27/36
CPC分类号： H04L27/361 , H04L27/367
摘要： This disclosure is directed towards techniques and methods of suppressing the effect of modulated clock jitter in a digital to analog conversion (DAC) circuit of a polar modulator in a transceiver. A phase locked loop (PLL) in a modulator circuit may introduce a deterministic jitter in DAC generated pulses which may lead to amplitude variations in the DAC generated pulses. The clock jitter may change the duty cycle of the input amplitude to the DAC which may result in a variation of the output of the DAC generated pulse. A digital pre-distortion or digital multiplier circuit may be introduced before the DAC circuit to increase or decrease the DAC amplitude to compensate for the pulse width modulation.

7. 发明授权

US08854127B2 DC-DC converter for envelope tracking 有权
标题翻译：用于包络跟踪的DC-DC转换器
公开(公告)号：US08854127B2
公开(公告)日：2014-10-07
申请号：US13471839
申请日：2012-05-15
申请人： Franz Kuttner
发明人： Franz Kuttner
IPC分类号： H03G3/20
CPC分类号： H02M3/158 , H02M3/157 , H03F1/0227 , H03F1/025
摘要： Embodiments provide a DC-DC converter (DC-DC=direct current to direct current) for envelope tracking. The DC-DC converter includes a digital control stage and a driving stage. The digital control stage is configured to provide a digital control signal based on digital information describing an amplitude of a digital baseband transmit signal. The driving stage is configured to provide a supply voltage for an RF amplifier (RF=radio frequency) based on the digital control signal.
摘要翻译：实施例提供用于包络跟踪的DC-DC转换器（DC-DC =直流电流）。 DC-DC转换器包括数字控制级和驱动级。数字控制级被配置为基于描述数字基带发送信号的幅度的数字信息来提供数字控制信号。驱动级被配置为基于数字控制信号为RF放大器（RF =射频）提供电源电压。

8. 发明申请

US20140146914A1 Digital to Analog Converter Comprising Mixer 有权
标题翻译：数模转换器包括混频器
公开(公告)号：US20140146914A1
公开(公告)日：2014-05-29
申请号：US13688980
申请日：2012-11-29
申请人： Franz Kuttner , Michael Fulde
发明人： Franz Kuttner , Michael Fulde
IPC分类号： H03M1/66 , H04L27/04
CPC分类号： H03M1/66 , H03M1/0624 , H03M1/685
摘要： One example described herein relates to a digital to analog converter (DAC). The DAC includes a digital signal input configured to receive a multi-bit digital input signal, and a plurality of cells arranged in rows and columns. Each cell includes a current source. A row decoder and a column decoder provide respective control signals to respective rows and respective columns to selectively couple a number of the current sources to an output of the DAC. The number of current sources which are coupled to the output by the control signals is dependent on the multi-bit digital input signal. At least one of the control signals is modulated based on a local oscillator signal.
摘要翻译：本文描述的一个示例涉及数模转换器（DAC）。 DAC包括被配置为接收多位数字输入信号的数字信号输入和以行和列排列的多个单元。每个单元格包括一个电流源。行解码器和列解码器向相应的行和相应列提供相应的控制信号，以选择性地将多个电流源耦合到DAC的输出。通过控制信号耦合到输出的电流源的数量取决于多位数字输入信号。基于本地振荡器信号调制至少一个控制信号。

9. 发明授权

US08653995B2 Compensation of nonlinearity of single ended digital to analog converters 有权
标题翻译：单端数模转换器的非线性补偿
公开(公告)号：US08653995B2
公开(公告)日：2014-02-18
申请号：US13103917
申请日：2011-05-09
申请人： Franz Kuttner
发明人： Franz Kuttner
IPC分类号： H03M1/66
CPC分类号： H03M1/1057 , H03M1/745
摘要： This disclosure relates to a compensating for nonlinearity resulting from a capacitance feedback in current cells of a single ended digital to analog circuit.
摘要翻译：本公开涉及对单端数字模拟电路的当前单元中的电容反馈产生的非线性的补偿。

10. 发明申请

US20070046518A1 Digital-analog converter and digital-analog conversion method 有权
公开(公告)号：US20070046518A1
公开(公告)日：2007-03-01
申请号：US10564312
申请日：2004-07-07
申请人： Franz Kuttner
发明人： Franz Kuttner
IPC分类号： H03M1/66
CPC分类号： H03M1/066 , H03M1/685 , H03M3/502
摘要： The present invention provides a digital-analog converter having: a DEM logic device (10) for generating at least two digital output data items (13, 14) from the digital input data (11) on the basis of a predetermined algorithm to determine an initial cell and a final cell in the array arrangement (22), between which there are situated cells (24) with energy sources (30) to be activated; a decoder device (16) for decoding the at least two digital output data items (13, 14) from the DEM device (10) into actuation signals (17, 17′, 18, 18′, 19, 19′ 20, 20′, 21, 21′) in order to activate the cells (24) which are to be activated; and an array arrangement (22) of cells (23) for outputting at least one quantized analog signal (25, 25′) on the basis of the actuation signals (17, 17′, 18, 18′, 19, 19′ 20, 20′, 21, 21′). The present invention likewise provides a method for digital-analog conversion.

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