专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US07033926B2 Strip conductor arrangement and method for producing a strip conductor arrangement 失效
标题翻译：带状导体布置及其制造方法
公开(公告)号：US07033926B2
公开(公告)日：2006-04-25
申请号：US10487190
申请日：2002-08-09
申请人： Günther Schindler , Werner Pamler , Zvonimir Gabric
发明人： Günther Schindler , Werner Pamler , Zvonimir Gabric
IPC分类号： H01L21/4763
CPC分类号： H01L23/5222 , H01L21/7682 , H01L2924/0002 , H01L2924/00
摘要： An interconnect arrangement comprises a substrate made from a first insulating material with a substrate surface, at least two interconnects which are arranged next to one another in the substrate, a buffer layer made from a second insulating material above the substrate and comprising a buffer-layer surface, which is parallel to the substrate surface, at least one cavity, which is arranged between the interconnects and, with respect to the buffer-layer surface, extends deeper into the substrate than the interconnects, and a covering layer made from a third insulating material, which is arranged above the buffer layer and completely closes off the cavity with respect to the buffer-layer surface.
摘要翻译：互连装置包括由具有衬底表面的第一绝缘材料制成的衬底，在衬底中彼此相邻布置的至少两个互连件，由衬底上方的第二绝缘材料制成的缓冲层，并且包括缓冲层平行于衬底表面的表面，布置在互连件之间的至少一个空腔相对于缓冲层表面比互连件更深地延伸到衬底中，并且由第三绝缘体制成的覆盖层材料，其布置在缓冲层上方并相对于缓冲层表面完全封闭空腔。

2. 发明授权

US06649424B2 Method for fabricating an integrated semiconductor circuit having a strongly polarizable dielectric or ferroelectric 有权
公开(公告)号：US06649424B2
公开(公告)日：2003-11-18
申请号：US10154340
申请日：2002-05-23
申请人： Manfred Mört , Walter Hartner , Volker Weinrich , Günther Schindler
发明人： Manfred Mört , Walter Hartner , Volker Weinrich , Günther Schindler
IPC分类号： H01L2100
CPC分类号： H01L28/55 , H01L21/02197 , H01L21/02282 , H01L21/02285 , H01L21/31691
摘要： A method of fabricating semiconductor circuits having integrated capacitors that have a dielectric or a ferroelectric material between electrodes. The materials are subjected to heat treatment at high temperatures in an oxygen atmosphere for the purpose of crystallization. The dielectric or ferroelectric is heated separately from the semiconductor substrate, is comminuted into small particles and only afterward applied in this form to the semiconductor substrate. This makes it possible to integrate substances with arbitrarily high crystallization temperature without damaging the integrated semiconductor circuit, since the semiconductor substrate itself does not have to be heated. Diffusion barriers for oxygen are unnecessary. Previous limitations on the capacitor capacitance are obviated owing to the free choice of dielectric or ferroelectric made possible, and the packing density of the capacitors is increased.

3. 发明授权

US06515891B2 Random access memory with hidden bits 有权
公开(公告)号：US06515891B2
公开(公告)日：2003-02-04
申请号：US09996260
申请日：2001-11-28
申请人： Matthias Krönke , Günther Schindler
发明人： Matthias Krönke , Günther Schindler
IPC分类号： G11C1122
CPC分类号： G11C11/404 , G11C7/20
摘要： A random access memory having a multiplicity of memory cells having logic states that can be changed by a control voltage. At least some of the memory cells include an additional device that can be activated by means of an enforced control voltage that is different from the control voltage, in order to impress a defined logic state on the memory cell.

4. 发明授权

US06495415B2 Method for fabricating a patterned layer 有权
公开(公告)号：US06495415B2
公开(公告)日：2002-12-17
申请号：US10027532
申请日：2001-12-26
申请人： Walter Hartner , Igor Kasko , Volker Weinrich , Frank Hintermaier , Günther Schindler , Hermann Wendt
发明人： Walter Hartner , Igor Kasko , Volker Weinrich , Frank Hintermaier , Günther Schindler , Hermann Wendt
IPC分类号： H01L218242
CPC分类号： B82Y30/00 , B82Y10/00 , H01L21/76838 , H01L27/10852 , H01L28/60
摘要： A method for fabricating a patterned layer from a layer material. The method includes steps of: providing a substrate with at least one target region and at least one migration region; applying a layer material; adding a material to the layer material; and performing a heat treatment such that the layer material migrates from the migration region to the target region and a layer which is self-aligned and self-patterned with respect to the target region is formed. The method has the advantage that the layer material, which can often only be etched with difficulty, does not have to be patterned directly. The desired structure of the layer is predetermined by preliminarily structuring the substrate into a target region and a migration region, and is produced by the migration of the layer material as a result of the heat treatment.

5. 发明授权

US06316802B1 Easy to manufacture integrated semiconductor memory configuration with platinum electrodes 失效
标题翻译：易于制造的集成半导体存储器配置采用铂电极
公开(公告)号：US06316802B1
公开(公告)日：2001-11-13
申请号：US09282091
申请日：1999-03-30
申请人： Günther Schindler , Walter Hartner , Frank Hintermaier , Carlos Mazure-Espejo , Rainer Bruchhaus , Wolfgang Hönlein , Manfred Engelhardt
发明人： Günther Schindler , Walter Hartner , Frank Hintermaier , Carlos Mazure-Espejo , Rainer Bruchhaus , Wolfgang Hönlein , Manfred Engelhardt
IPC分类号： H01L27108
CPC分类号： H01L27/11502
摘要： The integrated semiconductor memory configuration has a semiconductor body in which selection transistors and storage capacitors are integrated. The storage capacitors have a dielectric layer configured between two electrodes. At least the upper electrode is constructed in a layered manner with a platinum layer, that is seated on the dielectric layer, and a thicker, base metal layer lying above the platinum layer.
摘要翻译：集成半导体存储器配置具有集成了选择晶体管和存储电容器的半导体本体。存储电容器具有在两个电极之间配置的电介质层。至少上电极以分层的方式构成，铂层位于电介质层上，而较厚的贱金属层位于铂层之上。

6. 发明授权

US07262984B2 Method and apparatus for storing and reading information in a ferroelectric material 有权
标题翻译：用于在铁电材料中存储和读取信息的方法和装置
公开(公告)号：US07262984B2
公开(公告)日：2007-08-28
申请号：US11034219
申请日：2005-01-13
申请人： Günther Schindler , Markus Vogel , Christian Erich Zybill
发明人： Günther Schindler , Markus Vogel , Christian Erich Zybill
IPC分类号： G11C11/22
CPC分类号： G11B9/1409 , B82Y10/00 , G11B9/02 , G11B9/14 , G11B9/1445 , G11B9/1463 , G11B11/007 , G11B11/16
摘要： To store information in a ferroelectric material, a sample probe is used to bring about mechanical action on individual domains and thereby to cause a reversal of polarization in the individual domains, with electrodes situated below the ferroelectric material being able to have a bias applied to them to stabilize the change/reversal of polarization. The reversal of polarization causes an alteration in the surface topography of the ferroelectric material, and this alteration can be used to read the information. The stored information is therefore obtained by ascertaining the surface topography of the ferroelectric material. The information is written and read using an AFM tip, with the tip being able to be operated in contact or tapping mode for the purpose of writing, and additionally in noncontact mode for the purpose of reading.
摘要翻译：为了将信息存储在铁电材料中，使用样本探针来对各个区域产生机械作用，从而导致各个区域中的极化反转，位于铁电材料下方的电极能够施加偏压以稳定极化的变化/反转。极化的反转导致铁电材料的表面形貌的变化，并且这种改变可以用于读取信息。因此，通过确定铁电材料的表面形貌来获得所存储的信息。使用AFM提示书写入和读取信息，为了写入目的，提示能够以接触或敲击模式操作，另外以非接触模式进行阅读。

7. 发明授权

US06681148B2 Monitoring system for a conveying device for flat articles, especially wafers 失效
标题翻译：用于扁平制品，特别是晶片的输送装置的监测系统
公开(公告)号：US06681148B2
公开(公告)日：2004-01-20
申请号：US10149046
申请日：2002-06-03
申请人： Hans Lettner , Xaver Kollmer , Günther Schindler , Ernst Georg Frisch
发明人： Hans Lettner , Xaver Kollmer , Günther Schindler , Ernst Georg Frisch
IPC分类号： G06F700
CPC分类号： H01L21/67259 , G05B19/404 , G05B2219/37555 , G05B2219/37571 , H01L21/67742 , Y10S414/137
摘要： The invention relates to a monitoring system for a conveying device for flat articles, especially wafers, which conveying device is provided with a carriage (28) that is movable along a predetermined path next to a flat article (10) that is located at a predetermined removal location, the carriage having a receiving device for the accommodation of the flat article (10), which monitoring system contains a light source (50) having a light-exit window and a light receiver (52) having a light-admission window, whereby the light-exit window and the light-admission window are positioned in such a way that a light beam (60) directed form the light-exit window to the light-admission window is partially covered by the carriage (28) during its movement through the light beam, and an evaluation unit that is connected to the light receiver and that compares a target signal derived from its movement of the carriage along a target path with an actual signal derived from an actual movement of the carriage, and indicates a deviation.
摘要翻译：本发明涉及一种用于扁平制品，特别是晶片的输送装置的监测系统，该输送装置设置有可沿着预定路径移动的托架（28），所述托架位于预定的平坦制品（10）旁边，所述托架具有用于平坦物品（10）的容纳的接收装置，该监视系统包含具有出射窗的光源（50）和具有入光窗的光接收器（52）由此所述出光窗口和所述光入口窗口被定位成使得从所述光出射窗口到所述入光窗口的指向的光束（60）在其运动期间被所述托架（28）部分地覆盖通过光束，以及评估单元，其连接到光接收器，并且将从其沿着目标路径的滑架的移动导出的目标信号与从轿厢的实际运动导出的实际信号进行比较并且表示偏差。

8. 发明授权

US06586348B2 Method for preventing etching-induced damage to a metal oxide film by patterning the film after a nucleation anneal but while still amorphous and then thermally annealing to crystallize 有权
标题翻译：通过在成核退火之后对膜进行图案化但是仍然是无定形然后热退火以结晶的方法来防止蚀刻对金属氧化物膜的损伤
公开(公告)号：US06586348B2
公开(公告)日：2003-07-01
申请号：US09850585
申请日：2001-05-07
申请人： Walter Hartner , Günther Schindler , Frank Hintermaier , Volker Weinrich
发明人： Walter Hartner , Günther Schindler , Frank Hintermaier , Volker Weinrich
IPC分类号： H01L2131
CPC分类号： H01L21/02197 , H01L21/02356 , H01L21/31122 , H01L21/31691 , H01L21/32136 , H01L28/55
摘要： After an SBT layer is precipitated onto a substrate, the SBT layer is structured as a still amorphous layer. Only subsequently is it subjected to a crystallization process. Layers produced in this manner have a relatively high degree of dielectric strength and have no stoichiometric deviations on the etched edges.
摘要翻译：在SBT层沉积到衬底上之后，SBT层被构造为静止非晶层。只有随后才进行结晶过程。以这种方式生产的层具有相对高的介电强度，并且在蚀刻的边缘上不具有化学计量偏差。

9. 发明授权

US06730562B2 Method of patterning ferroelectric layers 失效
标题翻译：铁电层图案的方法
公开(公告)号：US06730562B2
公开(公告)日：2004-05-04
申请号：US10364819
申请日：2003-02-11
申请人： Manfred Engelhardt , Walter Hartner , Frank Hintermaier , Günther Schindler , Volker Weinrich
发明人： Manfred Engelhardt , Walter Hartner , Frank Hintermaier , Günther Schindler , Volker Weinrich
IPC分类号： H01L218242
CPC分类号： H01L28/55 , H01L21/31122
摘要： A method for structuring ferroelectric layers on semiconductor substrates retains or regenerates the adherence and breakdown voltage resistance of the ferroelectric layer, which is especially significant for producing storage capacitors in large-scale integrated FeRAM and DRAM memory components. The addition of H2O or O2 results principally in the recovery of the electrostatic breakdown strength of the ferroelectric layer, which is of importance in particular when the ferroelectric serves as a dielectric of a storage capacitor and has to withstand electric fields of 5-10×106 V/m without a significant leakage current.
摘要翻译：用于在半导体衬底上构造铁电层的方法保留或再生强电介质层的粘附和耐击穿电压，这对于在大规模集成的FeRAM和DRAM存储器组件中产生存储电容器尤其重要。 H 2 O或O 2的添加主要导致铁电层的静电击穿强度的恢复，特别是当铁电体用作储能电容器的电介质并且必须承受5-10×10 6的电场时，这尤其重要 > V / m，没有明显的漏电流。

10. 发明授权

US06627934B1 Integrated semiconductor memory configuration with a buried plate electrode and method for its fabrication 失效
标题翻译：具有掩埋板电极的集成半导体存储器配置及其制造方法
公开(公告)号：US06627934B1
公开(公告)日：2003-09-30
申请号：US09281696
申请日：1999-03-30
申请人： Günther Schindler , Carlos Mazure-Espejo
发明人： Günther Schindler , Carlos Mazure-Espejo
IPC分类号： H01L27108
CPC分类号： H01L27/11502 , H01L27/10805 , H01L27/10829
摘要： A semiconductor memory configuration has a plurality of selection transistors. Each selection transistor is connected to a first electrode of a storage capacitor. A second electrode of the storage capacitor is connected to a common plate. The common plate is provided below the selection transistors in a semiconductor body. A method of fabricating a semiconductor memory configuration is also provided.
摘要翻译：半导体存储器配置具有多个选择晶体管。每个选择晶体管连接到存储电容器的第一电极。存储电容器的第二电极连接到公共板。公共板设置在半导体本体中的选择晶体管的下方。还提供了制造半导体存储器配置的方法。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式