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1. 发明申请

US20130298864A1 COVERING DEVICE FOR A SPARK PLUG SHAFT AND OPTICAL FIBER DEVICE FOR A LASER SPARK PLUG 审中-公开
标题翻译：用于激光火花塞的火花塞轴和光纤装置的覆盖装置
公开(公告)号：US20130298864A1
公开(公告)日：2013-11-14
申请号：US13885297
申请日：2011-09-13
申请人： Karl-Heinz Nuebel , Manfred Vogel , Frank Barth , Martin Weinrotter
发明人： Karl-Heinz Nuebel , Manfred Vogel , Frank Barth , Martin Weinrotter
IPC分类号： H01T13/06
CPC分类号： H01T13/06 , F02F1/242 , F02P23/04
摘要： A covering device for a spark plug shaft of an internal combustion engine has a fastening element provided for mechanically fastening the covering device to a target system, the fastening element being configured to electrically conductively connect at least one electric conductor to the covering device (100) and/or the target system.
摘要翻译：一种用于内燃机的火花塞轴的覆盖装置，具有用于将覆盖装置机械地紧固到目标系统的紧固元件，所述紧固元件构造成将至少一个电导体导电地连接到覆盖装置（100）和/或目标系统。

2. 发明授权

US07519755B2 Combined command and response on-chip data interface for a computer system chipset 失效
标题翻译：用于计算机系统芯片组的命令和响应片上数据接口
公开(公告)号：US07519755B2
公开(公告)日：2009-04-14
申请号：US10964884
申请日：2004-10-14
申请人： Thomas Kunjan , Joerg Winkler , Frank Barth
发明人： Thomas Kunjan , Joerg Winkler , Frank Barth
IPC分类号： G06F13/00
CPC分类号： G06F13/4273
摘要： An integrated circuit chip, particularly a southbridge, is provided that has a first and a second circuit unit. Each circuit unit can send requests to the other one and send back a response when receiving a request that requires a response. The first circuit unit is connected to the second circuit unit to send to the second circuit unit request data relating to a request to be sent by the first circuit unit and response data relating to a response to be sent by the first circuit unit over a shared signal line.
摘要翻译：提供具有第一和第二电路单元的集成电路芯片，特别是南桥。每个电路单元可以向另一个电路单元发送请求，并在接收到需要响应的请求时发送响应。第一电路单元连接到第二电路单元，以向第二电路单元发送与由第一电路单元发送的请求相关的数据，以及与第一电路单元通过共享的要发送的响应有关的响应数据信号线。

3. 发明授权

US06839654B2 Debug interface for an event timer apparatus 失效
标题翻译：事件定时器设备的调试接口
公开(公告)号：US06839654B2
公开(公告)日：2005-01-04
申请号：US10361089
申请日：2003-02-07
申请人： René Röllig , Jens Meyer , Frank Barth , Alexander Krebs
发明人： René Röllig , Jens Meyer , Frank Barth , Alexander Krebs
IPC分类号： G06F1/14 , G06F11/36 , G04F10/00
CPC分类号： G06F11/3648 , G06F1/14 , G06F11/3656
摘要： An on-chip event timer apparatus including a hardware timer and a debug interface. The hardware timer includes at least an up-counter for counting clocks of a clock signal, a match register for storing a programmable count value, and a comparator for monitoring whether the up-counter's count value matches the count value of the match register. The debug interface includes enable control unit for enabling the up-counter's operation based on a pre-defined relationship between a state of an enabled signal supplied to said up-counter and an internal state of the hardware timer. Additionally, the debug interface may comprise a clock divider connected to the enable control unit to reduce the clock's frequency in accordance with a pre-programmed divider value. Based on the received clock with the reduced clock frequency, the enable control unit adapts the up-counter's processing speed to the reduced clock frequency.

4. 发明授权

US06718356B1 In-place operation method and apparatus for minimizing the memory of radix-r FFTs using maximum throughput butterflies 失效
标题翻译：使用最大吞吐量蝴蝶最小化radix-r FFT存储器的就地操作方法和装置
公开(公告)号：US06718356B1
公开(公告)日：2004-04-06
申请号：US09595409
申请日：2000-06-16
申请人： Stephan Rosner , Frank Barth
发明人： Stephan Rosner , Frank Barth
IPC分类号： G06F1500
CPC分类号： G06F17/142
摘要： The invention relates generally to radix-r FFTs (Fast Fourier Transforms), and more particularly to a method and an apparatus for assigning data samples to memory when computing a radix-r FFT. In one embodiment, the apparatus comprises a plurality of memory banks for storing the data samples, a memory bank counter indicating the memory banks, a data sample counter for counting an increment of the data samples, a region difference counter for counting a region difference change of a butterfly stage, a computer program having the current values of the data sample counter and the region difference counter as input values for determining whether the fractional part of the current data sample value divided by the current region difference value equals zero, and a multiplexer for multiplexing the current data sample to an assigned memory bank if the fractional part is not equal zero.
摘要翻译：本发明一般涉及基数FFT（快速傅里叶变换），更具体地说，涉及一种在计算基数r FFT时将数据样本分配给存储器的方法和装置。在一个实施例中，该装置包括用于存储数据样本的多个存储器组，指示存储体的存储器组计数器，用于对数据采样的增量进行计数的数据采样计数器，用于计数区域差变化的区域差计数器蝶形阶段的计算机程序，具有数据采样计数器的当前值和区域差计数器的计算机程序作为用于确定当前数据采样值的当前数据采样值的当前区间差值是否等于零的输入值;以及多路复用器如果分数部分不等于零，则将当前数据样本多路复用到分配的存储体。

5. 发明授权

US07165125B2 Buffer sharing in host controller 失效
标题翻译：主机控制器中的缓冲区共享
公开(公告)号：US07165125B2
公开(公告)日：2007-01-16
申请号：US10817572
申请日：2004-04-02
申请人： Robert Lissel , Bernd Schönfelder , Frank Barth
发明人： Robert Lissel , Bernd Schönfelder , Frank Barth
IPC分类号： G06F31/20 , G06F13/00
CPC分类号： G06F3/0661 , G06F3/0607 , G06F3/0674 , G06F13/28 , G06F13/385
摘要： A storage device host controller such as an SATA (Serial ATA) host controller and a corresponding method are provided for performing host-to-device and device-to-host communications in a PIO (Programmed I/O) data transfer mode and a DMA (Direct Memory Access) data transfer mode. The host controller comprises a buffer unit for buffering data and a data stream selection unit for selecting a data stream for submission to the buffer unit. The data stream selection unit is connected to receive at any one time at least one of a host-to-device data stream in the PIO data transfer mode, a host-to-device data stream in the DMA data transfer mode, a device-to-host data stream in the PIO data transfer mode, and a device-to-host data stream in the DMA data transfer mode, and select from the received data streams the data stream to be submitted to the buffer unit.
摘要翻译：提供诸如SATA（串行ATA）主机控制器和相应方法的存储设备主机控制器，用于在PIO（编程I / O）数据传输模式和DMA中执行主机到设备和设备到主机的通信（直接存储器访问）数据传输模式。主机控制器包括用于缓冲数据的缓冲器单元和用于选择用于提交到缓冲器单元的数据流的数据流选择单元。数据流选择单元被连接以在任何一个时间接收PIO数据传送模式的主机到设备数据流中的至少一个，DMA数据传送模式中的主机到设备数据流，在PIO数据传送模式中的主机数据流，以及DMA数据传送模式中的设备到主机数据流，并从所接收的数据流中选择要提交给缓冲器单元的数据流。

6. 发明申请

US20060069974A1 One-hot encoded instruction register for boundary scan test compliant devices 审中-公开
标题翻译：用于边界扫描测试兼容设备的单热编码指令寄存器
公开(公告)号：US20060069974A1
公开(公告)日：2006-03-30
申请号：US11011398
申请日：2004-12-14
申请人： Thomas Herrmann , Frank Barth
发明人： Thomas Herrmann , Frank Barth
IPC分类号： G01R31/28
CPC分类号： G01R31/318555 , G01R31/318572
摘要： An integrated circuit chip operable in a plurality of Boundary Scan test modes in which at least a part of the circuitry comprised in the integrated circuit chip is tested is provided. The integrated circuit chip comprises a Boundary Scan register and an instruction register. The Boundary Scan register is arranged to perform a test on the tested part of the circuitry by applying a test signal to the tested part of the circuitry and/or storing an output of the tested part of the circuitry in accordance with one of the Boundary Scan test modes. The instruction register is arranged to store a one-hot encoded instruction identifying one of the Boundary Scan test modes. The Boundary Scan register is further arranged to extract which test to perform on the tested part of the circuitry from the one-hot encoded instruction stored in the instruction register. The integrated circuit chip and corresponding methods and hardware devices may benefit from increased test flexibility and reduced time to market.
摘要翻译：提供可在多个边界扫描测试模式中操作的集成电路芯片，其中测试集成电路芯片中包括的电路的至少一部分。集成电路芯片包括边界扫描寄存器和指令寄存器。边界扫描寄存器被布置成通过将测试信号施加到电路的测试部分和/或根据边界扫描中的一个存储电路的测试部分的输出来对所测试的部分电路进行测试测试模式。指令寄存器被设置为存储识别边界扫描测试模式之一的单热编码指令。边界扫描寄存器还被布置为从存储在指令寄存器中的单热编码指令中提取在电路的测试部分上执行哪个测试。集成电路芯片和相应的方法和硬件设备可以从增加的测试灵活性和缩短上市时间中受益。

7. 发明授权

US07016994B2 Retry mechanism for blocking interfaces 有权
标题翻译：阻塞接口的重试机制
公开(公告)号：US07016994B2
公开(公告)日：2006-03-21
申请号：US10285935
申请日：2002-11-01
申请人： Joerg Winkler , Frank Barth
发明人： Joerg Winkler , Frank Barth
IPC分类号： G06F13/14
CPC分类号： G06F13/36
摘要： An improved interface technology is provided that may be applied to PCI (Peripheral Component Interconnect) devices connected to a southbridge. Requests are received from at least one requestor. The request require responses to be sent back to the respective requestor. The requests are placed by the respective requestor by asserting a request signal, and the request signal is deasserted by the respective requestor when a response is sent back. A retry request may be sent to the current requestor for requesting the current requestor to deassert its request signal although a response has not yet been sent back, and to reassert the request signal later. Together with the retry request, a ready signal is sent indicating whether the request could be processed. This allows the requestor to modify its request when retrying it, if the request was not yet processed.
摘要翻译：提供了可以应用于连接到南桥的PCI（外围组件互连）设备的改进的接口技术。从至少一个请求者收到请求。请求需要将响应发回给相应的请求者。请求由相应的请求者通过断言请求信号来放置，并且当发送回应时，请求信号由相应的请求者解除断言。可以向当前请求者发送重试请求，以请求当前请求者解除其请求信号，尽管响应尚未被发送回来，并且稍后重新发送请求信号。与重试请求一起发送就绪信号，指示是否可以处理该请求。这允许请求者在重试时修改其请求，如果请求尚未处理。

8. 发明授权

US06671748B1 Method and apparatus for passing device configuration information to a shared controller 有权
标题翻译：将设备配置信息传递给共享控制器的方法和装置
公开(公告)号：US06671748B1
公开(公告)日：2003-12-30
申请号：US09904374
申请日：2001-07-11
申请人： Terry Lynn Cole , Dale E. Gulick , Timothy C. Maleck , Frank Barth , Joerg Winkler
发明人： Terry Lynn Cole , Dale E. Gulick , Timothy C. Maleck , Frank Barth , Joerg Winkler
IPC分类号： G06F1300
CPC分类号： G06F13/387
摘要： A method and apparatus for passing device configuration information to a shared controller. In one embodiment, a host controller may be configured to read configuration from one or more peripheral devices coupled to a serial bus. The peripheral devices may include coder/decoder (codec) circuitry, and may be implemented using a riser card. The host controller may employ one or more of several different techniques in order to read configuration information from the peripheral device. The configuration information at a minimum includes a device identifier, which may identify the vendor and the function of the device. Additional information needed to configure the device to communicate over the peripheral bus may also be obtained with a read of the device, or various lookup mechanisms, such as a lookup table or a tree-like data structure. After configuration information has been obtained for each device coupled to the bus, the host controller may dynamically configure each of the devices for communication over the bus, thereby allowing the flexibility to enumerate riser cards and add new functions through peripheral devices to the computer system in which the bus is implemented.
摘要翻译：一种用于将设备配置信息传递到共享控制器的方法和装置。在一个实施例中，主机控制器可以被配置为从耦合到串行总线的一个或多个外围设备读取配置。外围设备可以包括编码器/解码器（编解码器）电路，并且可以使用转接卡来实现。主机控制器可以采用几种不同技术中的一种或多种，以便从外围设备读取配置信息。配置信息至少包括设备标识符，其可以标识供应商和设备的功能。通过设备的读取或诸如查找表或树状数据结构的各种查找机制也可以获得将设备配置成通过外围总线进行通信所需的附加信息。在针对耦合到总线的每个设备获得配置信息之后，主机控制器可以动态地配置每个设备以通过总线进行通信，从而允许灵活地枚举转接卡并且通过外围设备将新功能添加到计算机系统总线实施。

9. 发明申请

US20120316822A1 MOVEMENT MONITOR AND USE 审中-公开
标题翻译：运动监控和使用
公开(公告)号：US20120316822A1
公开(公告)日：2012-12-13
申请号：US13513394
申请日：2010-10-27
申请人： Frank Barth , Christian Maeurer
发明人： Frank Barth , Christian Maeurer
IPC分类号： G01P15/18 , G06F15/00
CPC分类号： A61B5/1113 , A61B5/1112 , A61B5/1118 , G01C21/165 , G01C22/00 , G06F19/3481
摘要： In a movement monitor, at least one sensor for determining the acceleration and altitude differences is provided in addition to at least one sensor for determining location information. These sensors are linked in such a way that they are suitable for determining the energy conversion during a movement.
摘要翻译：在运动监视器中，除了用于确定位置信息的至少一个传感器之外，还提供用于确定加速度和高度差的至少一个传感器。这些传感器以这样的方式连接，使得它们适合于确定运动期间的能量转换。

10. 发明授权

US08244950B2 Buffering non-posted read commands and responses 有权
标题翻译：缓冲非发布的读取命令和响应
公开(公告)号：US08244950B2
公开(公告)日：2012-08-14
申请号：US10285931
申请日：2002-11-01
申请人： Frank Barth , Larry Hewitt , Joerg Winkler , Paul Miranda
发明人： Frank Barth , Larry Hewitt , Joerg Winkler , Paul Miranda
IPC分类号： G06F3/00 , G06F5/00 , G06F13/36
CPC分类号： G06F13/4059
摘要： An improved interface technique for use in a southbridge or I/O hub or in similar devices is provided where non-posted read requests are received from at least one requestor, and upstream commands based on these requests are transmitted. Response data is received in reply to commands that were previously transmitted, and responses are transmitted to the at least one requester based on the response data. A buffer unit is provided for storing command identification data that identifies commands that were already transmitted or that are still to be transmitted, and response availability data that specifies response data that has been received by the receive engine. The improvement may enable multiple outstanding read requests.
摘要翻译：提供了一种在南桥或I / O集线器或类似设备中使用的改进的接口技术，其中从至少一个请求者接收非发布的读取请求，并且发送基于这些请求的上行命令。接收响应数据以回复先前发送的命令，并且响应基于响应数据被发送到至少一个请求者。提供缓冲单元，用于存储识别已发送或尚待发送的命令的命令识别数据，以及指定已被接收引擎接收到的响应数据的响应可用性数据。改进可能会使多个未完成的读取请求。

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