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    • 2. 发明授权
    • Retry mechanism for blocking interfaces
    • 阻塞接口的重试机制
    • US07016994B2
    • 2006-03-21
    • US10285935
    • 2002-11-01
    • Joerg WinklerFrank Barth
    • Joerg WinklerFrank Barth
    • G06F13/14
    • G06F13/36
    • An improved interface technology is provided that may be applied to PCI (Peripheral Component Interconnect) devices connected to a southbridge. Requests are received from at least one requestor. The request require responses to be sent back to the respective requestor. The requests are placed by the respective requestor by asserting a request signal, and the request signal is deasserted by the respective requestor when a response is sent back. A retry request may be sent to the current requestor for requesting the current requestor to deassert its request signal although a response has not yet been sent back, and to reassert the request signal later. Together with the retry request, a ready signal is sent indicating whether the request could be processed. This allows the requestor to modify its request when retrying it, if the request was not yet processed.
    • 提供了可以应用于连接到南桥的PCI(外围组件互连)设备的改进的接口技术。 从至少一个请求者收到请求。 请求需要将响应发回给相应的请求者。 请求由相应的请求者通过断言请求信号来放置,并且当发送回应时,请求信号由相应的请求者解除断言。 可以向当前请求者发送重试请求,以请求当前请求者解除其请求信号,尽管响应尚未被发送回来,并且稍后重新发送请求信号。 与重试请求一起发送就绪信号,指示是否可以处理该请求。 这允许请求者在重试时修改其请求,如果请求尚未处理。
    • 3. 发明授权
    • Method and apparatus for passing device configuration information to a shared controller
    • 将设备配置信息传递给共享控制器的方法和装置
    • US06671748B1
    • 2003-12-30
    • US09904374
    • 2001-07-11
    • Terry Lynn ColeDale E. GulickTimothy C. MaleckFrank BarthJoerg Winkler
    • Terry Lynn ColeDale E. GulickTimothy C. MaleckFrank BarthJoerg Winkler
    • G06F1300
    • G06F13/387
    • A method and apparatus for passing device configuration information to a shared controller. In one embodiment, a host controller may be configured to read configuration from one or more peripheral devices coupled to a serial bus. The peripheral devices may include coder/decoder (codec) circuitry, and may be implemented using a riser card. The host controller may employ one or more of several different techniques in order to read configuration information from the peripheral device. The configuration information at a minimum includes a device identifier, which may identify the vendor and the function of the device. Additional information needed to configure the device to communicate over the peripheral bus may also be obtained with a read of the device, or various lookup mechanisms, such as a lookup table or a tree-like data structure. After configuration information has been obtained for each device coupled to the bus, the host controller may dynamically configure each of the devices for communication over the bus, thereby allowing the flexibility to enumerate riser cards and add new functions through peripheral devices to the computer system in which the bus is implemented.
    • 一种用于将设备配置信息传递到共享控制器的方法和装置。 在一个实施例中,主机控制器可以被配置为从耦合到串行总线的一个或多个外围设备读取配置。 外围设备可以包括编码器/解码器(编解码器)电路,并且可以使用转接卡来实现。 主机控制器可以采用几种不同技术中的一种或多种,​​以便从外围设备读取配置信息。 配置信息至少包括设备标识符,其可以标识供应商和设备的功能。 通过设备的读取或诸如查找表或树状数据结构的各种查找机制也可以获得将设备配置成通过外围总线进行通信所需的附加信息。 在针对耦合到总线的每个设备获得配置信息之后,主机控制器可以动态地配置每个设备以通过总线进行通信,从而允许灵活地枚举转接卡并且通过外围设备将新功能添加到计算机系统 总线实施。
    • 4. 发明申请
    • Message based interrupt table
    • 基于消息的中断表
    • US20060047877A1
    • 2006-03-02
    • US11011511
    • 2004-12-14
    • Joerg WinklerFrank Barth
    • Joerg WinklerFrank Barth
    • G06F13/24
    • G06F13/24
    • An interrupt processing technique is provided where an interrupt message is sent to an interrupt controller of a processor in response to an interrupt request from an individual device. The interrupt message comprises a memory address and interrupt status information. The memory address is specifically allocated to the device that has issued the interrupt request. The interrupt status information indicates an interrupt status of the device. An interrupt table that is stored in the memory is updated by the interrupt controller using the interrupt status information comprised in the interrupt message. The interrupt table holds device specific interrupt statuses. Updating the interrupt table comprises addressing the memory using the memory address in the interrupt message.
    • 提供一种中断处理技术,其中响应于来自单个设备的中断请求将中断消息发送到处理器的中断控制器。 中断消息包括存储器地址和中断状态信息。 存储器地址被专门分配给发出中断请求的设备。 中断状态信息表示设备的中断状态。 存储在存储器中的中断表由中断控制器使用中断消息中包含的中断状态信息进行更新。 中断表保存设备特定的中断状态。 更新中断表包括使用中断消息中的存储器地址寻址存储器。
    • 5. 发明授权
    • Buffering non-posted read commands and responses
    • 缓冲非发布的读取命令和响应
    • US08244950B2
    • 2012-08-14
    • US10285931
    • 2002-11-01
    • Frank BarthLarry HewittJoerg WinklerPaul Miranda
    • Frank BarthLarry HewittJoerg WinklerPaul Miranda
    • G06F3/00G06F5/00G06F13/36
    • G06F13/4059
    • An improved interface technique for use in a southbridge or I/O hub or in similar devices is provided where non-posted read requests are received from at least one requestor, and upstream commands based on these requests are transmitted. Response data is received in reply to commands that were previously transmitted, and responses are transmitted to the at least one requester based on the response data. A buffer unit is provided for storing command identification data that identifies commands that were already transmitted or that are still to be transmitted, and response availability data that specifies response data that has been received by the receive engine. The improvement may enable multiple outstanding read requests.
    • 提供了一种在南桥或I / O集线器或类似设备中使用的改进的接口技术,其中从至少一个请求者接收非发布的读取请求,并且发送基于这些请求的上行命令。 接收响应数据以回复先前发送的命令,并且响应基于响应数据被发送到至少一个请求者。 提供缓冲单元,用于存储识别已发送或尚待发送的命令的命令识别数据,以及指定已被接收引擎接收到的响应数据的响应可用性数据。 改进可能会使多个未完成的读取请求。
    • 6. 发明授权
    • Message based interrupt table
    • 基于消息的中断表
    • US07257658B2
    • 2007-08-14
    • US11011511
    • 2004-12-14
    • Joerg WinklerFrank Barth
    • Joerg WinklerFrank Barth
    • G06F13/24
    • G06F13/24
    • An interrupt processing technique is provided where an interrupt message is sent to an interrupt controller of a processor in response to an interrupt request from an individual device. The interrupt message comprises a memory address and interrupt status information. The memory address is specifically allocated to the device that has issued the interrupt request. The interrupt status information indicates an interrupt status of the device. An interrupt table that is stored in the memory is updated by the interrupt controller using the interrupt status information comprised in the interrupt message. The interrupt table holds device specific interrupt statuses. Updating the interrupt table comprises addressing the memory using the memory address in the interrupt message.
    • 提供一种中断处理技术,其中响应于来自单个设备的中断请求将中断消息发送到处理器的中断控制器。 中断消息包括存储器地址和中断状态信息。 存储器地址被专门分配给发出中断请求的设备。 中断状态信息表示设备的中断状态。 存储在存储器中的中断表由中断控制器使用中断消息中包含的中断状态信息进行更新。 中断表保存设备特定的中断状态。 更新中断表包括使用中断消息中的存储器地址寻址存储器。
    • 7. 发明授权
    • Method and apparatus for configuring a peripheral bus
    • 用于配置外围总线的方法和装置
    • US07162554B1
    • 2007-01-09
    • US09904373
    • 2001-07-11
    • Terry Lynn ColeDale E. GulickTimothy C. MaleckFrank BarthJoerg Winkler
    • Terry Lynn ColeDale E. GulickTimothy C. MaleckFrank BarthJoerg Winkler
    • G06F13/00G06F3/00
    • G06F13/385
    • A method an apparatus for providing capability information to a shared controller. In one embodiment, a peripheral bus host controller may be shared by a plurality of peripheral devices coupled to a peripheral bus. The peripheral devices may include coder/decoder (codec) circuitry, and may be implemented using a riser card. The host controller may be configured to query the bus for peripheral devices by reading each address on the bus. During the querying process, the host controller may detect one or more peripheral devices coupled to the bus. Following the completion of the querying of the bus, the host controller may then begin reading configuration information from each of the detected devices. The host controller may employ one or more of several different techniques in order to read configuration information from the peripheral device. The configuration information at a minimum includes a device identifier, which may identify the vendor and the function of the device. Additional information needed to configure the device to communicate over the peripheral bus may also be obtained with a read of the device, or various lookup mechanisms, such as a lookup table or a tree-like data structure. After configuration information has been obtained for each device coupled to the bus, the host controller may dynamically configure each of the devices for communication over the bus, thereby allowing the flexibility to enumerate riser cards and add new functions through peripheral devices to the computer system in which the bus is implemented.
    • 一种用于向共享控制器提供能力信息的装置的方法。 在一个实施例中,外围总线主机控制器可以由耦合到外围总线的多个外围设备共享。 外围设备可以包括编码器/解码器(编解码器)电路,并且可以使用转接卡来实现。 主机控制器可以被配置为通过读取总线上的每个地址来查询外围设备的总线。 在查询过程期间,主机控制器可以检测耦合到总线的一个或多个外围设备。 在完成对总线的查询之后,主机控制器然后可以开始从每个检测到的设备读取配置信息。 主机控制器可以采用几种不同技术中的一种或多种,​​以便从外围设备读取配置信息。 配置信息至少包括设备标识符,其可以标识供应商和设备的功能。 通过设备的读取或诸如查找表或树状数据结构的各种查找机制也可以获得将设备配置成通过外围总线进行通信所需的附加信息。 在针对耦合到总线的每个设备获得配置信息之后,主机控制器可以动态地配置每个设备以通过总线进行通信,从而允许灵活地枚举转接卡并且通过外围设备将新功能添加到计算机系统 总线实施。
    • 10. 发明授权
    • ATA and SATA compliant controller
    • ATA和SATA兼容控制器
    • US07225290B2
    • 2007-05-29
    • US10184434
    • 2002-06-27
    • Frank BarthHenry DrescherAlexander Krebs
    • Frank BarthHenry DrescherAlexander Krebs
    • G06F13/00
    • G06F13/385G06F3/0607G06F3/0635G06F3/0661G06F3/0689
    • An ATA (Advanced Technology Attachment) controller is provided that comprises at least one parallel port for connecting to at least one ATA compliant storage device, and at least one serial port for connecting to at least one SATA (Serial ATA) compliant storage device. Further, there is a port switching unit provided for switching to at least one of the parallel and serial ports to enable data transfer to and/or from a storage device connected to the port. This enables a software driven reconfiguration making it possible to switch between a mode where the controller behaves like a conventional ATA controller, and a mode where the controller behaves like a conventional SATA controller. A significant amount of hardware may be reused.
    • 提供了一种ATA(高级技术附件)控制器,其包括用于连接至少一个符合ATA的存储设备的至少一个并行端口以及用于连接至少一个SATA(串行ATA)兼容存储设备的至少一个串行端口。 此外,存在端口切换单元,用于切换到至少一个并行端口和串行端口,以使数据传输到和/或连接到端口的存储设备。 这使得能够进行软件驱动的重新配置,使得可以在控制器的行为像传统的ATA控制器的模式和控制器的行为像传统的SATA控制器的模式之间切换。 大量的硬件可能会重复使用。