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1. 发明授权

US4713631A Varactor tuning circuit having plural selectable bias voltages 失效
标题翻译：变容二极管调谐电路具有多个可选偏置电压
公开(公告)号：US4713631A
公开(公告)日：1987-12-15
申请号：US816589
申请日：1986-01-06
申请人： Ralph T. Enderby , Enrique Ferrer , Wayne P. Shepherd
发明人： Ralph T. Enderby , Enrique Ferrer , Wayne P. Shepherd
IPC分类号： H03H5/12 , H03B1/00 , H03J5/02 , H03J5/24 , H03L7/099 , H03L7/187 , H04B1/40 , H03B5/08 , H03L7/18
CPC分类号： H03L7/187 , H03L7/099 , H03B2201/0208 , H03L2207/06
摘要： A variable capacitance circuit includes a varactor having an anode side and a cathode side. A first variable bias voltage is applied to one of the sides and one of a plurality of voltages is applied as a second bias voltage to the other side for controlling the capacitance of the varactor. A voltage multiplier circuit connected to a voltage divider network is used for supplying the plurality of voltages. A decoder is responsive to input signals for selecting and applying one of the multiple voltage outputs. The variable capacitance circuit is used in a voltage controlled oscillator of a frequency synthesizer for providing extended frequency range.
摘要翻译：可变电容电路包括具有阳极侧和阴极侧的变容二极管。将一个可变偏置电压施加到一个侧面，并且将多个电压中的一个作为第二偏置电压施加到另一侧以控制变容二极管的电容。连接到分压网络的电压倍增器电路用于提供多个电压。解码器响应于用于选择和施加多个电压输出中的一个的输入信号。可变电容电路用于频率合成器的压控振荡器，用于提供扩展的频率范围。

2. 发明授权

US07138686B1 Integrated circuit with improved signal noise isolation and method for improving signal noise isolation 有权
标题翻译：具有改进的信号噪声隔离的集成电路和用于改善信号噪声隔离的方法
公开(公告)号：US07138686B1
公开(公告)日：2006-11-21
申请号：US11142433
申请日：2005-05-31
申请人： Suman K. Banerjee , Enrique Ferrer , Olin L. Hartin , Radu M. Secareanu
发明人： Suman K. Banerjee , Enrique Ferrer , Olin L. Hartin , Radu M. Secareanu
IPC分类号： H01L29/76
CPC分类号： H01L27/0248 , H01L23/552 , H01L2924/0002 , H01L2924/00
摘要： A system-on chip (SOC) (100) and method of isolating noise in a SOC, including a plurality of noise sensitive circuit blocks (120, 220) and ESD protected pads (302, 304, 306, 308, 310, 312, and 314). A VDD isolation pad (302) is connected to an N well ring (124) of the first noise sensitive circuit (120) to collect noise from the substrate (110) and isolate the circuit from the P well region (112). A ground protected pad (304) is connected to an isolated P well (126) of a first noise sensitive circuit (120). The ground pad (304) collects noise from the isolated P well (126) and sends it to ground. A dedicated ground isolation pad (306) is connected to a P well ring (224) of a second noise sensitive circuit (220). The dedicated ground isolation pad (306) collects noise from the P well ring (224) and sends it to ground. The dedicated ground isolation pad (306) and the ground pad (304) collect noise that would normally propagate between the first and second noise sensitive circuits (120, 220) and additional circuits that share the same substrate (110).
摘要翻译：一种片上系统（SOC）（100）以及分离SOC中的噪声的方法，包括多个噪声敏感电路块（120,220）和ESD保护焊盘（302,304,306,308,310,312,312）和314）。 VDD隔离焊盘（302）连接到第一噪声敏感电路（120）的N阱环（124），以从基板（110）收集噪声，并将电路与P阱区域（112）隔离。接地保护焊盘（304）连接到第一噪声敏感电路（120）的隔离P阱（126）。接地焊盘（304）从隔离的P阱（126）收集噪声并将其发送到地面。专用接地隔离垫（306）连接到第二噪声敏感电路（220）的P阱环（224）。专用接地隔离垫（306）从P阱环（224）收集噪声并将其发送到地面。专用接地隔离焊盘（306）和接地焊盘（304）收集正常地在第一和第二噪声敏感电路（120,220）之间传播的噪声以及共享相同衬底（110）的附加电路。

3. 发明授权

US6114980A Method and apparatus for settling a DC offset 有权
标题翻译：沉降直流偏移的方法和装置
公开(公告)号：US6114980A
公开(公告)日：2000-09-05
申请号：US290564
申请日：1999-04-13
申请人： Keith A. Tilley , Raul Salvi , Enrique Ferrer
发明人： Keith A. Tilley , Raul Salvi , Enrique Ferrer
IPC分类号： H03F1/30 , H03M1/10
CPC分类号： H03F1/304 , H03F2200/372
摘要： A DC offset correction loop (200) utilizes a sign bit generator (204), binary search stage (206), and a digital-to-analog converter (208) in its feedback path to correct for DC offsets at the input of a gain stage (202).
摘要翻译：直流偏移校正回路（200）利用符号位产生器（204），二进制搜索级（206）和数模转换器（208）在其反馈路径中校正增益输入端的直流偏移阶段（202）。

4. 发明授权

US5672999A Audio amplifier clipping avoidance method and apparatus 失效
标题翻译：音频放大器限幅避免方法和装置
公开(公告)号：US5672999A
公开(公告)日：1997-09-30
申请号：US586536
申请日：1996-01-16
申请人： Enrique Ferrer , Kenneth A. Hansen
发明人： Enrique Ferrer , Kenneth A. Hansen
IPC分类号： H03G3/30 , H03G3/20
CPC分类号： H03G3/3089
摘要： An audio amplifier clipping avoidance apparatus (140) identifies signal segments of an audio signal that can have an amplitude peak greater than a particular amplifier clip avoidance threshold (530). A scaling factor is determined for each signal segment based on the particular threshold (540). Signal segments are scaled with corresponding scaling factors to produce a modified audio signal having no signal segments with an amplitude peak greater than the particular threshold (560).
摘要翻译：音频放大器限幅避免装置（140）识别可以具有大于特定放大器片段避免阈值的振幅峰值的音频信号的信号段（530）。基于特定阈值为每个信号段确定缩放因子（540）。用对应的缩放因子对信号段进行缩放，以产生没有具有大于特定阈值（560）的幅度峰值的信号段的修改音频信号。

5. 发明授权

US5483691A Zero intermediate frequency receiver having an automatic gain control circuit 失效
标题翻译：零中频接收机具有自动增益控制电路
公开(公告)号：US5483691A
公开(公告)日：1996-01-09
申请号：US275088
申请日：1994-07-14
申请人： Joseph P. Heck , Enrique Ferrer
发明人： Joseph P. Heck , Enrique Ferrer
IPC分类号： H03G3/20 , H04B1/10 , H04B1/16
CPC分类号： H03G3/3068 , H04B1/109
摘要： A receiver automatic gain control (AGC) circuit includes a first adjustable gain control amplifier (158) which is responsive to a gain control signal (156). The AGC circuit further includes a second adjustable gain control amplifier (114) and a control circuit (116) which receives the gain control signal (156) and provides a modified gain control signal or VCNTRL (152) to the second adjustable control amplifier (114). The control circuit (116) also limits the amount of gain control applied to adjustable gain control amplifiers (114 and 118) when the gain control signal (156) reaches a certain predetermined level. This provides for all further gain reduction to occur at the first adjustable gain control amplifier (158) and thereby reduce the chances for distortion under high input signal conditions.
摘要翻译：接收机自动增益控制（AGC）电路包括响应于增益控制信号（156）的第一可调增益控制放大器（158）。 AGC电路还包括第二可调增益控制放大器（114）和控制电路（116），其接收增益控制信号（156）并向第二可调控制放大器（114）提供经修改的增益控制信号或VCNTRL（152））。当增益控制信号（156）达到一定的预定水平时，控制电路（116）还限制施加到可调增益控制放大器（114和118）的增益控制量。这提供了在第一可调增益控制放大器（158）处发生的所有进一步的增益减小，从而降低在高输入信号条件下的失真机会。

6. 发明授权

US4920285A Gallium arsenide antenna switch 失效
标题翻译：砷化镓天线开关
公开(公告)号：US4920285A
公开(公告)日：1990-04-24
申请号：US274167
申请日：1988-11-21
申请人： Edward T. Clark , Enrique Ferrer
发明人： Edward T. Clark , Enrique Ferrer
IPC分类号： H03K17/00 , H03K17/081 , H03K17/691 , H03K17/693 , H04B1/18 , H04B1/40
CPC分类号： H03K17/691 , H03K17/08104 , H03K17/693 , Y10T307/74
摘要： An RF signal is transformed (12 and 12') to increase its current component, while reducing its voltage component below the voltage that would damage a GaAs switching device (16 or 16'). The current and voltage transformation are selected so that the power of the RF signal remains substantially constant. Subsequent to the GaAs switching device, the signal is converted (24 and 24') to increase the voltage component while decreasing its current component to substantially recreate the original RF signal.
摘要翻译： RF信号被变换（12和12'）以增加其电流分量，同时将其电压分量降低到低于将损坏GaAs开关器件（16或16'）的电压。选择电流和电压变换使得RF信号的功率保持基本恒定。在GaAs开关器件之后，信号被转换（24和24'）以增加电压分量，同时降低其电流分量，从而基本上重现原始RF信号。

7. 发明授权

US4885550A Signal input to differential output amplifier 失效
标题翻译：信号输入到差分输出放大器
公开(公告)号：US4885550A
公开(公告)日：1989-12-05
申请号：US278381
申请日：1988-12-01
申请人： Enrique Ferrer
发明人： Enrique Ferrer
IPC分类号： H03F3/26 , H03F3/30 , H03F3/68 , H03H11/32
CPC分类号： H03F3/3001
摘要： A single input, differential output amplifier (50) includes two Gallium Arsenide field effect transistors: one arranged to form a common gate amplifier (55) to provide a non-inventing output (60), and the other arranged to form a common source (65) amplifier to provide an inverting output (61). The input of each FET is connected to receive an input signal simultaneously thereby minimizing phase delay in the differential output signals. In another aspect of the invention, the non-inverting stage (55) is incorporated into the biasing network for the inverting ampllifier (65).
摘要翻译：单输入差分输出放大器（50）包括两个砷化镓场效应晶体管：一个布置成形成公共栅极放大器（55）以提供非发明输出（60），另一个布置成形成公共源极 65）放大器以提供反相输出（61）。连接每个FET的输入以同时接收输入信号，从而使差分输出信号中的相位延迟最小化。在本发明的另一方面，非反相级（55）被并入用于反相放大器（65）的偏置网络中。

8. 发明授权

US06356217B1 Enhanced DC offset correction through bandwidth and clock speed selection 有权
标题翻译：通过带宽和时钟速度选择增强直流偏移校正
公开(公告)号：US06356217B1
公开(公告)日：2002-03-12
申请号：US09515843
申请日：2000-02-29
申请人： Keith A. Tilley , Raul Salvi , Enrique Ferrer
发明人： Keith A. Tilley , Raul Salvi , Enrique Ferrer
IPC分类号： H03M110
CPC分类号： H03F1/304
摘要： A DC offset correction method and apparatus. In a DC offset correction loop (100), a DC offset is corrected using a binary search routine or any other digital or analog DC offset correction technique. In this binary search routine, the sign of the offset (138) is used to control a direction in which a digital to analog converter (DAC) (166) is stepped until the least significant bit of the DAC is set. The process is enhanced by opening up the bandwidth of the baseband filters (130) to permit the binary search to be clocked (180) at a higher clock rate. After the correction is established, the filters (130) are reset to normal operating conditions.
摘要翻译： DC偏移校正方法和装置。在DC偏移校正回路（100）中，使用二分搜索程序或任何其他数字或模拟DC偏移校正技术校正DC偏移。在该二进制搜索例程中，偏移量（138）的符号用于控制数模转换器（DAC）（166）的步进直到DAC的最低有效位被置位的方向。通过打开基带滤波器（130）的带宽来增强该过程，以允许二进制搜索以更高的时钟速率被计时（180）。在建立校正之后，将过滤器（130）复位到正常的操作条件。

9. 发明授权

US5729175A Method of driving a class D audio power amplifier using non-overlapping edge drive signals 失效
标题翻译：使用非重叠边缘驱动信号驱动D类音频功率放大器的方法
公开(公告)号：US5729175A
公开(公告)日：1998-03-17
申请号：US638626
申请日：1996-04-26
申请人： Enrique Ferrer
发明人： Enrique Ferrer
IPC分类号： H03F3/217 , H03F3/38
CPC分类号： H03F3/2171 , H03F3/2173
摘要： A method of actuating a plurality of power amplifier devices in an Class D audio switching amplifier (100) using non-overlapping edge drive signals for preventing substantially high current spikes during switching transitions. The method includes actuating and deactuating power amplifier devices within a first complementary power switching device (117) and actuating and deactuating a second complementary power switching device (119) using a plurality of drive signals generated by a non-overlapping driver (107). The method provides that the first complementary power switching device (117) and the second complementary power switching device (119) are switched ON and OFF in a predetermined sequence such that more than one power amplifier device within each complementary power switching pair is prevented from being simultaneously activated. This prevents high current spiking and subsequently high current drain during a switching transition for conserving battery life when used with portable equipment.
摘要翻译：一种使用非重叠边缘驱动信号来驱动D类音频切换放大器（100）中的多个功率放大器装置的方法，用于在切换转换期间防止基本上高的电流尖峰。该方法包括在第一互补功率开关装置（117）内致动和停用功率放大器装置，并且使用由非重叠驱动器（107）产生的多个驱动信号来致动和停用第二互补功率开关装置（119）。该方法提供了第一互补功率开关装置（117）和第二互补功率开关装置（119）以预定的顺序被接通和断开，使得防止每个互补功率开关对内的多于一个的功率放大装置同时激活。这样可以防止在切换转换期间产生高电流尖峰和随之而来的高电流消耗，从而在与便携设备一起使用时节省电池寿命。

10. 发明授权

US5422597A Means and method of enhancing signal resolution and dynamic range extension in a pulse width modulation amplifier 失效
标题翻译：在脉冲宽度调制放大器中增强信号分辨率和动态范围扩展的手段和方法
公开(公告)号：US5422597A
公开(公告)日：1995-06-06
申请号：US251227
申请日：1994-05-31
申请人： Robert E. Stengel , David L. Muri , Enrique Ferrer
发明人： Robert E. Stengel , David L. Muri , Enrique Ferrer
IPC分类号： H03F3/217 , H03F3/38
CPC分类号： H03F3/2173
摘要： An amplifier (1) used with a pulse width modulated signal which improves the efficiency of a low level input signal comprises two or more switching devices (7,9) with common source/drain or emitter/collector connections. The gates or the bases of the devices are independently driven to optimize the efficiency of the various Rds (on) resistance values of the transistors (61, 63, 65, 89, 91, 93) used in the devices. The amplifier is operated so that during the highest output levels, select switching devices (61, 63, 65) are utilized to reduce in series resistance with the load (13). As output power decreases, devices (89, 91, 93) with higher Rds (on) resistance values are activated by a control signal which greatly improves DC to DC conversion efficiency with improved output voltage resolution, dynamic range and reduced electromagnetic interference potential.
摘要翻译：与改善低电平输入信号的效率的脉冲宽度调制信号一起使用的放大器（1）包括具有公共源极/漏极或发射极/集电极连接的两个或多个开关器件（7,9）。独立地驱动器件的栅极或基极以优化器件中使用的晶体管（61,63,65,89,91,93）的各种Rds（导通）电阻值的效率。放大器的工作原理是，在最高的输出电平下，选择开关器件（61,63,65）来减少负载（13）的串联电阻。随着输出功率的降低，具有较高Rds（on）电阻值的器件（89,91,93）由控制信号激活，通过改进的输出电压分辨率，动态范围和降低的电磁干扰电位，极大地提高了DC至DC转换效率。

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