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1. 发明授权

US4808273A Method of forming completely metallized via holes in semiconductors 失效
标题翻译：在半导体中形成完全金属化的通孔的方法
公开(公告)号：US4808273A
公开(公告)日：1989-02-28
申请号：US192343
申请日：1988-05-10
申请人： Chang-Hwang Hua , Ding-Yuan S. Day , Simon S. Chan
发明人： Chang-Hwang Hua , Ding-Yuan S. Day , Simon S. Chan
IPC分类号： H01L21/74 , H01L21/768 , C25D5/02
CPC分类号： H01L21/76898
摘要： A method is disclosed for forming completely metallized via holes in semiconductor wafers. Metal pads are formed on one face of a semiconductor wafer together with a conductive interconnecting network. An insulating layer is then deposited to cover this face of the wafer. Holes are etched in the opposite face of the wafer up to and exposing a portion of the metal pads. The via holes are then completely filled with metal by means of electroplating, using the metal pads as a cathode.
摘要翻译：公开了一种用于在半导体晶片中形成完全金属化的通孔的方法。金属焊盘与导电互连网络一起形成在半导体晶片的一个面上。然后沉积绝缘层以覆盖晶片的这个面。孔在晶片的相对表面被蚀刻，直至并暴露出金属焊盘的一部分。然后使用金属垫作为阴极，通过电镀将通孔用金属完全填充。

2. 发明授权

US4978639A Method for the simultaneous formation of via-holes and wraparound plating on semiconductor chips 失效
标题翻译：在半导体芯片上同时形成通孔和环绕电镀的方法
公开(公告)号：US4978639A
公开(公告)日：1990-12-18
申请号：US295300
申请日：1989-01-10
申请人： Chang-Hwang Hua , Simon S. Chan , Ding-Yuan S. Day , Adrian C. Lee
发明人： Chang-Hwang Hua , Simon S. Chan , Ding-Yuan S. Day , Adrian C. Lee
IPC分类号： H01L21/288 , H01L21/768
CPC分类号： H01L21/78 , H01L21/288 , H01L21/76898 , Y10S148/028 , Y10S148/135 , Y10S438/977
摘要： Metallized via-holes and a wraparound metal plating are simultaneously formed on semiconductor chips by patterning a photoresist mask on the front surface of the wafer to open windows over metal pads as well as the grid areas where wraparound plating is desired; etching off the exposed metal if necessary and forming via-holes and grooves in the wafer by reactive ion etching to a depth which is less than the total thickness of the wafer; depositing a thin conductive film along the walls of the grooves and via-holes by electroless methods; plating the walls of the grooves and the via-holes with conductive metal by electrolytic methods; removing the back surface of the wafer ("backlapping") along with the floors of both the grooves and the via-holes, to expose the metal on the wall of the via-holes and separate the individual chips; and, depositing conductive metal on the back surface of the individual chips to complete the grounding path.
摘要翻译：在半导体芯片上同时形成金属化的通孔和环绕的金属电镀，方法是在晶片的前表面上形成光致抗蚀剂掩模以在金属焊盘上打开窗口以及需要环绕电镀的栅格区域; 如果需要则蚀刻暴露的金属，并通过反应离子蚀刻在晶片中形成通孔和沟槽，其深度小于晶片的总厚度; 通过化学镀方法沿沟槽和通孔的壁沉积薄导电膜; 通过电解方法用导电金属电镀槽和通孔; 与两个槽和通孔的地板一起去除晶片的背面（“后退”），以露出通孔壁上的金属并分离各个芯片; 并且在各个芯片的背面上沉积导电金属，以完成接地路径。

3. 发明授权

US4842699A Method of selective via-hole and heat sink plating using a metal mask 失效
标题翻译：使用金属掩模的选择性通孔和散热电镀方法
公开(公告)号：US4842699A
公开(公告)日：1989-06-27
申请号：US192199
申请日：1988-05-10
申请人： Chang-Hwang Hua , Ding-Yuan S. Day , Simon S. Chan
发明人： Chang-Hwang Hua , Ding-Yuan S. Day , Simon S. Chan
IPC分类号： C25D5/02 , H01L21/768 , H01L23/48
CPC分类号： C25D5/022 , H01L21/76898 , H01L23/481 , H01L2924/0002
摘要： A method for simultaneous selective plating of viaholes and heat sinks associated with a semiconductor wafer using a metal mask and comprising the steps of:(a) coating a first side of the wafer with an insulating layer to prevent electroplating on this first side;(b) patterning on a second side of the wafer, opposite to the first side, a metal mask for defining the areas where plating should not occur;(c) forming via-holes through said wafer;(d) depositing a thin conductive film to coat the bottom and walls of the via-holes as well as areas of the second side of the wafer not covered by the metal mask; and(e) electrolytically plating the resulting wafer while ultrasonically agitating the electrolyte if necessary to ensure sufficient electrolyte transport into the via-holes for uniform plating.
摘要翻译：一种使用金属掩模同时选择性地电镀与半导体晶片相关的通孔和散热器的方法，包括以下步骤：（a）用绝缘层涂覆晶片的第一侧以防止在该第一侧上的电镀; （b）在晶片的与第一侧相对的第二面上图案化，用于限定不应发生电镀的区域的金属掩模; （c）通过所述晶片形成通孔; （d）沉积薄的导电膜以覆盖通孔的底部和壁以及未被金属掩模覆盖的晶片的第二面的区域; 和（e）如果需要的话，对所得的晶片进行电解电镀，同时超声波地搅动电解质，以确保足够的电解质输送到通孔中用于均匀的电镀。

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