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1. 发明授权

US06885577B2 Magnetic RAM cell device and array architecture 有权
标题翻译：磁性RAM单元设备和阵列架构
公开(公告)号：US06885577B2
公开(公告)日：2005-04-26
申请号：US10464311
申请日：2003-06-18
申请人： Denny Duan-Lee Tang , Wen-Chin Lin
发明人： Denny Duan-Lee Tang , Wen-Chin Lin
IPC分类号： G11C11/00 , G11C11/15 , G11C11/16
CPC分类号： G11C11/16
摘要： A new magnetic RAM cell device is achieved. The device comprises a plurality MTJ cells each comprising a free layer and a pinned layer separated by a dielectric layer. A common conductive layer couples together all of the pinned layers of the MJT cell. A first end of the common conductive layer is switchably coupled to a programming line. A second end of the common conductive layer is switchably coupled to a ground. A pluraity of diodes is used. Each diode is coupled between one of the MJT cells and one of a plurality of bit lines.
摘要翻译：实现了新的磁性RAM单元装置。该装置包括多个MTJ单元，每个单元包括由电介质层分离的自由层和钉扎层。公共导电层将MJT电池的所有被钉扎层结合在一起。公共导电层的第一端可切换地耦合到编程线。公共导电层的第二端可切换地耦合到地面。使用二极管的光源。每个二极管耦合在MJT单元之一和多个位线之一之间。

2. 发明授权

US08130199B2 Compact universal keyboard 有权
标题翻译：紧凑型通用键盘
公开(公告)号：US08130199B2
公开(公告)日：2012-03-06
申请号：US12186939
申请日：2008-08-06
申请人： Frank Rui-Feng Chu , Noboru Kamijo , Denny Duan-Lee Tang
发明人： Frank Rui-Feng Chu , Noboru Kamijo , Denny Duan-Lee Tang
IPC分类号： G06F3/038 , G09G5/00
CPC分类号： H04M1/23 , G06F1/1622 , G06F1/1626 , G06F1/163 , G06F1/1632 , G06F1/1662 , G06F1/1664 , G06F3/0236 , H04M1/0214 , H04M1/0231 , H04M1/0247
摘要： A keyboard type input device used in conjunction with a wristwatch or a portable telephone has multiple key positions provided as character entry keys. Each key corresponds to one key in the selected row of the conventional QWERTY keyboard. A second set of control buttons provide for the selection of which row of a conventional QWERTY keyboard are represented by the character keys in addition to other functions such as case shift, and alpha-numerical control functions. A selected row is shown on a display, as visual feedback. Alternatively the keys are implemented as LCDs with pressure sensors and the characters of the selected row are displayed directly on the corresponding key positions. The keyboard finds particular use in portable devices as it demands less space than traditional keyboards.
摘要翻译：与手表或便携式电话一起使用的键盘型输入装置具有作为字符输入键提供的多个键位置。每个键对应于常规QWERTY键盘的所选行中的一个键。第二组控制按钮提供除了诸如情况移动和字母数字控制功能的其他功能之外，还可以选择常规QWERTY键盘的哪一行由字符键表示。所选行显示在显示屏上，作为视觉反馈。或者，键被实现为具有压力传感器的LCD，并且所选行的字符被直接显示在相应的键位置上。键盘在便携式设备中特别有用，因为它比传统键盘要求的空间要小。

3. 发明授权

US08022382B2 Phase change memory devices with reduced programming current 有权
标题翻译：具有减少编程电流的相变存储器件
公开(公告)号：US08022382B2
公开(公告)日：2011-09-20
申请号：US11368192
申请日：2006-03-03
申请人： Li-Shyue Lai , Denny Duan-lee Tang , Wen-chin Lin , Teng-Chien Yu , Hui-Fang Tsai , Wei-Hsiang Wang , Shyhyeu Wang
发明人： Li-Shyue Lai , Denny Duan-lee Tang , Wen-chin Lin , Teng-Chien Yu , Hui-Fang Tsai , Wei-Hsiang Wang , Shyhyeu Wang
IPC分类号： H01L29/04 , H01L47/00
CPC分类号： H01L45/06 , H01L45/1233 , H01L45/126 , H01L45/128 , H01L45/144 , H01L45/1666
摘要： A phase change memory device and a method of forming the same are provided. The phase change memory device includes a conducting electrode in a dielectric layer, a bottom electrode over the conducting electrode, a phase change layer over the bottom electrode, and a top electrode over the phase change layer. The phase change memory device may further include a heat sink layer between the phase change layer and the top electrode. The resistivities of the bottom electrode and the top electrode are preferably greater than the resistivity of the phase change material in the crystalline state.
摘要翻译：提供了一种相变存储器件及其形成方法。相变存储器件包括介电层中的导电电极，导电电极上的底电极，底电极上的相变层和相变层上的顶电极。相变存储器件还可以包括在相变层和顶部电极之间的散热层。底电极和顶电极的电阻率优选大于结晶态相变材料的电阻率。

4. 发明申请

US20100140580A1 Phase Change Memory 有权
标题翻译：相变记忆
公开(公告)号：US20100140580A1
公开(公告)日：2010-06-10
申请号：US12703571
申请日：2010-02-10
申请人： Tzyh-Cheang Lee , Ming-Yi Yang , Fu-Liang Yang , Denny Duan-lee Tang
发明人： Tzyh-Cheang Lee , Ming-Yi Yang , Fu-Liang Yang , Denny Duan-lee Tang
IPC分类号： H01L45/00
CPC分类号： G11C11/5678 , G11C13/0004 , H01L27/2463 , H01L27/2472 , H01L45/06 , H01L45/1233 , H01L45/126 , H01L45/144 , H01L45/16
摘要： A phase change memory is provided. The method includes forming contact plugs in a first dielectric layer. A second dielectric layer is formed overlying the first dielectric layer and a trench formed therein exposing portions of the contact plugs. A metal layer is formed over surfaces of the trench. One or more heaters are formed from the metal layer such that each heater is formed along one or more sidewalls of the trench, wherein the portion of the heater along the sidewalls does not include a corner region of adjacent sidewalls. The trench is filled with a third dielectric layer, and a fourth dielectric layer is formed over the third dielectric layer. Trenches are formed in the fourth dielectric layer and filled with a phase change material. An electrode is formed over the phase change material.
摘要翻译：提供了相变存储器。该方法包括在第一电介质层中形成接触塞。形成第二电介质层，覆盖第一电介质层和形成在其中的沟槽，暴露接触插塞的部分。在沟槽的表面上形成金属层。从金属层形成一个或多个加热器，使得每个加热器沿着沟槽的一个或多个侧壁形成，其中加热器沿侧壁的部分不包括相邻侧壁的拐角区域。沟槽填充有第三电介质层，并且在第三介电层上形成第四电介质层。在第四电介质层中形成沟槽并填充相变材料。在相变材料上形成电极。

5. 发明授权

US07537982B2 Method and structure for isolating substrate noise 有权
标题翻译：隔离衬底噪声的方法和结构
公开(公告)号：US07537982B2
公开(公告)日：2009-05-26
申请号：US11972482
申请日：2008-01-10
申请人： Wai-Yi Lien , Denny Duan-lee Tang
发明人： Wai-Yi Lien , Denny Duan-lee Tang
IPC分类号： H01L21/00 , H01L21/76
CPC分类号： H01L21/263 , H01L21/761
摘要： An integrated circuit structure for isolating substrate noise and a method of forming the same are provided. In the preferred embodiment of the present invention, a semi-insulating region is formed using proton bombardment in a substrate between a first circuit region and a second circuit region. Two guard rings are formed along the semi-insulating region, each on a side. A backside semi-insulating region is formed through proton bombardment from the back surface of the substrate into the substrate. The backside semi-insulating region is preferably connected with the semi-insulating region. A grounded guard layer is preferably formed on the backside semi-insulating region.
摘要翻译：提供了用于隔离衬底噪声的集成电路结构及其形成方法。在本发明的优选实施例中，使用质子轰击在第一电路区域和第二电路区域之间的衬底中形成半绝缘区域。沿着半绝缘区域形成两个保护环，每个在一侧。通过从衬底的背面进入衬底的质子轰击形成背面半绝缘区域。背面半绝缘区域优选与半绝缘区域连接。优选地，在背面半绝缘区域上形成接地保护层。

6. 发明授权

US07492018B2 Isolating substrate noise by forming semi-insulating regions 有权
标题翻译：通过形成半绝缘区域隔离衬底噪声
公开(公告)号：US07492018B2
公开(公告)日：2009-02-17
申请号：US11089186
申请日：2005-03-24
申请人： Wai-Yi Lien , Denny Duan-lee Tang
发明人： Wai-Yi Lien , Denny Duan-lee Tang
IPC分类号： H01L29/76 , H01L29/47
CPC分类号： H01L21/263 , H01L21/761
摘要： An integrated circuit structure for isolating substrate noise and a method of forming the same are provided. In the preferred embodiment of the present invention, a semi-insulating region is formed using proton bombardment in a substrate between a first circuit region and a second circuit region. Two guard rings are formed along the semi-insulating region, each on a side. A backside semi-insulating region is formed through proton bombardment from the back surface of the substrate into the substrate. The backside semi-insulating region is preferably connected with the semi-insulating region. A grounded guard layer is preferably formed on the backside semi-insulating region.
摘要翻译：提供了用于隔离衬底噪声的集成电路结构及其形成方法。在本发明的优选实施例中，使用质子轰击在第一电路区域和第二电路区域之间的衬底中形成半绝缘区域。沿着半绝缘区域形成两个保护环，每个在一侧。通过从衬底的背面进入衬底的质子轰击形成背面半绝缘区域。背面半绝缘区域优选与半绝缘区域连接。优选地，在背面半绝缘区域上形成接地保护层。

7. 发明申请

US20080291172A1 COMPACT UNIVERSAL KEYBOARD 有权
标题翻译：紧凑通用键盘
公开(公告)号：US20080291172A1
公开(公告)日：2008-11-27
申请号：US12186939
申请日：2008-08-06
申请人： FRANK RUI-FENG CHU , Noboru Kamijo , Denny Duan-lee Tang
发明人： FRANK RUI-FENG CHU , Noboru Kamijo , Denny Duan-lee Tang
IPC分类号： G06F3/02
CPC分类号： H04M1/23 , G06F1/1622 , G06F1/1626 , G06F1/163 , G06F1/1632 , G06F1/1662 , G06F1/1664 , G06F3/0236 , H04M1/0214 , H04M1/0231 , H04M1/0247
摘要： A keyboard type input device used in conjunction with a wristwatch or a portable telephone has multiple key positions provided as character entry keys. Each key corresponds to one key in the selected row of the conventional QWERTY keyboard. A second set of control buttons provide for the selection of which row of a conventional QWERTY keyboard are represented by the character keys in addition to other functions such as case shift, and alpha-numerical control functions. A selected row is shown on a display, as visual feedback. Alternatively the keys are implemented as LCDs with pressure sensors and the characters of the selected row are displayed directly on the corresponding key positions. The keyboard finds particular use in portable devices as it demands less space than traditional keyboards.
摘要翻译：与手表或便携式电话一起使用的键盘型输入装置具有作为字符输入键提供的多个键位置。每个键对应于常规QWERTY键盘的所选行中的一个键。第二组控制按钮提供除了诸如情况移动和字母数字控制功能的其他功能之外，还可以选择常规QWERTY键盘的哪一行由字符键表示。所选行显示在显示屏上，作为视觉反馈。或者，键被实现为具有压力传感器的LCD，并且所选行的字符被直接显示在相应的键位置上。键盘在便携式设备中特别有用，因为它比传统键盘要求的空间要小。

8. 发明申请

US20080285328A1 Phase Change Memory 失效
标题翻译：相变记忆
公开(公告)号：US20080285328A1
公开(公告)日：2008-11-20
申请号：US11749017
申请日：2007-05-15
申请人： Tzyh-Cheang Lee , Ming-Yi Yang , Fu-Liang Yang , Denny Duan-lee Tang
发明人： Tzyh-Cheang Lee , Ming-Yi Yang , Fu-Liang Yang , Denny Duan-lee Tang
IPC分类号： G11C11/56 , H01L45/00
CPC分类号： G11C11/5678 , G11C13/0004 , H01L27/2463 , H01L27/2472 , H01L45/06 , H01L45/1233 , H01L45/126 , H01L45/144 , H01L45/16
摘要： A phase change memory is provided. The method includes forming contact plugs in a first dielectric layer. A second dielectric layer is formed overlying the first dielectric layer and a trench formed therein exposing portions of the contact plugs. A metal layer is formed over surfaces of the trench. One or more heaters are formed from the metal layer such that each heater is formed along one or more sidewalls and a portion of the bottom of the trench, wherein the portion of the heater along the sidewalls does not include a corner region of adjacent sidewalls. The trench is filled with a third dielectric layer, and a fourth dielectric layer is formed over the third dielectric layer. Trenches are formed in the fourth dielectric layer and filled with a phase change material. An electrode is formed over the phase change material.
摘要翻译：提供了相变存储器。该方法包括在第一电介质层中形成接触塞。形成第二电介质层，覆盖第一电介质层和形成在其中的沟槽，暴露接触插塞的部分。在沟槽的表面上形成金属层。从金属层形成一个或多个加热器，使得每个加热器沿沟槽的一个或多个侧壁和底部的一部分形成，其中加热器沿着侧壁的部分不包括相邻侧壁的拐角区域。沟槽填充有第三电介质层，并且在第三介电层上形成第四电介质层。在第四电介质层中形成沟槽并填充相变材料。在相变材料上形成电极。

9. 发明授权

US07042032B2 Magnetoresistive (MR) magnetic data storage device with sidewall spacer layer isolation 有权
标题翻译：具有侧壁间隔层隔离的磁阻（MR）磁数据存储装置
公开(公告)号：US07042032B2
公开(公告)日：2006-05-09
申请号：US10401945
申请日：2003-03-27
申请人： Wen-Chin Lin , Denny Duan-Lee Tang , Chao-Hsiung Wang
发明人： Wen-Chin Lin , Denny Duan-Lee Tang , Chao-Hsiung Wang
IPC分类号： H01L29/76
CPC分类号： H01L43/08 , G11C11/15 , H01L43/12
摘要： A magnetoresistive magnetic data storage product and a method for fabrication thereof both employ a magnetic data storage device formed over a substrate. The magnetic data storage device comprises a free magnetoresistive material layer separated from a pinned magnetoresistive material layer by a dielectric spacer material layer, each having a sidewall. The magnetic data storage product also comprises a sidewall spacer material layer formed annularly surrounding and covering the sidewall of at least one of the free magnetoresistive material layer and the pinned magnetoresistive material layer. The magnetic data storage product is fabricated with enhanced magnetic data storage density.
摘要翻译：磁阻磁数据存储产品及其制造方法都采用形成在衬底上的磁数据存储装置。磁数据存储装置包括通过电介质间隔物材料层与固定磁阻材料层分离的自由磁阻材料层，每层具有侧壁。磁数据存储产品还包括环形围绕并覆盖自由磁阻材料层和钉扎磁阻材料层中的至少一个的侧壁的侧壁间隔物材料层。磁数据存储产品采用增强的磁数据存储密度制造。

10. 发明授权

US06245607B1 Buried channel quasi-unipolar transistor 有权
标题翻译：埋地通道准单极晶体管
公开(公告)号：US06245607B1
公开(公告)日：2001-06-12
申请号：US09222270
申请日：1998-12-28
申请人： Denny Duan-Lee Tang , Hu Herbert Chao
发明人： Denny Duan-Lee Tang , Hu Herbert Chao
IPC分类号： H01L2976
CPC分类号： H01L29/783 , H01L29/7391 , H01L29/7838
摘要： A buried channel lateral quasi-unipolar transistor having low flicker or 1/f noise has a bulk region that forms the base of the buried quasi-unipolar transistor. A drain region is implanted into the bulk region to form a drain/collector. A source region is placed at a distance from the drain region and is implanted in the bulk region to form a source/emitter. A channel layer is implanted in the bulk region between the source region and the drain region to provide a low resistivity conduction channel between the drain/collector and the source/emitter. A gate oxide is placed on the surface of the semiconductor substrate immediately above the channel layer. Then a gate electrode of a conductive material such as polycrystalline silicon doped to with a material having a conductivity opposite that of the source/drain deposited on the gate oxide above the channel region. A biasing voltage source connected between the gate electrode and the bulk region to lower a built-in voltage of the quasi-unipolar transistor. The buried channel lateral quasi-unipolar transistor further may have an overlayer implanted between the channel layer and the surface of the semiconductor substrate to form the buried channel layer rather than at the surface of the semiconductor substrate. The buried channel lateral quasi-unipolar transistor may be placed in a diffusion well into which a bulk region is implanted.
摘要翻译：具有低闪烁或1 / f噪声的掩埋沟道横向准单极晶体管具有形成埋入的准单极晶体管的基极的体区。将漏极区域注入到本体区域中以形成漏极/集电极。源极区域被放置在与漏极区一定距离处并且被植入体区域中以形成源极/发射极。在源极区域和漏极区域之间的体区域中注入沟道层，以在漏极/集电极和源极/发射极之间提供低电阻率导电沟道。栅极氧化物放置在沟道层正上方的半导体衬底的表面上。然后是导电材料的栅电极，例如掺杂有导电性的材料的多晶硅，该导电性与沉积在沟道区上方的栅极氧化物上的源极/漏极的导电性相反。连接在栅电极和体区之间的偏置电压源，以降低准单极晶体管的内置电压。掩埋沟道横向准单极晶体管还可以在沟道层和半导体衬底的表面之间具有覆盖层，以形成掩埋沟道层而不是在半导体衬底的表面。掩埋沟道横向准单极晶体管可以放置在扩散阱中，植入体区域。

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