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1. 发明授权

US08828745B2 Method for manufacturing through-silicon via 有权
标题翻译：硅通孔制造方法
公开(公告)号：US08828745B2
公开(公告)日：2014-09-09
申请号：US13176790
申请日：2011-07-06
申请人： Wei-Che Tsao , Chia-Lin Hsu , Jen-Chieh Lin , Teng-Chun Tsai , Hsin-Kuo Hsu , Ya-Hsueh Hsieh , Ren-Peng Huang , Chih-Hsien Chen , Wen-Chin Lin , Yung-Lun Hsieh
发明人： Wei-Che Tsao , Chia-Lin Hsu , Jen-Chieh Lin , Teng-Chun Tsai , Hsin-Kuo Hsu , Ya-Hsueh Hsieh , Ren-Peng Huang , Chih-Hsien Chen , Wen-Chin Lin , Yung-Lun Hsieh
IPC分类号： H01L21/66 , H01L21/306 , H01L21/304 , H01L21/768 , H01L21/3105 , H01L21/321
CPC分类号： H01L21/31053 , H01L21/3212 , H01L21/76898 , H01L22/12 , H01L22/26 , H01L2924/0002 , H01L2924/00
摘要： A method for manufacturing TSVs, wherein the method comprises several steps as follows: A stack structure having a substrate and an ILD layer (inter layer dielectric layer) is provided, in which an opening penetrating through the ILD layer and further extending into the substrate is formed. After an insulator layer and a metal barrier layer are formed on the stack structure and the sidewalls of the opening, a top metal layer is then formed on the stack structure to fulfill the opening. A first planarization process stopping on the barrier layer is conducted to remove a portion of the top metal layer. A second planarization process stopping on the ILD layer is subsequently conducted to remove a portion of the metal barrier layer, a portion of the insulator layer and a portion of the top metal layer, wherein the second planarization process has a polishing endpoint determined by a light interferometry or a motor current.
摘要翻译：一种制造TSV的方法，其中该方法包括以下几个步骤：提供具有基板和ILD层（层间电介质层）的堆叠结构，其中穿透ILD层并进一步延伸到基板中的开口是形成。在堆叠结构和开口的侧壁上形成绝缘体层和金属阻挡层之后，在堆叠结构上形成顶部金属层以实现开口。进行停止在阻挡层上的第一平面化处理以去除顶部金属层的一部分。随后进行停止在ILD层上的第二平坦化处理以去除金属阻挡层的一部分，绝缘体层的一部分和顶部金属层的一部分，其中第二平坦化工艺具有由光线确定的抛光终点干涉测量或电机电流。

2. 发明授权

US08263959B2 Phase change memory device and method of manufacture thereof 有权
标题翻译：相变存储器件及其制造方法
公开(公告)号：US08263959B2
公开(公告)日：2012-09-11
申请号：US11746315
申请日：2007-05-09
申请人： Chao-Hsiung Wang , Li-Shyue Lai , Denny Tang , Wen-Chin Lin
发明人： Chao-Hsiung Wang , Li-Shyue Lai , Denny Tang , Wen-Chin Lin
IPC分类号： H01L29/04
CPC分类号： H01L45/06 , H01L45/1233 , H01L45/1273 , H01L45/144 , H01L45/148 , H01L45/1675 , H01L45/1683
摘要： A method of manufacturing a memory device is provided. The method includes forming an electrode over a substrate. The method also includes forming an opening in the electrode to provide a tapered electrode contact surface proximate the opening. The method further includes forming a phase change feature over the electrode and on the tapered electrode contact surface.
摘要翻译：提供一种制造存储器件的方法。该方法包括在衬底上形成电极。该方法还包括在电极中形成开口以提供靠近开口的锥形电极接触表面。该方法还包括在电极上和锥形电极接触表面上形成相变特征。

3. 发明授权

US07622358B2 Semiconductor device with semi-insulating substrate portions and method for forming the same 失效
标题翻译：具有半绝缘基板部分的半导体器件及其形成方法
公开(公告)号：US07622358B2
公开(公告)日：2009-11-24
申请号：US11241574
申请日：2005-09-30
申请人： Wen-Chin Lin , Denny Tang , Chuan-Ying Lee , Hsu Chen Cheng
发明人： Wen-Chin Lin , Denny Tang , Chuan-Ying Lee , Hsu Chen Cheng
IPC分类号： H01L21/76
CPC分类号： H01L21/76 , H01L21/263 , H01L21/26506 , H01L21/266 , H01L21/823481 , H01L21/823878 , H01L27/08
摘要： A method for forming semi-insulating portions in a semiconductor substrate provides depositing a hardmask film over a semiconductor substructure to a thickness sufficient to prevent charged particles from passing through the hardmask. The hardmask is patterned creating openings through which charged particles pass and enter the substrate during an implantation process. The semi-insulating portions may extend deep into the semiconductor substrate and electrically insulate devices formed on opposed sides of the semi-insulating portions. The charged particles may advantageously be protons and further substrate portions covered by the patterned hardmask film are substantially free of the charged particles.
摘要翻译：在半导体衬底中形成半绝缘部分的方法提供了将半导体衬底上的硬掩模膜沉积到足以防止带电粒子穿过硬掩模的厚度。硬掩模被图案化以产生开孔，在注入过程中带电粒子通过该开口进入衬底。半绝缘部分可以深深地延伸到半导体衬底中并且电绝缘形成在半绝缘部分的相对侧上的器件。带电粒子可以有利地是质子，并且由图案化的硬掩模膜覆盖的另外的基底部分基本上没有带电粒子。

4. 发明申请

US20090140285A1 LIGHT EMITTING DEVICE HAVING FUNCTION OF HEAT-DISSIPATION AND MANUFACTURING PROCESS FOR SUCH DEVICE 审中-公开
标题翻译：具有这种装置的散热功能和制造工艺的发光装置
公开(公告)号：US20090140285A1
公开(公告)日：2009-06-04
申请号：US12202439
申请日：2008-09-02
申请人： Shun-Tian Lin , Wen-Hsiang Chien , Wen-Chin Lin , Jyun-Wei Huang , Sin-Sian Wu
发明人： Shun-Tian Lin , Wen-Hsiang Chien , Wen-Chin Lin , Jyun-Wei Huang , Sin-Sian Wu
IPC分类号： H01L33/00 , H01L21/00
CPC分类号： H05K3/32 , F21K9/233 , F21V7/22 , F21V29/505 , F21V29/745 , F21V29/767 , F21Y2115/10 , H01L33/642 , H01L2224/48091 , H01L2224/48247 , H05K3/4015 , H05K2201/10106 , H05K2201/10242 , H05K2201/10378 , H05K2201/10424 , H05K2201/10962 , H01L2924/00014
摘要： A light-emitting device of a light-emitting diode (LED) and a manufacture method thereof are provided. The light-emitting device includes a post-like metal material, a printed circuit board, conductors, insulators, light-emitting diodes, wires, and an encapsulating material. The light-emitting device has through holes, in which conductors are disposed and surrounded with the insulators. One end of each conductor is connected to the printed circuit board to form a composite structure heat-dissipation substrate. The light-emitting diodes are disposed on the post-like metal material, connected to the conductors via the wires, and encapsulated by the encapsulating material. Furthermore, the light-emitting diodes, the wires, and the encapsulating material can be combined into a light-emitting unit. Moreover, red, blue, and green light-emitting diodes can be combined and the color of output light thereof can be adjusted by controlling the input signal.
摘要翻译：提供了一种发光二极管（LED）的发光装置及其制造方法。发光装置包括柱状金属材料，印刷电路板，导体，绝缘体，发光二极管，导线和封装材料。发光装置具有通孔，其中导体被布置并被绝缘体包围。每个导体的一端连接到印刷电路板上以形成复合结构的散热基片。发光二极管设置在柱状金属材料上，经由导线连接到导体，并由封装材料封装。此外，发光二极管，导线和封装材料可以组合成发光单元。此外，可以组合红色，蓝色和绿色发光二极管，并且可以通过控制输入信号来调节其输出光的颜色。

5. 发明申请

US20080186757A1 Advanced MRAM design 有权
标题翻译：先进的MRAM设计
公开(公告)号：US20080186757A1
公开(公告)日：2008-08-07
申请号：US11743453
申请日：2007-05-02
申请人： Wen-Chin Lin , Hsu-Chen Cheng , Yu-Jen Wang , Denny Tang
发明人： Wen-Chin Lin , Hsu-Chen Cheng , Yu-Jen Wang , Denny Tang
IPC分类号： G11C11/00
CPC分类号： G11C11/16 , G11C11/005 , H01L2924/0002 , H01L2924/00
摘要： Disclosed herein is a technique for created an advanced MRAM array for constructing a memory integrated circuit chip. More specifically, the disclosed principles provide for an integrated circuit memory chip comprised of a combination of at least one of an array of high-speed magnetic memory cells, and at least one of an array of high-density magnetic memory cells. Accordingly, a memory chip constructed as disclosed herein provides the benefit of both high-speed and high-density memory cells on the same memory chip. As a result, applications benefiting from the use of (or perhaps even needing) high-speed memory cells are provided by the memory cells in the high-speed memory cell array.
摘要翻译：这里公开了一种用于创建用于构建存储器集成电路芯片的高级MRAM阵列的技术。更具体地，所公开的原理提供了由高速磁存储器单元的阵列中的至少一个和高密度磁存储单元阵列中的至少一个的组合构成的集成电路存储器芯片。因此，如本文所公开的构造的存储器芯片提供了在相同存储器芯片上的高速和高密度存储器单元的益处。结果，受益于使用（或甚至需要的）高速存储器单元的应用由高速存储单元阵列中的存储单元提供。

6. 发明授权

US07270702B1 Yellow dye compound and the ink composition thereof 失效
标题翻译：黄色染料化合物及其油墨组合物
公开(公告)号：US07270702B1
公开(公告)日：2007-09-18
申请号：US11452909
申请日：2006-06-15
申请人： Wen-Chin Lin , Tzu-Kwei Sun , Jen-Fang Lin
发明人： Wen-Chin Lin , Tzu-Kwei Sun , Jen-Fang Lin
IPC分类号： C09D11/00 , C09B29/036 , C09B67/22
CPC分类号： C09D11/32 , C09B29/363
摘要： The present invention discloses a yellow dye compound having a structure of the following formula (I): wherein M is H, Li, NH4 or Na. The dye compound of the present invention is particularly applied to yellow dye compound for paper-printing ink jet ink and can be made into yellow ink jet ink with greenish yellow, wide color gamut, and excellent solubility.
摘要翻译：本发明公开了具有下式（I）结构的黄色染料化合物：其中M为H，Li，NH 4或Na。本发明的染料化合物特别适用于纸张喷墨油墨的黄色染料化合物，并且可以制成具有黄绿色，宽色域和优异溶解性的黄色喷墨油墨。

7. 发明申请

US20070162736A1 ELECTRONIC DEVICE WITH ACCELERATED BOOT PROCESS AND METHOD FOR THE SAME 审中-公开
标题翻译：具有加速引导过程的电子设备及其相关方法
公开(公告)号：US20070162736A1
公开(公告)日：2007-07-12
申请号：US11462409
申请日：2006-08-04
申请人： Tung-Peng Wu , Wei-Te Hsu , Wen-Chin Lin
发明人： Tung-Peng Wu , Wei-Te Hsu , Wen-Chin Lin
IPC分类号： G06F15/177 , G06F9/00
CPC分类号： G06F9/4401
摘要： An electronic device with accelerated boot process and a method for the same are proposed. When the host of the electronic device is in the off mode or standby mode, users can input a normal boot signal or a fast boot signal to activate the host. The boot signal is encoded by an encoder for producing a corresponding code. The host determines whether the input signal is the normal boot signal or the fast boot signal according to the received code. If the received code is the normal boot signal, the host performs a normal boot process. If the received code is the fast boot signal, an instant launcher directly launches application programs specified in the fast boot signal and blocks the start of unnecessary application programs. The boot process of the electronic device can be effectively accelerated, and users can define several boot modes themselves to meet different requirements.
摘要翻译：提出了一种具有加速启动过程的电子设备及其方法。当电子设备的主机处于关闭模式或待机模式时，用户可以输入正常的引导信号或快速引导信号来激活主机。引导信号由用于产生相应代码的编码器编码。主机根据接收到的代码确定输入信号是正常引导信号还是快速启动信号。如果接收到的代码是正常引导信号，则主机执行正常引导过程。如果接收的代码是快速启动信号，即时启动器将直接启动在快速引导信号中指定的应用程序，并阻止不必要的应用程序的启动。电子设备的启动过程可以有效加速，用户可以自己定义几种启动模式，以满足不同的需求。

8. 发明申请

US20070096230A1 Magnetic memory cells and manufacturing methods 有权
标题翻译：磁记忆体和制造方法
公开(公告)号：US20070096230A1
公开(公告)日：2007-05-03
申请号：US11610760
申请日：2006-12-14
申请人： Yuan-Hung Liu , Chih-Ta Wu , Lan-Lin Chao , Yeur-Luen Tu , Wen-Chin Lin , Chia-Shiung Tsai
发明人： Yuan-Hung Liu , Chih-Ta Wu , Lan-Lin Chao , Yeur-Luen Tu , Wen-Chin Lin , Chia-Shiung Tsai
IPC分类号： H01L43/00 , H01L29/82
CPC分类号： H01L43/12 , H01L27/228
摘要： An improved magnetoresistive memory device has a reduced distance between the magnetic memory element and a conductive memory line used for writing to the magnetic memory element. The reduced distance is facilitated by forming the improved magnetoresistive memory device according to a method that includes forming a mask over the magnetoresistive memory element and forming an insulating layer over the mask layer, then removing portions of the insulating layer using a planarization process. A conductive via can then be formed in the mask layer, for example using a damascene process. The conductive memory line can then be formed over the mask layer and conductive via.
摘要翻译：改进的磁阻存储器件具有减小的磁存储元件与用于写入磁存储器元件的导电存储器线之间的距离。通过根据包括在磁阻存储元件上形成掩模并在掩模层上形成绝缘层，然后使用平坦化处理去除绝缘层的部分的方法，通过形成改进的磁阻存储器件来简化缩短的距离。然后可以在掩模层中形成导电通孔，例如使用镶嵌工艺。然后可以在掩模层和导电通孔上形成导电存储器线。

9. 发明授权

US07203129B2 Segmented MRAM memory array 有权
标题翻译：分段MRAM存储器阵列
公开(公告)号：US07203129B2
公开(公告)日：2007-04-10
申请号：US10780171
申请日：2004-02-16
申请人： Wen-Chin Lin , Danny D. Tang , Li-Shyue Lai
发明人： Wen-Chin Lin , Danny D. Tang , Li-Shyue Lai
IPC分类号： G11C8/00
CPC分类号： G11C11/16 , G11C2213/72 , G11C2213/74
摘要： In one example, an MRAM memory array includes a plurality of word lines, a plurality of bit lines crossing the word lines, and a plurality of first and second diodes, and magnetic tunnel junction memories. Each first diode includes a cathode, and an anode coupled to each bit line. Each second diode includes an anode, and a cathode coupled to each word line. The magnetic tunnel junction memories include a pinned layer, a free layer, and a non-magnetic layer. The non-magnetic layer is located between the pinned layer and the free layer. Each diode is positioned at crossing points of the bit lines and the word lines and connected between the first diode at the corresponding crossing bit line and the second diode at the corresponding crossing word line.
摘要翻译：在一个示例中，MRAM存储器阵列包括多个字线，与字线交叉的多个位线，以及多个第一和第二二极管以及磁性隧道结存储器。每个第一二极管包括阴极和耦合到每个位线的阳极。每个第二二极管包括阳极和耦合到每个字线的阴极。磁性隧道结存储器包括钉扎层，自由层和非磁性层。非磁性层位于被钉扎层和自由层之间。每个二极管位于位线和字线的交叉点处，并连接在相应交叉位线处的第一二极管和相应交叉字线处的第二二极管之间。

10. 发明申请

US20070077697A1 Semiconductor device with semi-insulating substrate portions and method for forming the same 失效
标题翻译：具有半绝缘基板部分的半导体器件及其形成方法
公开(公告)号：US20070077697A1
公开(公告)日：2007-04-05
申请号：US11241574
申请日：2005-09-30
申请人： Wen-Chin Lin , Denny Tang , Chuan-Ying Lee , H. C. Cheng
发明人： Wen-Chin Lin , Denny Tang , Chuan-Ying Lee , H. C. Cheng
IPC分类号： H01L21/8238 , H01L21/425 , H01L21/31
CPC分类号： H01L21/76 , H01L21/263 , H01L21/26506 , H01L21/266 , H01L21/823481 , H01L21/823878 , H01L27/08
摘要： A method for forming semi-insulating portions in a semiconductor substrate provides depositing a hardmask film over a semiconductor substructure to a thickness sufficient to prevent charged particles from passing through the hardmask. The hardmask is patterned creating openings through which charged particles pass and enter the substrate during an implantation process. The semi-insulating portions may extend deep into the semiconductor substrate and electrically insulate devices formed on opposed sides of the semi-insulating portions. The charged particles may advantageously be protons and further substrate portions covered by the patterned hardmask film are substantially free of the charged particles.
摘要翻译：在半导体衬底中形成半绝缘部分的方法提供了将半导体衬底上的硬掩模膜沉积到足以防止带电粒子穿过硬掩模的厚度。硬掩模被图案化以产生开孔，在注入过程中带电粒子通过该开口进入衬底。半绝缘部分可以深深地延伸到半导体衬底中并且电绝缘形成在半绝缘部分的相对侧上的器件。带电粒子可以有利地是质子，并且由图案化的硬掩模膜覆盖的另外的基底部分基本上没有带电粒子。

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