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    • 1. 发明授权
    • Focal plane array integrated circuit with individual pixel signal
processing
    • 焦平面阵列集成电路,具有单独的像素信号处理
    • US5926217A
    • 1999-07-20
    • US97522
    • 1993-07-27
    • Kirk D. PetersonDana DudleyKevin N. Sweetser
    • Kirk D. PetersonDana DudleyKevin N. Sweetser
    • H04N5/33H04N3/14H04N5/335
    • H04N5/33
    • This is a monolithic infrared detector readout circuit for a capacitive sensing element 111 wherein a high gain preamplifier 115 is biased by a large bias element 113, e.g. on the order of 10.sup.12 ohms. The output of the preamplifier 115 is a band-limited by a low pass single-pole filter 117 having a high value resistive element 119, e.g. on the order of 10.sup.9 ohms, and then is clamped by a clamp circuit 131 to a stable reference in a manner that doubles the amplitude of the signal and minimizes low frequency bias shifts and fixed pattern noise. The output of the clamp circuit 131 is buffered by buffer 123 prior to being multiplexed by row address signals. The output from a multiplex switch 125 is then applied to the column line for output to a video circuit or the like.
    • 这是用于电容感测元件111的单片红外检测器读出电路,其中高增益前置放大器115由大的偏置元件113例如偏置。 大约1012欧姆。 前置放大器115的输出由具有高值电阻元件119的低通单极滤波器117限制。 大约为109欧姆,然后被钳位电路131钳位到稳定的基准,使得信号的幅度加倍,并使低频偏移和固定模式噪声最小化。 在被行地址信号复用之前,钳位电路131的输出由缓冲器123缓冲。 然后将多路开关125的输出施加到列线以输出到视频电路等。
    • 3. 发明授权
    • Monolithic delta frame circuit
    • 单片三角架电路
    • US4622587A
    • 1986-11-11
    • US638606
    • 1984-08-07
    • Dana Dudley
    • Dana Dudley
    • H04N5/217H04N5/33H04N5/213
    • H04N5/2173H04N5/33
    • A monolithic delta frame circuit comprises a high speed line address circuit, demultiplexer, line shift register, plurality of buffer amplifiers, an array of difference frame elements, reset circuit means, plurality of sample and hold circuits, multiplexer, and a high speed line address circuit. The high speed line address circuit clocks a single line video input at a fast rate into the demultiplexer for demultiplexing into the line shift register, the line shift register shifts the single line signals and noise into the elements of the array of difference frame elements. As the data from the previous frame which consists of noise or noise minus signal is still present in the difference elements only the signal or delta signal portion feeds through a reset circuit at a slower rate to the multiplexer. The reset circuit introduces offset noises into the signal which is substantially reduced by feedback through the reset circuit. The high speed line address register is connected to the multiplexer for controlling the video output signals through the video out terminal. The video output is at the fast rate, to reduce this rate and for minimizing display blind time the sample and hold circuits are introduced between the reset circuit and the multiplexer. Thus the monolithic delta frame may be used to remove reset noise and rate conversion or in tandem to remove reset noise and offset noise as well as rate conversion.
    • 单片三角形电路包括高速线路地址电路,解复用器,线路移位寄存器,多个缓冲放大器,差分阵列阵列,复位电路装置,多个采样和保持电路,多路复用器和高速线路地址 电路。 高速线路地址电路将单线视频输入以快速速率输入到解复用器中以解复用到线移位寄存器中,线移位寄存器将单线信号和噪声移位到差分帧阵列的元素中。 由于来自前一帧的由噪声或噪声减去信号组成的数据仍然存在于差分元件中,所以信号或增量信号部分以较慢的速率将复位电路馈送到多路复用器。 复位电路将偏移噪声引入到通过复位电路的反馈基本上减小的信号中。 高速线地址寄存器连接到多路复用器,用于通过视频输出端控制视频输出信号。 视频输出速度很快,为了降低这个速率,并且为了最小化显示盲目时间,在复位电路和复用器之间引入采样和保持电路。 因此,单片三角架可用于去除复位噪声和速率转换或串联以去除复位噪声和偏移噪声以及速率转换。
    • 7. 发明授权
    • Thermal imaging system with integrated thermal chopper
    • 具有集成热切割机的热成像系统
    • US5486698A
    • 1996-01-23
    • US229497
    • 1994-04-19
    • Charles M. HansonDana DudleyJames E. Robinson
    • Charles M. HansonDana DudleyJames E. Robinson
    • G01J5/10H04N5/33
    • G01J5/02G01J5/0245G01J5/10H04N5/33
    • A thermal imaging system (10) contains a focal plane array (14) including a plurality of thermal sensors (50) mounted on a substrate (52). The focal plane array (14) generates both a reference signal which represents the temperature of the substrate (52) and a biased signal corresponding to the total radiance emitted by a scene (11). Electronics (16) process the reference signal and the biased signal to obtain an unbiased signal representing radiance differences emitted by objects in the scene (11). A thermoelectric cooler/heater (38) may be provided to optimally adjust the temperature of the substrate (52) to improve overall image quality. Each thermal sensor (50) contains an electrode (66 and 68) that electrically couples the thermal sensor (50) to the substrate (52) and also allows the thermal sensor (50) to deflect, contact, and thermally shunt with the substrate (52).
    • 热成像系统(10)包含焦平面阵列(14),其包括安装在基底(52)上的多个热传感器(50)。 焦平面阵列(14)产生表示衬底(52)的温度的参考信号和对应于由场景(11)发射的总辐射度的偏置信号。 电子设备(16)处理参考信号和偏置信号以获得表示场景(11)中物体发射的辐射差的无偏信号。 可以提供热电冷却器/加热器(38)以最佳地调节基板(52)的温度以提高整体图像质量。 每个热传感器(50)包含一个将热传感器(50)电耦合到衬底(52)的电极(66和68),并且还允许热传感器(50)偏转,接触并与衬底热分流 52)。
    • 8. 发明授权
    • Visible and near infrared imaging system
    • 可见光和近红外成像系统
    • US4617593A
    • 1986-10-14
    • US638832
    • 1984-08-07
    • Dana Dudley
    • Dana Dudley
    • H04N5/33H04N5/363H04N5/365H04N7/18
    • H04N5/33H04N5/363H04N5/3653
    • An improved visible and near infrared imaging system, in a first embodiment, has an optical system, chopper, improved detector, improved first and second delta frames, display, and timing and control circuits. The detector is a parallel amplification type detector with the sense lines each including a total subtraction chain. Each parallel amplifier chain is split so that two branches exist, each containing sample and hold circuits and one with a gain of -C.sub.s /(C.sub.d +C.sub.s) times the other. The outputs of the amplifier chains are multiplexed to the first delta frame for storage by frame for summation with the outputs of the next frame for substantially reducing the reset noise. The summed output signals are multiplexed at a 2x rate into the second delta frame for removal of the pattern noise and multiplexed out at a 1x rate for display. In a second embodiment a transversal filter receives the output of the second delta frame for performing a peaking function on the signals for improving the resolution of the displayed image.
    • 在第一实施例中,改进的可见光和近红外成像系统具有光学系统,斩波器,改进的检测器,改进的第一和第二增量框架,显示器,定时和控制电路。 检测器是并行放大型检测器,检测线各自包括总减法链。 每个并联放大器链被分离,使得存在两个分支,每个分支包含采样和保持电路,并且具有增益为Cs /(Cd + Cs)的另一个分支。 放大器链的输出被多路复用到第一增量帧,用于存储逐帧以与下一帧的输出相加,以显着减少复位噪声。 相加的输出信号以2x速率被复用到第二增量帧中以去除模式噪声,并以1x速率多路复用以进行显示。 在第二实施例中,横向滤波器接收第二增量帧的输出,以对信号执行峰值功能,以改善所显示图像的分辨率。
    • 10. 发明授权
    • Delta frame circuit
    • 三角架电路
    • US4178612A
    • 1979-12-11
    • US926991
    • 1978-07-21
    • Dana DudleyWilliam M. Knight, Jr.
    • Dana DudleyWilliam M. Knight, Jr.
    • H04N5/16H04N5/217H04N5/33H04N5/21H04N5/30
    • H04N5/2176H04N5/33
    • A delta frame circuit is disclosed. The delta frame circuit is connected to the video output of, for example, an imaging system for the purpose of producing a moving target indication radar or, for example, a chopped imaging system for the purpose of removing fixed pattern or undesirable offset voltages. The delta frame circuit comprises a plurality of capacitors having top plates connected to the video output and lower plates connected to the drains of a first plurality of field effect transistors. The gates and sources of these field effect transistors are connected, respectively, to a Y address circuit and drains of a second plurality of field effect transistors. The gates and sources of these field effect transistors are connected, respectively, to a X address circuit and to the drains of a third plurality of field effect transistors whose gates and sources are connected, respectively, to the Y address circuit, and junction of a precharge reference voltage and output amplifier. The X and Y address circuits address the capacitors which store the video output of a field pixel by pixel for comparison to a reference voltage and a second video field whereby the offset signals are substantially removed.
    • 公开了一种Δ帧电路。 为了产生移动目标指示雷达或例如用于去除固定图案或不希望的偏移电压的斩波成像系统,增量框架电路连接到例如成像系统的视频输出。 三角形框架电路包括多个电容器,其具有连接到视频输出的顶板和连接到第一多个场效应晶体管的漏极的下板。 这些场效应晶体管的栅极和源极分别连接到第二多个场效应晶体管的Y寻址电路和漏极。 这些场效应晶体管的栅极和源极分别连接到X地址电路和第三多个场效应晶体管的漏极,其栅极和源极分别连接到Y地址电路,并且将 预充电参考电压和输出放大器。 X和Y地址电路寻址存储像素的视频输出的电容器,用于与参考电压和第二视频场进行比较,从而基本上去除偏移信号。