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    • 1. 发明授权
    • Method and system for automatically determining transparency behavior of non-scan cells for combinational automatic test pattern generation
    • 用于自动确定非扫描单元的组合自动测试图案生成的透明度行为的方法和系统
    • US06269463B1
    • 2001-07-31
    • US09283310
    • 1999-03-31
    • Suryanarayana DuggiralaHarihara GanesanCyrus Hay
    • Suryanarayana DuggiralaHarihara GanesanCyrus Hay
    • G06F1100
    • G01R31/31725G01R31/318364G01R31/318378G01R31/318583G01R31/318594
    • A method and system for generating test vectors for testing scan-based sequential circuits that contain non-scan cells using combinational ATPG techniques. The present invention includes the computer implemented step of receiving a netlist description of an integrated circuit device that comprises scan cells and non-scannable cells. Under certain conditions, some non-scan cells may exhibit sequential transparency behavior. The present invention identifies such conditions and characterizes each non-scan cell as sequentially transparent or non-transparent. Based on such characterization, the present invention transforms non-scan cells exhibiting sequential transparency behavior with transparent logic models during combinational ATPG (Automatic Test Pattern Generation) analysis. Because non-scan cells of exhibiting sequential transparency behavior are not replaced with “force-to-X” models, the fault coverage of the test patterns thus generated is significantly improved.
    • 一种用于生成测试向量的方法和系统,用于使用组合ATPG技术测试包含非扫描单元的基于扫描的顺序电路。 本发明包括计算机实现的步骤,用于接收包括扫描单元和不可扫描单元的集成电路设备的网表描述。 在某些条件下,一些非扫描单元可能表现出顺序的透明性。 本发明识别这样的条件并且将每个非扫描单元的特征化为依次透明或不透明。 基于这种表征,本发明在组合ATPG(自动测试模式生成)分析期间,利用透明逻辑模型来转换呈现顺序透明度行为的非扫描单元。 由于表现顺序透明度行为的非扫描单元未被“强制到X”模型所替代,所以生成的测试图案的故障覆盖率得到显着改善。
    • 4. 发明授权
    • Slack-based transition-fault testing
    • 基于松弛的过渡故障测试
    • US07546500B2
    • 2009-06-09
    • US11366679
    • 2006-03-02
    • Rohit KapurTom W. WilliamsCyrus Hay
    • Rohit KapurTom W. WilliamsCyrus Hay
    • G01R31/28
    • G01R31/31725
    • A system that generates test patterns for detecting transition faults in an integrated circuit (IC). During operation, the system receives slack times for each net in the IC. Note that a slack time for a net is the minimum amount of delay that the given net can tolerate before violating a timing constraint. For each possible transition fault in the IC, the system uses the slack times for nets in the IC to generate a test pattern which exposes the transition fault by producing a transition that propagates along the longest path to the transition fault.
    • 一种生成用于检测集成电路(IC)中的过渡故障的测试模式的系统。 在操作期间,系统为IC中的每个网络收到松弛时间。 请注意,网络的松弛时间是给定网络在违反时序约束之前可以容忍的最小延迟时间。 对于IC中的每个可能的过渡故障,系统使用IC中的网络的松弛时间来产生测试模式,该测试模式通过产生沿着最长路径传播到转换故障的转变来暴露过渡故障。