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1. 发明授权

US4800525A Dual ended folded bit line arrangement and addressing scheme 失效
标题翻译：双端折叠位线布置和寻址方案
公开(公告)号：US4800525A
公开(公告)日：1989-01-24
申请号：US83911
申请日：1987-08-06
申请人： Ashwin H. Shah , Richard H. Womack , Chu-Ping Wang
发明人： Ashwin H. Shah , Richard H. Womack , Chu-Ping Wang
IPC分类号： G11C11/4097 , G11C5/06 , G11C7/00 , G11C8/00
CPC分类号： G11C11/4097
摘要： A scheme for addressing memory cells in random access memory arrays includes bit lines divided into a plurality of segments. Each pair of bit lines has a sense amp at each end coupled to both bit lines in the pair. Word lines address memory cells coupled to each bit line of the pair. When a pair of memory cells is accessed, the bit lines are electrically divided so that one memory cell is coupled to one sense amp through one bit line, and the other memory cell is coupled to the other sense amp through the other bit line. The memory cells can be coupled to the bit lines through segment lines, with each segment line connecting a subset of the memory cells to a bit line, in order to reduce capacitances presented to the sense amps. An alternating linear array of sense amps and bit line pairs can be used to increase overall density of the memory array by allowing sense amps to access more than one bit line pair. The bit lines are addressed so that each sense amp receives data from one one bit line pair at a time. Segment lines having no currently addressed memory cells can be coupled to the sense amps in order to better balance input capacitances presented thereto. Selecting the bit line sections, segments, and memory cells in the proper order minimizes the effect of noise due to stray capacitances by causing them to appear as a common mode signal across the bit line pairs.
摘要翻译：用于寻址随机存取存储器阵列中的存储单元的方案包括分成多个段的位线。每对位线在每一端具有耦合到该对中的两个位线的感测放大器。字线寻址耦合到该对的每个位线的存储器单元。当访问一对存储器单元时，位线被电分割，使得一个存储单元通过一个位线耦合到一个读出放大器，而另一个存储单元通过另一个位线耦合到另一个读出放大器。存储器单元可以通过分段线耦合到位线，每个分段线将存储器单元的子集连接到位线，以便减小呈现给感测放大器的电容。传感放大器和位线对的交替线性阵列可以用于通过允许感测放大器访问多于一个位线对来增加存储器阵列的总体密度。位线被寻址，使得每个读出放大器一次从一个位线对接收数据。没有当前寻址的存储器单元的段线可以耦合到感测放大器，以便更好地平衡提供给它的输入电容。以适当的顺序选择位线部分，段和存储单元通过使它们在位线对上显示为共模信号来最小化由于杂散电容引起的噪声的影响。

2. 发明申请

US20180264529A1 Air Replenishing Fume Hood 审中-公开
公开(公告)号：US20180264529A1
公开(公告)日：2018-09-20
申请号：US15459038
申请日：2017-03-15
申请人： Chu-Ping Wang
发明人： Chu-Ping Wang
IPC分类号： B08B15/02 , A62C2/06 , A62C37/40 , A62C2/18 , A62C2/24
CPC分类号： B08B15/023 , A62B11/00 , B01L1/04 , B01L2200/085 , B01L2200/147
摘要： An air replenishing fume hood includes a cabinet, a door set, an air replenishing unit and air guiding unit. The cabinet has an inner casing defining an operating chamber and having an air inlet and an air outlet. A side of the cabinet includes an operation window. A first air passage is formed between the inner casing and the cabinet. The door set includes an outer door leaf adapted to open or close the operation window, and an inner door leaf adapted to open or close the air inlet. An end of the air replenishing unit extends into an external space via an outdoor tube, and another end of the air replenishing unit is connected to the first air passage via an extension tube. The air guiding unit includes an end connected to the air outlet, and another end extending into the external space or a collection tank.

3. 发明申请

US20070109832A1 ECO cell for reducing leakage power 有权
标题翻译： ECO电池用于减少泄漏电力
公开(公告)号：US20070109832A1
公开(公告)日：2007-05-17
申请号：US11281035
申请日：2005-11-17
申请人： Yung-Chin Hou , Lee-Chung Lu , Chu-Ping Wang , Li-Chun Tien
发明人： Yung-Chin Hou , Lee-Chung Lu , Chu-Ping Wang , Li-Chun Tien
IPC分类号： G11C5/06
CPC分类号： G11C5/063 , H01L27/0207
摘要： A semiconductor structure includes a first conductive line for connecting to a power supply, and a second conductive line for connecting to a complementary power supply. At least one spare cell is decoupled from the first or second conductive line for being selectively connected to at lease one normal cell, the first conductive line and the second conductive line only when an engineering change order is placed.
摘要翻译：半导体结构包括用于连接到电源的第一导线和用于连接到互补电源的第二导线。至少一个备用单元与第一或第二导线分离，以便仅当放置工程改变顺序时才有选择地连接到至少一个正常单元，第一导线和第二导线。

4. 发明授权

US4750839A Semiconductor memory with static column decode and page mode addressing capability 失效
标题翻译：具有静态列解码和页模式寻址能力的半导体存储器
公开(公告)号：US4750839A
公开(公告)日：1988-06-14
申请号：US763483
申请日：1985-08-07
申请人： Chu-Ping Wang , Ashwin H. Shah , Richard H. Womack
发明人： Chu-Ping Wang , Ashwin H. Shah , Richard H. Womack
IPC分类号： G11C7/00 , G11C7/10 , G11C7/22 , G11C8/18 , G11C11/401 , G11C11/41 , G11C8/00
CPC分类号： G11C7/22 , G11C7/1027 , G11C7/1045 , G11C8/18
摘要： A semiconductor memory includes a memory array (10) that is operable to be addressed in either the page mode or the static column decode mode. A column address transparent latch (20) is provided which is controlled to either directly input a column address to a column decoder (26) or to latch the address in response to the generation of the column address strobe. A sequence detect circuit (30) detects the sequence to the row address strobe and the column address strobe to determine whether the page mode or the static column decode mode is generated. The sequence detect circuit (30) generates a Y-enable signal in a circuit (31) for control of the latch (20).
摘要翻译：半导体存储器包括可操作以在页面模式或静态列解码模式中寻址的存储器阵列（10）。提供列地址透明锁存器（20），其被控制为直接向列解码器（26）输入列地址或响应于列地址选通的产生来锁存地址。序列检测电路（30）检测到行地址选通和列地址选通的顺序，以确定页模式或静态列解码模式是否被生成。序列检测电路（30）在用于控制锁存器（20）的电路（31）中产生Y使能信号。

5. 发明授权

US07458051B2 ECO cell for reducing leakage power 有权
标题翻译： ECO电池用于减少泄漏电力
公开(公告)号：US07458051B2
公开(公告)日：2008-11-25
申请号：US11281035
申请日：2005-11-17
申请人： Yung-Chin Hou , Lee-Chung Lu , Chu-Ping Wang , Li-Chun Tien
发明人： Yung-Chin Hou , Lee-Chung Lu , Chu-Ping Wang , Li-Chun Tien
IPC分类号： G06F17/50
CPC分类号： G11C5/063 , H01L27/0207
摘要： A semiconductor structure including at least one spare cell is disclosed. The semiconductor structure includes a first conductive line coupled to a power supply, and a second conductive line coupled to a complementary power supply. At least one spare cell is decoupled from the first or second conductive line for being selectively connected to at least one normally functioning electronic components, the first conductive line and the second conductive line only during a rerouting process for reducing leakage power of the semiconductor structure.
摘要翻译：公开了包括至少一个备用单元的半导体结构。半导体结构包括耦合到电源的第一导线和耦合到互补电源的第二导线。至少一个备用单元与第一或第二导线分离，以便仅在用于减小半导体结构的泄漏功率的重新路由过程中选择性地连接到至少一个正常工作的电子部件，第一导线和第二导线。

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