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1. 发明申请

US20140061842A1 Multiple Metal Film Stack in BSI Chips 有权
标题翻译： BSI芯片中的多金属薄膜叠层
公开(公告)号：US20140061842A1
公开(公告)日：2014-03-06
申请号：US13604380
申请日：2012-09-05
申请人： Shyh-Fann Ting , Jiech-Fun Lu , Ming-I Wang , Yeur-Luen Tu , Ching-Chun Wang
发明人： Shyh-Fann Ting , Jiech-Fun Lu , Ming-I Wang , Yeur-Luen Tu , Ching-Chun Wang
IPC分类号： H01L27/146 , H01L31/18
CPC分类号： H01L27/1464 , H01L21/76838 , H01L27/14623 , H01L27/14687
摘要： A method includes forming an opening extending from a back surface of a semiconductor substrate to a metal pad on a front side of the semiconductor substrate, and forming a first conductive layer including a first portion overlapping active image sensors in the semiconductor substrate, a second portion overlapping black reference image sensors in the semiconductor substrate, and a third portion in the opening to contact the metal pad. A second conductive layer is formed over and contacting the first conductive layer. A first patterning step is performed to remove the first and the second portions of the second conductive layer, wherein the first conductive layer is used as an etch stop layer. A second patterning step is performed to remove a portion of the first portion of the first conductive layer. The second and the third portions of the first conductive layer remain after the second patterning step.
摘要翻译：一种方法包括形成从半导体衬底的背表面延伸到半导体衬底的前侧上的金属焊盘的开口，以及在半导体衬底中形成包括与有源图像传感器重叠的第一部分的第一导电层，第二部分半导体衬底中重叠的黑色参考图像传感器，以及开口中的与金属垫接触的第三部分。在第一导电层上形成第二导电层并与第一导电层接触。执行第一图案化步骤以去除第二导电层的第一和第二部分，其中第一导电层用作蚀刻停止层。执行第二图案化步骤以去除第一导电层的第一部分的一部分。在第二图案化步骤之后，第一导电层的第二和第三部分保留。

2. 发明申请

US20130285130A1 BACKSIDE ILLUMINATED IMAGE SENSOR WITH NEGATIVELY CHARGED LAYER 有权
标题翻译：背面照明的图像传感器带负电荷层
公开(公告)号：US20130285130A1
公开(公告)日：2013-10-31
申请号：US13743979
申请日：2013-01-17
申请人： Shyh-Fann TING , Chih-Yu LAI , Cheng-Ta WU , Yeur-Luen TU , Ching-Chun WANG
发明人： Shyh-Fann TING , Chih-Yu LAI , Cheng-Ta WU , Yeur-Luen TU , Ching-Chun WANG
IPC分类号： H01L27/146
CPC分类号： H01L27/146 , H01L27/1463 , H01L27/1464 , H01L27/14683
摘要： A semiconductor image sensor device having a negatively-charged layer includes a semiconductor substrate having a p-type region, a plurality of radiation-sensing regions in the p-type region proximate a front side of the semiconductor substrate, and a negatively-charged layer adjoining the p-type region proximate the plurality of radiation-sensing regions. The negatively-charged layer may be an oxygen-rich silicon oxide, a high-k metal oxide, or a silicon nitride formed as a liner in a shallow trench isolation feature, a sidewall spacer or an offset spacer of a transistor gate, a salicide-block layer, a buffer layer under a salicide-block layer, a backside surface layer, or a combination of these.
摘要翻译：具有带负电荷层的半导体图像传感器装置包括具有p型区域的半导体衬底，在靠近半导体衬底的前侧的p型区域中的多个辐射感测区域和带负电荷层邻近多个辐射感测区域的p型区域。带负电荷的层可以是在浅沟槽隔离特征，侧壁间隔物或晶体管栅极的偏移间隔物中形成的富氧氧化硅，高k金属氧化物或形成为衬垫的氮化硅，自对准硅 - 嵌段层，在自对流硅化物阻挡层下面的缓冲层，背面表面层或它们的组合。

3. 发明授权

US07999342B2 Image sensor element for backside-illuminated sensor 有权
标题翻译：用于背面照明传感器的图像传感器元件
公开(公告)号：US07999342B2
公开(公告)日：2011-08-16
申请号：US11859848
申请日：2007-09-24
申请人： Tzu-Hsuan Hsu , Dun-Nian Yaung , Ching-Chun Wang
发明人： Tzu-Hsuan Hsu , Dun-Nian Yaung , Ching-Chun Wang
IPC分类号： H01L31/0232
CPC分类号： H01L27/14625 , H01L27/14603 , H01L27/1464
摘要： Provided is a backside-illuminated sensor including a semiconductor substrate having a front surface and a back surface. A plurality of image sensor elements are formed on the front surface of the semiconductor substrate. At least one of the image sensor elements includes a transfer transistor and a photodetector. The gate of the transfer transistor includes an optically reflective layer. The gate of the transfer transistor, including the optically reflective layer, overlies the photodetector. In one embodiment, the gate overlies the photodetector by at least 5%.
摘要翻译：提供了一种背面照明传感器，其包括具有前表面和后表面的半导体基板。多个图像传感器元件形成在半导体衬底的前表面上。图像传感器元件中的至少一个包括传输晶体管和光电检测器。转移晶体管的栅极包括光反射层。包括光反射层的传输晶体管的栅极覆盖在光电检测器上。在一个实施例中，栅极覆盖光电探测器至少5％。

4. 发明申请

US20110115048A1 METHOD OF FORMING AN ISOLATION STRUCTURE 有权
标题翻译：形成隔离结构的方法
公开(公告)号：US20110115048A1
公开(公告)日：2011-05-19
申请号：US13009354
申请日：2011-01-19
申请人： Ching-Chun Wang , Tzu-Hsuan Hsu
发明人： Ching-Chun Wang , Tzu-Hsuan Hsu
IPC分类号： H01L29/06 , H01L23/58
CPC分类号： H01L23/522 , H01L21/6836 , H01L21/76256 , H01L21/76898 , H01L23/53223 , H01L23/53238 , H01L2221/6834 , H01L2924/0002 , H01L2924/13091 , H01L2924/14 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/00
摘要： Provided is a method of fabricating a semiconductor device that includes providing a semiconductor substrate having a front side and a back side, forming a first circuit and a second circuit at the front side of the semiconductor substrate, bonding the front side of the semiconductor substrate to a carrier substrate, thinning the semiconductor substrate from the back side, and forming an trench from the back side to the front side of the semiconductor substrate to isolate the first circuit from the second circuit.
摘要翻译：提供一种制造半导体器件的方法，该半导体器件包括提供具有正面和背面的半导体衬底，在半导体衬底的正面形成第一电路和第二电路，将半导体衬底的正面粘合到载体衬底，从背面减薄半导体衬底，并且从半导体衬底的背侧到前侧形成沟槽，以将第一电路与第二电路隔离。

5. 发明授权

US07897477B2 Method of forming an isolation structure 有权
标题翻译：形成隔离结构的方法
公开(公告)号：US07897477B2
公开(公告)日：2011-03-01
申请号：US12357094
申请日：2009-01-21
申请人： Ching-Chun Wang , Tzu-Hsuan Hsu
发明人： Ching-Chun Wang , Tzu-Hsuan Hsu
IPC分类号： H01L21/76
CPC分类号： H01L23/522 , H01L21/6836 , H01L21/76256 , H01L21/76898 , H01L23/53223 , H01L23/53238 , H01L2221/6834 , H01L2924/0002 , H01L2924/13091 , H01L2924/14 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/00
摘要： Provided is a method of fabricating a semiconductor device that includes providing a semiconductor substrate having a front side and a back side, forming a first circuit and a second circuit at the front side of the semiconductor substrate, bonding the front side of the semiconductor substrate to a carrier substrate, thinning the semiconductor substrate from the back side, and forming an trench from the back side to the front side of the semiconductor substrate to isolate the first circuit from the second circuit.
摘要翻译：提供一种制造半导体器件的方法，该半导体器件包括提供具有正面和背面的半导体衬底，在半导体衬底的正面形成第一电路和第二电路，将半导体衬底的正面粘合到载体衬底，从背面减薄半导体衬底，并且从半导体衬底的背侧到前侧形成沟槽，以将第一电路与第二电路隔离。

6. 发明授权

US07838325B2 Method to optimize substrate thickness for image sensor device 有权
标题翻译：优化图像传感器设备基板厚度的方法
公开(公告)号：US07838325B2
公开(公告)日：2010-11-23
申请号：US12371146
申请日：2009-02-13
申请人： Tzu-Hsuan Hsu , Alex Hsu , Ching-Chun Wang
发明人： Tzu-Hsuan Hsu , Alex Hsu , Ching-Chun Wang
IPC分类号： H01L21/00
CPC分类号： H01L27/14689 , H01L21/26513 , H01L27/1463
摘要： Provided is a method for fabricating an image sensor device that includes providing a substrate having a front side and a back side; patterning a photoresist on the front side of the substrate to define an opening having a first width, the photoresist having a first thickness correlated to the first width; performing an implantation process through the opening using an implantation energy correlated to the first thickness thereby forming a first doped isolation feature; forming a light sensing feature adjacent to the first doped isolation feature, the light sensing feature having a second width; and thinning the substrate from the back side so that the substrate has a second thickness that does not exceed twice a depth of the first doped isolation feature. A pixel size is substantially equal to the first and second widths.
摘要翻译：提供一种制造图像传感器装置的方法，该图像传感器装置包括提供具有正面和背面的基板; 在衬底的前侧上形成光致抗蚀剂以限定具有第一宽度的开口，光致抗蚀剂具有与第一宽度相关的第一厚度; 通过使用与第一厚度相关的注入能量通过开口执行注入工艺，从而形成第一掺杂隔离特征; 形成与所述第一掺杂隔离特征相邻的光感测特征，所述光感测特征具有第二宽度; 以及从背面使衬底变薄，使得衬底具有不超过第一掺杂隔离特征深度的两倍的第二厚度。像素尺寸基本上等于第一和第二宽度。

7. 发明授权

US07656000B2 Photodetector for backside-illuminated sensor 有权
标题翻译：背面照明传感器的光电探测器
公开(公告)号：US07656000B2
公开(公告)日：2010-02-02
申请号：US11753480
申请日：2007-05-24
申请人： Tzu-Hsuan Hsu , Dun-Nian Yaung , Ching-Chun Wang
发明人： Tzu-Hsuan Hsu , Dun-Nian Yaung , Ching-Chun Wang
IPC分类号： H01L31/00 , H01L31/062
CPC分类号： H01L27/14643 , H01L27/14625 , H01L27/1464
摘要： A backside-illuminated sensor including a semiconductor substrate. The semiconductor substrate has a front surface and a back surface. A plurality of pixels are formed on the front surface of the semiconductor substrate. At least one pixel includes a photogate structure. The photogate structure has a gate that includes a reflective layer.
摘要翻译：背面照明传感器，包括半导体衬底。半导体衬底具有前表面和后表面。在半导体衬底的前表面上形成多个像素。至少一个像素包括光栅结构。光门结构具有包括反射层的栅极。

8. 发明申请

US20080198454A1 Color Filter For Image Sensor 有权
标题翻译：图像传感器滤色片
公开(公告)号：US20080198454A1
公开(公告)日：2008-08-21
申请号：US11676388
申请日：2007-02-19
申请人： Ching-Chun Wang , Dun-Nian Yaung , Chien-Hsien Tseng , Shou-Gwo Wuu
发明人： Ching-Chun Wang , Dun-Nian Yaung , Chien-Hsien Tseng , Shou-Gwo Wuu
IPC分类号： G02B5/30
CPC分类号： G02B5/201 , G02B5/223
摘要： An image sensor device includes a semiconductor substrate having a front surface and a back surface, pixels formed on the front surface of the semiconductor substrate, and grid arrays aligned with one of the pixels. One of the grid arrays is configured to allow a wavelength of light to pass through to the corresponding one of the pixels. The grid arrays are disposed overlying the front or back surface of the semiconductor substrate.
摘要翻译：图像传感器装置包括具有前表面和后表面的半导体衬底，形成在半导体衬底的前表面上的像素和与像素之一对准的栅格阵列。网格阵列中的一个被配置为允许光的波长通过到相应的一个像素。栅格阵列设置在半导体衬底的前表面或后表面上。

9. 发明授权

US07368770B1 Well region with rounded corners 有权
标题翻译：井区有圆角
公开(公告)号：US07368770B1
公开(公告)日：2008-05-06
申请号：US11349786
申请日：2006-02-07
申请人： Clifford I. Drowley , Ching-Chun Wang , Jungwook Yang
发明人： Clifford I. Drowley , Ching-Chun Wang , Jungwook Yang
IPC分类号： H01L31/062 , H01L31/113
CPC分类号： H01L27/14603
摘要： A semiconductor imager structure having a well region formed in a substrate layer. The well region being of a predetermined shape having a plurality of corners being non-right angles.
摘要翻译：一种在衬底层中形成有阱区的半导体成像器结构。井区具有预定形状，其中多个角是非直角。

10. 发明授权

US07312484B1 Pixel having an oxide layer with step region 有权
标题翻译：具有带步进区域的氧化物层的像素
公开(公告)号：US07312484B1
公开(公告)日：2007-12-25
申请号：US11350298
申请日：2006-02-07
申请人： Clifford I. Drowley , Ching-Chun Wang , Jungwook Yang
发明人： Clifford I. Drowley , Ching-Chun Wang , Jungwook Yang
IPC分类号： H01L31/0328
CPC分类号： H01L27/14603
摘要： A semiconductor structure, having a doped well region being formed in a substrate layer and a transistor having a terminal provided within said doped well region. The semiconductor structure also includes an oxide layer formed over the substrate layer, the doped well region, a poly silicon region, and the terminal of the transistor. The oxide layer including a step region being located where a height of the oxide layer transitions from a height associated with the doped well region to a height associated with the terminal of the transistor.
摘要翻译：一种半导体结构，其具有在衬底层中形成的掺杂阱区和在所述掺杂阱区内具有端子的晶体管。半导体结构还包括在衬底层上形成的氧化物层，掺杂阱区，多晶硅区和晶体管的端子。氧化物层包括步骤区域，其中氧化物层的高度从与掺杂阱区域相关联的高度转变到与晶体管的端子相关联的高度。

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