专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

WO2005027187A3 THIN FILM TRANSISTOR ARRAY PANEL AND METHOD OF MANUFACTURING THE SAME 审中-公开
公开(公告)号：WO2005027187A3
公开(公告)日：2005-03-24
申请号：PCT/KR2004/002376
申请日：2004-09-16
申请人： SAMSUNG ELECTRONICS CO., LTD. , KIM, Sang-Gab , LEE, Je-Min , CHO, Kwan-Young , JEONG, Jong-Tae , SONG, In-Ho , CHOE, Hee-Hwan , KANG, Sung-Chul , KANG, Ho-Min , CHOI, Beohm-Rock , CHOI, Joon-Hoo
发明人： KIM, Sang-Gab , LEE, Je-Min , CHO, Kwan-Young , JEONG, Jong-Tae , SONG, In-Ho , CHOE, Hee-Hwan , KANG, Sung-Chul , KANG, Ho-Min , CHOI, Beohm-Rock , CHOI, Joon-Hoo
IPC分类号： G02F1/136
摘要： The present invention relates to a thin film transistor array panel, a liquid crystal display, and a manufacturing method of the same. A TFT array for a LCD or an EL display is used as a circuit board for driving the respective pixels in an independent manner. The present invention provides pixel electrodes and contact assistants, which connect expansions of gate lines and data lines to an external circuit, having a structure of double layers including IZO layer and ITO layer. The ITO layer is disposed on the IZO layer. In the present invention, the pixel electrodes are formed to have double layers of IZO layer and ITO layer to avoid wires from getting damage by the ITO etchant and to prevent prove pins from having accumulation of foreign body during the gross test. In the present invention, the contact assistants may only be formed to have double layers of IZO layer and ITO layer to prevent prove pins from having accumulation of foreign body during the gross test. Since the consumption of ITO is reduced, manufacturing cost decreases.

2. 发明申请

WO2005027187A2 THIN FILM TRANSISTOR ARRAY PANEL AND METHOD OF MANUFACTURING THE SAME 审中-公开
标题翻译：薄膜晶体管阵列及其制造方法
公开(公告)号：WO2005027187A2
公开(公告)日：2005-03-24
申请号：PCT/KR2004002376
申请日：2004-09-16
申请人： SAMSUNG ELECTRONICS CO LTD , KIM SANG-GAB , LEE JE-MIN , CHO KWAN-YOUNG , JEONG JONG-TAE , SONG IN-HO , CHOE HEE-HWAN , KANG SUNG-CHUL , KANG HO-MIN , CHOI BEOHM-ROCK , CHOI JOON-HOO
发明人： KIM SANG-GAB , LEE JE-MIN , CHO KWAN-YOUNG , JEONG JONG-TAE , SONG IN-HO , CHOE HEE-HWAN , KANG SUNG-CHUL , KANG HO-MIN , CHOI BEOHM-ROCK , CHOI JOON-HOO
IPC分类号： G02F1/1343 , G02F1/1345 , G02F1/136 , G02F1/1362 , H01L20060101 , H01L27/32 , H01L51/52 , H01L
CPC分类号： G02F1/13439 , G02F1/1345 , G02F1/136227 , G02F2001/13629 , H01L27/322 , H01L27/3244 , H01L27/3276 , H01L51/5215 , H01L2251/558
摘要： The present invention relates to a thin film transistor array panel, a liquid crystal display, and a manufacturing method of the same. A TFT array for a LCD or an EL display is used as a circuit board for driving the respective pixels in an independent manner. The present invention provides pixel electrodes and contact assistants, which connect expansions of gate lines and data lines to an external circuit, having a structure of double layers including IZO layer and ITO layer. The ITO layer is disposed on the IZO layer. In the present invention, the pixel electrodes are formed to have double layers of IZO layer and ITO layer to avoid wires from getting damage by the ITO etchant and to prevent prove pins from having accumulation of foreign body during the gross test. In the present invention, the contact assistants may only be formed to have double layers of IZO layer and ITO layer to prevent prove pins from having accumulation of foreign body during the gross test. Since the consumption of ITO is reduced, manufacturing cost decreases.
摘要翻译：本发明涉及薄膜晶体管阵列面板，液晶显示器及其制造方法。用于LCD或EL显示器的TFT阵列用作用于独立地驱动各个像素的电路板。本发明提供了将栅极线和数据线的扩展连接到外部电路的像素电极和接触辅助件，其具有包括IZO层和ITO层的双层结构。 ITO层设置在IZO层上。在本发明中，像素电极形成为具有双层IZO层和ITO层，以避免电线被ITO蚀刻剂损坏，并且防止在总体测试期间引脚不会积累异物。在本发明中，接触助剂只能形成为具有双层IZO层和ITO层，以防止在总体测试期间引脚不会积累异物。由于ITO的消耗减少，制造成本降低。

3. 发明申请

WO2004036303A1 A THIN FILM TRANSLATOR ARRAY PANEL AND A METHOD FOR MANUFACTURING THE PANEL 审中-公开
标题翻译：薄膜翻译器阵列面板和制造面板的方法
公开(公告)号：WO2004036303A1
公开(公告)日：2004-04-29
申请号：PCT/KR2003/000146
申请日：2003-01-23
申请人： SAMSUNG ELECTRONICS CO., LTD. , HONG, Mun-Pyo , ROH, Nam-Seok , CHOE, Hee-Hwan , SONG, Keun-Kyu
发明人： HONG, Mun-Pyo , ROH, Nam-Seok , CHOE, Hee-Hwan , SONG, Keun-Kyu
IPC分类号： G02F1/136
CPC分类号： H01L29/4908 , G02F1/1368 , H01L27/0248 , H01L27/12 , H01L27/124 , H01L27/1288 , H01L29/458
摘要： A gate wire including a gate line and a gate electrode is formed on a substrate and a gate insulating layer is formed on the substrate. A semiconductor pattern and an etching assistant pattern are formed on the gate insulating layer and a source/drain conductor pattern and an etching assistant layer are formed on the semiconductor pattern and the etching assistant pattern. A data wire including a data line and source and drain electrodes separated from each other is formed by removing the etching assistant layer and partly removing the source/drain conductor pattern. A pixel electrode connected to the drain electrodes is formed.
摘要翻译：在衬底上形成包括栅极线和栅电极的栅极线，并且在衬底上形成栅极绝缘层。在栅极绝缘层上形成半导体图案和蚀刻辅助图案，并且在半导体图案和蚀刻辅助图案上形成源极/漏极导体图案和蚀刻辅助层。通过去除蚀刻辅助层并部分地去除源极/漏极导体图案，形成包括数据线和彼此分离的源极和漏极的数据线。形成连接到漏电极的像素电极。

4. 发明申请

WO2003107394A3 ORGANIC ELECTROLUMINESCENT DEVICE 审中-公开
公开(公告)号：WO2003107394A3
公开(公告)日：2003-12-24
申请号：PCT/KR2002/002418
申请日：2002-12-24
申请人： SAMSUNG ELECTRONICS CO., LTD. , CHUNG, Jin-Koo , CHOI, Joon-Hoo , KIM, Sang-Gab , CHOE, Hee-Hwan , CHOI, Beom-Rak
发明人： CHUNG, Jin-Koo , CHOI, Joon-Hoo , KIM, Sang-Gab , CHOE, Hee-Hwan , CHOI, Beom-Rak
IPC分类号： H05B33/22
摘要： Disclosed is an organic electroluminescent (EL) device for enhancing the luminous efficiency. A first electrode is formed on a substrate. A CVD insulating film (128) of low dielectric constant having an opening (130) exposing the first electrode is formed on the first electrode and the substrate. An organic EL layer (132) and a second electrode (134) are sequentially stacked on the opening. A wall surrounding a region of the organic EL layer is formed of the CVD insulating film (128) of low dielectric constant, the surface treatment of the pixel electrode (126) can be performed using O2 plasma to thereby enhance luminance properties.

5. 发明申请

WO2004081976A3 THIN FILM TRANSISTOR SUBSTRATE OFA DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME 审中-公开
标题翻译：显示装置的薄膜晶体管基板及其制造方法
公开(公告)号：WO2004081976A3
公开(公告)日：2004-12-16
申请号：PCT/KR2004000439
申请日：2004-02-28
申请人： SAMSUNG ELECTRONICS CO LTD , JEONG CHANG-OH , CHO BEOM-SEOK , CHOE HEE-HWAN
发明人： JEONG CHANG-OH , CHO BEOM-SEOK , CHOE HEE-HWAN
IPC分类号： G02F1/136 , G02F1/1362 , H01L21/77 , H01L21/84 , H01L27/12 , H01L29/45 , H01L29/49 , H01L29/786 , G02F1/1343 , H01L21/283
CPC分类号： H01L29/78669 , G02F1/136286 , G02F2001/136295 , H01L27/12 , H01L27/124 , H01L29/456 , H01L29/4908
摘要： Disclosed are a thin film transistor substrate of an LCD device and a method of manufacturing the same. The thin film transistor substrate (10) includes a nickel-silicide layer (11b) formed on an insulating layer pattern including silicon (10) and a metal layer (12b) formed on the nickel-silicide layer (11b). Nickel is coated on the insulating layer pattern including silicon (10) and a metal material (12) is coated on the nickel-coated layer (11). After that, a heat treatment is performed at about 200 to about 350 °C to obtain the nickel-silicide layer (11a). Since the thin film transistor substrate of the LCD device is manufactured by applying the nickel-silicide wiring (13b), a device having low resistivity and good ohmic contact property can be obtained.
摘要翻译：公开了一种LCD装置的薄膜晶体管基板及其制造方法。薄膜晶体管基板（10）包括形成在包括硅（10）和形成在硅化镍层（11b）上的金属层（12b）的绝缘层图案上的硅化镍层（11b）。将镍涂覆在包括硅（10）的绝缘层图案上，并将金属材料（12）涂覆在镀镍层（11）上。之后，在约200〜约350℃进行热处理，得到硅化镍层（11a）。由于通过施加硅化镍布线（13b）来制造LCD器件的薄膜晶体管衬底，所以可以获得具有低电阻率和良好的欧姆接触特性的器件。

6. 发明申请

WO2004081976A2 THIN FILM TRANSISTOR SUBSTRATE 审中-公开
标题翻译：薄膜晶体管基板
公开(公告)号：WO2004081976A2
公开(公告)日：2004-09-23
申请号：PCT/KR2004/000439
申请日：2004-02-28
申请人： SAMSUNG ELECTRONICS CO. LTD. , JEONG, Chang-Oh , CHO, Beom-Seok , CHOE, Hee-Hwan
发明人： JEONG, Chang-Oh , CHO, Beom-Seok , CHOE, Hee-Hwan
IPC分类号： H01L
CPC分类号： H01L29/78669 , G02F1/136286 , G02F2001/136295 , H01L27/12 , H01L27/124 , H01L29/456 , H01L29/4908
摘要： Disclosed are a thin film transistor substrate of an LCD device and a method of manufacturing the same. The thin film transistor substrate includes a nickel-silicide layer formed on an insulating layer pattern including silicon and a metal layer formed on the nickel-silicide layer. Nickel is coated on the insulating layer pattern including silicon and a metal material is coated on the nickel-coated layer. After that, a heat treatment is performed at about 200 to about 350 °C to obtain the nickel-silicide layer. Since the thin film transistor substrate of the LCD device is manufactured by applying the nickel-silicide wiring, a device having low resistivity and good ohmic contact property can be obtained.
摘要翻译：公开了一种LCD装置的薄膜晶体管基板及其制造方法。薄膜晶体管基板包括形成在包括硅和在硅化镍层上形成的金属层的绝缘层图案上的硅化镍层。将镍涂覆在包括硅的绝缘层图案上，并将金属材料涂覆在镀镍层上。之后，在约200〜约350℃进行热处理，得到硅化镍层。由于通过施加硅化镍布线来制造LCD器件的薄膜晶体管衬底，因此可以获得具有低电阻率和良好的欧姆接触特性的器件。

7. 发明申请

WO2003107394A2 ORGANIC ELECTROLUMINESCENT DEVICE 审中-公开
标题翻译：有机电致发光器件
公开(公告)号：WO2003107394A2
公开(公告)日：2003-12-24
申请号：PCT/KR2002/002418
申请日：2002-12-24
申请人： SAMSUNG ELECTRONICS CO., LTD. , CHUNG, Jin-Koo , CHOI, Joon-Hoo , KIM, Sang-Gab , CHOE, Hee-Hwan , CHOI, Beom-Rak
发明人： CHUNG, Jin-Koo , CHOI, Joon-Hoo , KIM, Sang-Gab , CHOE, Hee-Hwan , CHOI, Beom-Rak
IPC分类号： H01L
CPC分类号： H01L27/3246 , H01L21/31633 , H01L27/3283 , H01L51/5206
摘要： Disclosed is an organic electroluminescent (EL) device for enhancing the luminous efficiency. A first electrode is formed on a substrate. A CVD insulating film of low dielectric constant having an opening exposing the first electrode is formed on the first electrode and the substrate. An organic EL layer and a second electrode are sequentially stacked on the opening. A wall surrounding a region of the organic EL layer is formed of the CVD insulating film of low dielectric constant, the surface treatment of the pixel electrode can be performed using O2 plasma to thereby enhance luminance properties.
摘要翻译：公开了一种用于提高发光效率的有机电致发光（EL）装置。在基板上形成第一电极。在第一电极和基板上形成具有露出第一电极的开口的低介电常数的CVD绝缘膜。有机EL层和第二电极依次堆叠在开口上。围绕有机EL层的区域的壁由低介电常数的CVD绝缘膜形成，可以使用O 2等离子体进行像素电极的表面处理，从而提高亮度特性。

8. 发明申请

WO2003060601A1 A WIRE FOR A DISPLAY DEVICE, A METHOD FOR MANUFACTURING THE SAME, A THIN FILM TRANSISTOR ARRAY PANEL INCLUDING THE WIRE, AND A METHOD FOR MANUFACTURING THE SAME 审中-公开
标题翻译：用于显示装置的线，其制造方法，包括线的薄膜晶体管阵列面板及其制造方法
公开(公告)号：WO2003060601A1
公开(公告)日：2003-07-24
申请号：PCT/KR2002/001434
申请日：2002-07-29
申请人： SAMSUNG ELECTRONICS CO., LTD. , YU, Seung-Hee , HONG, Mun-Pyo , RHO, Soo-Guy , ROH, Nam-Seok , SONG, Keun-Kyu , CHOE, Hee-Hwan , KIM, Bo-Sung , KIM, Sang-Gab , KANG, Sung-Chul , PARK, Hong-Sick
发明人： YU, Seung-Hee , HONG, Mun-Pyo , RHO, Soo-Guy , ROH, Nam-Seok , SONG, Keun-Kyu , CHOE, Hee-Hwan , KIM, Bo-Sung , KIM, Sang-Gab , KANG, Sung-Chul , PARK, Hong-Sick
IPC分类号： G02F1/136
CPC分类号： G02F1/136286 , G02F2001/136295
摘要： First, a Cr film and a CrOx film are deposited and patterned using an etchant including 8-12% Ce(NH 4 ) 2 (NO3) 6 , 10-20% NH 3 and remaining ultra pure water to form a gate wire including a plurality of gate lines, a plurality of gate electrodes and a plurality of gate pads. Next, a gate insulating film, a semiconductor layer and an ohmic contact layer are formed in sequence. A Cr film and CrOx film are deposited in sequence and patterned using an etchant including 8-12% Ce(NH 4 ) 2 (NO 3 ) 6 , 10-20% NH 3 and remaining ultra pure water to form a data wire including a plurality of data lines, a plurality of source electrodes, a plurality of drain electrodes and a plurality of data pads. A passivation layer is deposited and pattered to form a plurality of contact holes respectively exposing the drain electrodes, the gate pads and the data pads. A transparent conductive material or a reflective conductive material is deposited and patterned to form a plurality of pixel electrodes, a plurality of subsidiary gate pads and a plurality of subsidiary data pads electrically connected to the drain electrodes, the gate pads and the data pads, respectively. The gate lines and the data lines with low reflectance are used as a light-blocking film for blocking the light leakage between the pixel areas, and do not increase the black brightness. Accordingly, a separate black matrix need not be provided on the color filter panel, thereby securing both aperture ratio of the pixel and high contrast ratio.
摘要翻译：首先，使用包括8-12％Ce（NH 4）2（NO 3）6，10-20％NH 3和剩余的超纯水的蚀刻剂沉积和图案化Cr膜和CrOx膜，以形成包括多个栅极线，多个栅电极和多个栅极焊盘。接下来，依次形成栅极绝缘膜，半导体层和欧姆接触层。依次沉积Cr膜和CrOx膜，并使用包括8-12％Ce（NH 4）2（NO 3）6，10-20％NH 3和剩余的超纯水的蚀刻剂进行图案化以形成包括多个数据的数据线线，多个源电极，多个漏电极和多个数据焊盘。钝化层被沉积并图案化以形成分别暴露漏电极，栅极焊盘和数据焊盘的多个接触孔。沉积透明导电材料或反射导电材料以形成多个像素电极，分别与漏电极，栅极焊盘和数据焊盘电连接的多个辅助栅极焊盘和多个辅助数据焊盘。栅极线和低反射率的数据线被用作阻挡像素区域之间的漏光的遮光膜，并且不增加黑色亮度。因此，不需要在滤色器面板上设置单独的黑矩阵，从而确保像素的开口率和高对比度。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式