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1. 发明授权

US08685822B2 Semiconductor component and method of manufacture 有权
标题翻译：半导体元件及制造方法
公开(公告)号：US08685822B2
公开(公告)日：2014-04-01
申请号：US13022628
申请日：2011-02-07
申请人： Peter A. Burke , Duane B. Barber , Brian Pratt
发明人： Peter A. Burke , Duane B. Barber , Brian Pratt
IPC分类号： H01L21/336
CPC分类号： H01L29/66727 , H01L29/407 , H01L29/41766 , H01L29/42376 , H01L29/456 , H01L29/4933 , H01L29/66734 , H01L29/7809 , H01L29/7811 , H01L29/7813
摘要： A semiconductor component that includes gate electrodes and shield electrodes and a method of manufacturing the semiconductor component. A semiconductor material has a device region, a gate contact region, a termination region, and a drain contact region. One or more device trenches is formed in the device region and one or more termination trenches is formed in the edge termination region. Shielding electrodes are formed in portions of the device trenches that are adjacent their floors. A gate dielectric material is formed on the sidewalls of the trenches in the device region and gate electrodes are formed over and electrically isolated from the shielding electrodes. The gate electrodes in the trenches in the device region are connected to the gate electrodes in the trenches in the gate contact region. The shielding electrodes in the trenches in the device region are connected to the shielding electrodes in the termination region.
摘要翻译：包括栅电极和屏蔽电极的半导体部件和制造半导体部件的方法。半导体材料具有器件区域，栅极接触区域，端接区域和漏极接触区域。在器件区域中形成一个或多个器件沟槽，并且在边缘端接区域中形成一个或多个端接沟槽。屏蔽电极形成在与它们的地板相邻的器件沟槽的部分中。在器件区域中的沟槽的侧壁上形成栅极电介质材料，并且在屏蔽电极之间形成栅电极并与屏蔽电极电绝缘。器件区域中的沟槽中的栅电极连接到栅极接触区域中的沟槽中的栅电极。器件区域的沟槽中的屏蔽电极与端接区域中的屏蔽电极相连。

2. 发明授权

US07897462B2 Method of manufacturing semiconductor component with gate and shield electrodes in trenches 有权
标题翻译：在沟槽中制造具有栅极和屏蔽电极的半导体部件的方法
公开(公告)号：US07897462B2
公开(公告)日：2011-03-01
申请号：US12271083
申请日：2008-11-14
申请人： Peter A. Burke , Duane B. Barber , Brian Pratt
发明人： Peter A. Burke , Duane B. Barber , Brian Pratt
IPC分类号： H01L21/336
CPC分类号： H01L29/66727 , H01L29/407 , H01L29/41766 , H01L29/42376 , H01L29/456 , H01L29/4933 , H01L29/66734 , H01L29/7809 , H01L29/7811 , H01L29/7813
摘要： A semiconductor component that includes gate electrodes and shield electrodes and a method of manufacturing the semiconductor component. A semiconductor material has a device region, a gate contact region, a termination region, and a drain contact region. One or more device trenches is formed in the device region and one or more termination trenches is formed in the edge termination region. Shielding electrodes are formed in portions of the device trenches that are adjacent their floors. A gate dielectric material is formed on the sidewalls of the trenches in the device region and gate electrodes are formed over and electrically isolated from the shielding electrodes. The gate electrodes in the trenches in the device region are connected to the gate electrodes in the trenches in the gate contact region. The shielding electrodes in the trenches in the device region are connected to the shielding electrodes in the termination region.
摘要翻译：包括栅电极和屏蔽电极的半导体部件和制造半导体部件的方法。半导体材料具有器件区域，栅极接触区域，端接区域和漏极接触区域。在器件区域中形成一个或多个器件沟槽，并且在边缘端接区域中形成一个或多个端接沟槽。屏蔽电极形成在与它们的地板相邻的器件沟槽的部分中。在器件区域中的沟槽的侧壁上形成栅极电介质材料，并且在屏蔽电极之间形成栅电极并与屏蔽电极电绝缘。器件区域中的沟槽中的栅电极连接到栅极接触区域中的沟槽中的栅电极。器件区域的沟槽中的屏蔽电极与端接区域中的屏蔽电极相连。

3. 发明申请

US20100123192A1 SEMICONDUCTOR COMPONENT AND METHOD OF MANUFACTURE 有权
公开(公告)号：US20100123192A1
公开(公告)日：2010-05-20
申请号：US12271083
申请日：2008-11-14
申请人： Peter A. Burke , Duane B. Barber , Brian Pratt
发明人： Peter A. Burke , Duane B. Barber , Brian Pratt
IPC分类号： H01L29/78 , H01L21/28
CPC分类号： H01L29/66727 , H01L29/407 , H01L29/41766 , H01L29/42376 , H01L29/456 , H01L29/4933 , H01L29/66734 , H01L29/7809 , H01L29/7811 , H01L29/7813
摘要： A semiconductor component that includes gate electrodes and shield electrodes and a method of manufacturing the semiconductor component. A semiconductor material has a device region, a gate contact region, a termination region, and a drain contact region. One or more device trenches is formed in the device region and one or more termination trenches is formed in the edge termination region. Shielding electrodes are formed in portions of the device trenches that are adjacent their floors. A gate dielectric material is formed on the sidewalls of the trenches in the device region and gate electrodes are formed over and electrically isolated from the shielding electrodes. The gate electrodes in the trenches in the device region are connected to the gate electrodes in the trenches in the gate contact region. The shielding electrodes in the trenches in the device region are connected to the shielding electrodes in the termination region.

4. 发明申请

US20060237813A1 Junction barrier schottky with low forward drop and improved reverse block voltage 失效
标题翻译：具有低正向下降和改善的反向阻断电压的结型势垒肖特基
公开(公告)号：US20060237813A1
公开(公告)日：2006-10-26
申请号：US11111104
申请日：2005-04-20
申请人： Fuw-Iuan Hshieh , Brian Pratt
发明人： Fuw-Iuan Hshieh , Brian Pratt
IPC分类号： H01L29/47
CPC分类号： H01L29/417 , H01L29/402 , H01L29/66143 , H01L29/8611 , H01L29/872
摘要： This invention discloses a junction barrier Schottky device supported on a substrate that has a first conductivity type. The Schottky device includes a first diffusion region of a fist conductivity type for functioning as a forward barrier height reduction region. The Schottky device further includes a second diffusion region of a second conductivity type disposed immediately adjacent to the first diffusion region for functioning as a backward blocking enhancement region to reduce the backward leakage current.
摘要翻译：本发明公开了一种支撑在具有第一导电类型的基板上的接合势垒肖特基器件。肖特基装置包括第一导电类型的第一扩散区域，用作前势垒高度减小区域。所述肖特基元件还包括与第一扩散区紧邻设置的第二导电类型的第二扩散区，用作反向阻挡增强区以减小反向泄漏电流。

5. 发明申请

US20060231915A1 Process for high voltage superjunction termination 失效
公开(公告)号：US20060231915A1
公开(公告)日：2006-10-19
申请号：US11318873
申请日：2005-12-27
申请人： Fwu-Iuan Hshieh , Brian Pratt
发明人： Fwu-Iuan Hshieh , Brian Pratt
IPC分类号： H01L23/58
CPC分类号： H01L29/66712 , H01L21/26586 , H01L21/76251 , H01L29/0634 , H01L29/0653 , H01L29/0661 , H01L29/0696 , H01L29/7811 , H01L2924/0002 , H01L2924/00
摘要： A method of manufacturing a semiconductor device having an active region and a termination region includes providing a semiconductor substrate having first and second main surfaces opposite to each other. The semiconductor substrate has an active region and a termination region surrounding the active region. The first main surface is oxidized. A first plurality of trenches and a first plurality of mesas are formed in the termination region. The first plurality of trenches in the termination region are filled with a dielectric material. A second plurality of trenches in the termination region. The second plurality of trenches are with the dielectric material.

6. 发明申请

US20110127603A1 SEMICONDUCTOR COMPONENT AND METHOD OF MANUFACTURE 有权
标题翻译：半导体元件及其制造方法
公开(公告)号：US20110127603A1
公开(公告)日：2011-06-02
申请号：US13022628
申请日：2011-02-07
申请人： Peter A. Burke , Duane B. Barber , Brian Pratt
发明人： Peter A. Burke , Duane B. Barber , Brian Pratt
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L29/66727 , H01L29/407 , H01L29/41766 , H01L29/42376 , H01L29/456 , H01L29/4933 , H01L29/66734 , H01L29/7809 , H01L29/7811 , H01L29/7813
摘要： A semiconductor component that includes gate electrodes and shield electrodes and a method of manufacturing the semiconductor component. A semiconductor material has a device region, a gate contact region, a termination region, and a drain contact region. One or more device trenches is formed in the device region and one or more termination trenches is formed in the edge termination region. Shielding electrodes are formed in portions of the device trenches that are adjacent their floors. A gate dielectric material is formed on the sidewalls of the trenches in the device region and gate electrodes are formed over and electrically isolated from the shielding electrodes. The gate electrodes in the trenches in the device region are connected to the gate electrodes in the trenches in the gate contact region. The shielding electrodes in the trenches in the device region are connected to the shielding electrodes in the termination region.
摘要翻译：包括栅电极和屏蔽电极的半导体部件和制造半导体部件的方法。半导体材料具有器件区域，栅极接触区域，端接区域和漏极接触区域。在器件区域中形成一个或多个器件沟槽，并且在边缘端接区域中形成一个或多个端接沟槽。屏蔽电极形成在与它们的地板相邻的器件沟槽的部分中。在器件区域中的沟槽的侧壁上形成栅极电介质材料，并且在屏蔽电极之间形成栅电极并与屏蔽电极电绝缘。器件区域中的沟槽中的栅电极连接到栅极接触区域中的沟槽中的栅电极。器件区域的沟槽中的屏蔽电极与端接区域中的屏蔽电极相连。

7. 发明授权

US07779460B2 Partial grant set evaluation from partial evidence in an evidence-based security policy manager 有权
标题翻译：在基于证据的安全政策经理中部分授权评估部分证据
公开(公告)号：US07779460B2
公开(公告)日：2010-08-17
申请号：US11736295
申请日：2007-04-17
申请人： Gregory D. Fee , Brian Pratt , Sebastian Lange , Loren Kohnfelder
发明人： Gregory D. Fee , Brian Pratt , Sebastian Lange , Loren Kohnfelder
IPC分类号： G06F9/00 , G06F17/30
CPC分类号： G06F21/6218 , G06F21/6209 , G06F2221/2141
摘要： An evidence-based policy manager generates a permission grant set for a code assembly received from a resource location. The policy manager executes in a computer system (e.g., a Web client or server) in combination with the verification module and class loader of the run-time environment. The permission grant set generated for a code assembly is applied in the run-time call stack to help the system determine whether a given system operation by the code assembly is authorized. The policy manager may determine a subset of the permission grant set based on a subset of the received code assembly's evidence, in order to expedite processing of the code assembly. When the evidence subset does not yield the desired permission subset, the policy manager may then perform an evaluation of all evidence received.
摘要翻译：基于证据的策略管理器为从资源位置接收到的代码集合生成许可授权集。策略管理器与计算机系统（例如，Web客户端或服务器）结合运行时环境的验证模块和类加载器一起执行。为代码组合生成的许可授权集合被应用于运行时调用堆栈中，以帮助系统确定代码组件的给定系统操作是否被授权。策略管理器可以基于所接收的代码组件的证据的子集来确定许可授权集合的子集，以便加速代码组合的处理。当证据子集不产生期望的许可子集时，策略管理器然后可以对所接收的所有证据进行评估。

8. 发明授权

US07207064B2 Partial grant set evaluation from partial evidence in an evidence-based security policy manager 有权
标题翻译：在基于证据的安全政策经理中部分授权评估部分证据
公开(公告)号：US07207064B2
公开(公告)日：2007-04-17
申请号：US10162260
申请日：2002-06-05
申请人： Gregory D. Fee , Brian Pratt , Sebastian Lange , Loren Kohnfelder
发明人： Gregory D. Fee , Brian Pratt , Sebastian Lange , Loren Kohnfelder
IPC分类号： G06F19/00 , G06F7/04
CPC分类号： G06F21/6218 , G06F21/6209 , G06F2221/2141
摘要： An evidence-based policy manager generates a permission grant set for a code assembly received from a resource location. The policy manager executes in a computer system (e.g., a Web client or server) in combination with the verification module and class loader of the run-time environment. The permission grant set generated for a code assembly is applied in the run-time call stack to help the system determine whether a given system operation by the code assembly is authorized. The policy manager may determine a subset of the permission grant set based on a subset of the received code assembly's evidence, in order to expedite processing of the code assembly. When the evidence subset does not yield the desired permission subset, the policy manager may then perform an evaluation of all evidence received.
摘要翻译：基于证据的策略管理器为从资源位置接收到的代码集合生成许可授权集。策略管理器与计算机系统（例如，Web客户端或服务器）结合运行时环境的验证模块和类加载器一起执行。为代码组合生成的许可授权集合被应用于运行时调用堆栈中，以帮助系统确定代码组件的给定系统操作是否被授权。策略管理器可以基于所接收的代码组件的证据的子集来确定许可授权集合的子集，以便加速代码组合的处理。当证据子集不产生期望的许可子集时，策略管理器然后可以对所接收的所有证据进行评估。

9. 发明申请

US20060273390A1 Gate contact and runners for high density trench MOSFET 审中-公开
标题翻译：栅极接触和高密度沟槽MOSFET的流道
公开(公告)号：US20060273390A1
公开(公告)日：2006-12-07
申请号：US11182248
申请日：2005-07-14
申请人： Fwu-Iuan Hshieh , Brian Pratt
发明人： Fwu-Iuan Hshieh , Brian Pratt
IPC分类号： H01L29/76
CPC分类号： H01L29/7813 , H01L24/26 , H01L24/40 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/83 , H01L24/85 , H01L29/41766 , H01L29/456 , H01L29/66727 , H01L29/66734 , H01L2224/05552 , H01L2224/05553 , H01L2224/05624 , H01L2224/05655 , H01L2224/0603 , H01L2224/40245 , H01L2224/45015 , H01L2224/45124 , H01L2224/45144 , H01L2224/48247 , H01L2224/48472 , H01L2224/48624 , H01L2224/48655 , H01L2224/48724 , H01L2224/48755 , H01L2224/4903 , H01L2224/49051 , H01L2224/49111 , H01L2224/83801 , H01L2224/85 , H01L2924/01005 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01018 , H01L2924/01022 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01042 , H01L2924/0105 , H01L2924/01074 , H01L2924/01079 , H01L2924/01082 , H01L2924/04941 , H01L2924/1306 , H01L2924/13091 , H01L2924/20755 , H01L2924/2076 , H01L2924/30105 , H01L2924/00014 , H01L2924/00
摘要： A trenched metal oxide semiconductor field effect transistor (MOSFET) cell that includes a trenched gate surrounded by a source region encompassed in a body region above a drain region disposed on a bottom surface of a substrate. The MOSFET cell further includes a buried trench-poly gate runner electrically contacting to a trench gate of the trenched MOSFET. The buried trench-poly gate runner for functioning as a gate runner to increase gate transmission area and a contact area to a gate contact metal for reducing a gate resistance.
摘要翻译：沟槽金属氧化物半导体场效应晶体管（MOSFET）单元，其包括被包围在设置在基板的底表面上的漏极区域上方的体区域中的源极区域包围的沟槽栅极。 MOSFET单元进一步包括与沟槽MOSFET的沟槽栅极电接触的埋入沟槽 - 多晶硅浇口。用作栅极流道以增加栅极传输面积的掩埋沟槽 - 多栅极流道和用于降低栅极电阻的栅极接触金属的接触面积。

10. 发明申请

US20100123193A1 SEMICONDUCTOR COMPONENT AND METHOD OF MANUFACTURE 审中-公开
标题翻译：半导体元件及其制造方法
公开(公告)号：US20100123193A1
公开(公告)日：2010-05-20
申请号：US12271092
申请日：2008-11-14
申请人： Peter A. Burke , Duane B. Barber , Brian Pratt
发明人： Peter A. Burke , Duane B. Barber , Brian Pratt
IPC分类号： H01L27/088 , H01L21/28
CPC分类号： H01L27/088 , H01L21/823487
摘要： A semiconductor component that includes gate electrodes and shield electrodes and a method of manufacturing the semiconductor component. A semiconductor material has a device region, a gate contact region, a termination region, and a drain contact region. One or more device trenches is formed in the device region and one or more termination trenches is formed in the edge termination region. Shielding electrodes are formed in portions of the device trenches that are adjacent their floors. A gate dielectric material is formed on the sidewalls of the trenches in the device region and gate electrodes are formed over and electrically isolated from the shielding electrodes. The gate electrodes in the trenches in the device region are connected to the gate electrodes in the trenches in the gate contact region. The shielding electrodes in the trenches in the device region are connected to the shielding electrodes in the termination region.
摘要翻译：包括栅电极和屏蔽电极的半导体部件和制造半导体部件的方法。半导体材料具有器件区域，栅极接触区域，端接区域和漏极接触区域。在器件区域中形成一个或多个器件沟槽，并且在边缘端接区域中形成一个或多个端接沟槽。屏蔽电极形成在与它们的地板相邻的器件沟槽的部分中。在器件区域的沟槽的侧壁上形成栅极电介质材料，并且在屏蔽电极之间形成栅电极并与屏蔽电极电绝缘。器件区域中的沟槽中的栅电极连接到栅极接触区域中的沟槽中的栅电极。器件区域的沟槽中的屏蔽电极与端接区域中的屏蔽电极相连。

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