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1. 发明申请

US20120018693A1 CONFINED RESISTANCE VARIABLE MEMORY CELL STRUCTURES AND METHODS 有权
标题翻译：限制电阻可变存储器单元结构和方法
公开(公告)号：US20120018693A1
公开(公告)日：2012-01-26
申请号：US12843695
申请日：2010-07-26
申请人： Brenda D. Kraus , Eugene P. Marsh , Timothy A. Quick
发明人： Brenda D. Kraus , Eugene P. Marsh , Timothy A. Quick
IPC分类号： H01L45/00 , H01L21/06
CPC分类号： H01L45/1616 , H01L45/06 , H01L45/1233 , H01L45/144 , H01L45/148
摘要： Confined resistance variable memory cell structures and methods are described herein. One or more methods of forming a confined resistance variable memory cell structure includes forming a via in a memory cell structure and forming a resistance variable material in the via by performing a process that includes providing a germanium amidinate precursor and a first reactant to a process chamber having the memory cell structure therein and providing an antimony ethoxide precursor and a second reactant to the process chamber subsequent to removing excess germanium.
摘要翻译：本文描述了限制性电阻变量存储单元结构和方法。形成限制电阻可变存储单元结构的一种或多种方法包括在存储单元结构中形成通孔，并在通孔中形成电阻可变材料，该方法包括：向处理室提供锗酰脒前体和第一反应物在其中具有记忆单元结构并且在除去过量的锗之后向处理室提供锑乙醇前体和第二反应物。

2. 发明授权

US08058729B2 Titanium nitride films 有权
标题翻译：氮化钛膜
公开(公告)号：US08058729B2
公开(公告)日：2011-11-15
申请号：US11742309
申请日：2007-04-30
申请人： Brenda D Kraus , Eugene P. Marsh
发明人： Brenda D Kraus , Eugene P. Marsh
IPC分类号： H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L21/28562 , C23C16/34 , C23C16/45534 , H01L21/02186 , H01L21/0228 , H01L21/28061 , H01L21/3141 , H01L21/76843 , H01L21/76846 , H01L28/75 , H01L29/4941 , Y10S257/915
摘要： The use of atomic layer deposition (ALD) to form a conductive titanium nitride layer produces a reliable structure for use in a variety of electronic devices. The structure is formed by depositing titanium nitride by atomic layer deposition onto a substrate surface using a titanium-containing precursor chemical such as TDEAT, followed by a mixture of ammonia and carbon monoxide or carbon monoxide alone, and repeating to form a sequentially deposited TiN structure. Such a TiN layer may be used as a diffusion barrier underneath another conductor such as aluminum or copper, or as an electro-migration preventing layer on top of an aluminum conductor. ALD deposited TiN layers have low resistivity, smooth topology, high deposition rates, and excellent step coverage and electrical continuity.
摘要翻译：使用原子层沉积（ALD）形成导电氮化钛层产生用于各种电子器件的可靠结构。该结构通过使用含钛前体化学品如TDEAT将原子层沉积氮化钛沉积到衬底表面上，然后将氨和一氧化碳或一氧化碳的混合物单独沉积并重复形成依次沉积的TiN结构。这样的TiN层可以用作另一种导体如铝或铜之下的扩散阻挡层，或者作为铝导体顶部的防电迁移层。 ALD沉积的TiN层具有低电阻率，平滑的拓扑结构，高沉积速率和优异的阶梯覆盖和电连续性。

3. 发明申请

US20090302371A1 CONDUCTIVE NANOPARTICLES 审中-公开
标题翻译：导电纳米粒子
公开(公告)号：US20090302371A1
公开(公告)日：2009-12-10
申请号：US12542423
申请日：2009-08-17
申请人： Brenda D. Kraus , Eugene P. Marsh
发明人： Brenda D. Kraus , Eugene P. Marsh
IPC分类号： H01L29/792 , H01L21/336
CPC分类号： H01L29/42332 , B82Y10/00 , B82Y30/00 , H01L21/28556 , H01L29/40114 , H01L29/7881 , Y10S438/964 , Y10S977/943
摘要： Isolated conductive nanoparticles on a dielectric layer and methods of fabricating such isolated conductive nanoparticles provide charge storage units in electronic structures for use in a wide range of electronic devices and systems. The isolated conductive nanoparticles may be used as a floating gate in a flash memory. In an embodiment, conductive nanoparticles are deposited on a dielectric layer by a plasma-assisted deposition process such that each conductive nanoparticle is isolated from the other conductive nanoparticles to configure the conductive nanoparticles as charge storage elements.
摘要翻译：电介质层上的隔离导电纳米颗粒和制造这种隔离导电纳米颗粒的方法提供电子结构中的电荷存储单元，用于广泛的电子设备和系统。隔离的导电纳米颗粒可以用作闪存中的浮动栅极。在一个实施例中，通过等离子体辅助沉积工艺将导电纳米颗粒沉积在电介质层上，使得每个导电纳米颗粒与其它导电纳米颗粒分离，以将导电纳米颗粒配置为电荷存储元件。

4. 发明申请

US20090173991A1 METHODS FOR FORMING RHODIUM-BASED CHARGE TRAPS AND APPARATUS INCLUDING RHODIUM-BASED CHARGE TRAPS 有权
标题翻译：用于形成基于阳极的充电轨迹的方法和包括基于阳极的充电轨迹的装置
公开(公告)号：US20090173991A1
公开(公告)日：2009-07-09
申请号：US12408920
申请日：2009-03-23
申请人： Eugene P. Marsh , Brenda D. Kraus
发明人： Eugene P. Marsh , Brenda D. Kraus
IPC分类号： H01L29/792 , H01L21/762
CPC分类号： H01L29/42332 , B22F9/12 , B22F2998/00 , B22F2999/00 , B82Y10/00 , B82Y30/00 , H01L21/28273 , H01L29/7881 , B22F1/0018 , B22F2202/13
摘要： Isolated conductive nanoparticles on a dielectric layer and methods of fabricating such isolated conductive nanoparticles provide charge traps in electronic structures for use in a wide range of electronic devices and systems. In an embodiment, conductive nanoparticles are deposited on a dielectric layer by a plasma-assisted deposition process such that each conductive nanoparticle is isolated from the other conductive nanoparticles to configure the conductive nanoparticles as charge traps.
摘要翻译：电介质层上的隔离导电纳米颗粒和制造这种隔离导电纳米颗粒的方法在电子结构中提供电荷陷阱，用于广泛的电子设备和系统。在一个实施例中，通过等离子体辅助沉积工艺将导电纳米颗粒沉积在电介质层上，使得每个导电纳米颗粒与其它导电纳米颗粒分离，以将导电纳米颗粒配置为电荷陷阱。

5. 发明授权

US07473637B2 ALD formed titanium nitride films 有权
标题翻译： ALD形成氮化钛膜
公开(公告)号：US07473637B2
公开(公告)日：2009-01-06
申请号：US11185423
申请日：2005-07-20
申请人： Brenda D Kraus , Eugene P. Marsh
发明人： Brenda D Kraus , Eugene P. Marsh
IPC分类号： H01L21/4763
CPC分类号： H01L21/28562 , C23C16/34 , C23C16/45534 , H01L21/02186 , H01L21/0228 , H01L21/28061 , H01L21/3141 , H01L21/76843 , H01L21/76846 , H01L28/75 , H01L29/4941 , Y10S257/915
摘要： The use of atomic layer deposition (ALD) to form a conductive titanium nitride layer produces a reliable structure for use in a variety of electronic devices. The structure is formed by depositing titanium nitride by atomic layer deposition onto a substrate surface using a titanium-containing precursor chemical such as TDEAT, followed by a mixture of ammonia and carbon monoxide or carbon monoxide alone, and repeating to form a sequentially deposited TiN structure. Such a TiN layer may be used as a diffusion barrier underneath another conductor such as aluminum or copper, or as an electro-migration preventing layer on top of an aluminum conductor. ALD deposited TiN layers have low resistivity, smooth topology, high deposition rates, and excellent step coverage and electrical continuity.
摘要翻译：使用原子层沉积（ALD）形成导电氮化钛层产生用于各种电子器件的可靠结构。该结构通过使用含钛前体化学品如TDEAT将原子层沉积氮化钛沉积到衬底表面上，然后将氨和一氧化碳或一氧化碳的混合物单独沉积并重复形成依次沉积的TiN结构。这样的TiN层可以用作另一种导体如铝或铜之下的扩散阻挡层，或者作为铝导体顶部的防电迁移层。 ALD沉积的TiN层具有低电阻率，平滑的拓扑结构，高沉积速率和优异的阶梯覆盖和电连续性。

6. 发明授权

US06376305B1 Method of forming DRAM circuitry, DRAM circuitry, method of forming a field emission device, and field emission device 失效
标题翻译：形成DRAM电路的方法
公开(公告)号：US06376305B1
公开(公告)日：2002-04-23
申请号：US09641879
申请日：2000-08-17
申请人： Brenda D. Kraus , Richard H. Lane
发明人： Brenda D. Kraus , Richard H. Lane
IPC分类号： H01L218242
CPC分类号： C23C16/303 , H01J9/025 , H01L21/318
摘要： The invention is a method of depositing an aluminum nitride comprising layer over a semiconductor substrate, a method of forming DRAM circuitry, DRAM circuitry, a method of forming a field emission device, and a field emission device. In one aspect, a method of depositing an aluminum nitride comprising layer over a semiconductor substrate includes positioning a semiconductor substrate within a chemical vapor deposition reactor. Ammonia and at least one of triethylaluminum and trimethylaluminum are fed to the reactor while the substrate is at a temperature of about 500° C. or less and at a reactor pressure from about 100 mTorr to about 725 Torr effective to deposit a layer comprising aluminum nitride over the substrate at such temperature and reactor pressure. In one aspect, such layer is utilized as a cell dielectric layer in DRAM circuitry. In one aspect, such layer is deposited over emitters of a field emission display. The invention contemplates DRAM and field emission devices utilizing such layer and alternate layers.
摘要翻译：本发明是一种在半导体衬底上沉积氮化铝包覆层的方法，形成DRAM电路的方法，DRAM电路，形成场发射器件的方法和场致发射器件。在一个方面，一种在半导体衬底上沉积包含氮化铝的层的方法包括将半导体衬底定位在化学气相沉积反应器内。将氨和三乙基铝和三甲基铝中的至少一种进料到反应器中，同时基材处于约500℃或更低的温度下，并且在约100mTorr至约725乇的反应器压力下有效沉积包含氮化铝在这样的温度和反应器压力下在基材上。在一个方面，这种层用作DRAM电路中的单元电介质层。在一个方面，这种层沉积在场发射显示器的发射器上。本发明考虑了利用这种层和交替层的DRAM和场致发射器件。

7. 发明申请

US20120056326A1 TITANIUM NITRIDE FILMS 有权
标题翻译：硝酸铁膜
公开(公告)号：US20120056326A1
公开(公告)日：2012-03-08
申请号：US13296018
申请日：2011-11-14
申请人： Brenda D. Kraus , Eugene P. Marsh
发明人： Brenda D. Kraus , Eugene P. Marsh
IPC分类号： H01L23/48 , H01L21/28
CPC分类号： H01L21/28562 , C23C16/34 , C23C16/45534 , H01L21/02186 , H01L21/0228 , H01L21/28061 , H01L21/3141 , H01L21/76843 , H01L21/76846 , H01L28/75 , H01L29/4941 , Y10S257/915
摘要： The use of a monolayer or partial monolayer sequencing process to form conductive titanium nitride produces a reliable structure for use in a variety of electronic devices. In an embodiment, a structure can be formed by using ammonia and carbon monoxide reactant materials with respect to a titanium-containing precursor exposed to a substrate. Such a TiN layer has a number of uses including, but not limited to, use as a diffusion barrier underneath another conductor or use as an electro-migration preventing layer on top of a conductor. Such deposited TiN material may have characteristics associated with a low resistivity, a smooth topology, high deposition rates, excellent step coverage, and electrical continuity.
摘要翻译：使用单层或部分单层测序方法来形成导电氮化钛产生用于各种电子器件的可靠结构。在一个实施方案中，可以通过使用氨和一氧化碳反应物材料相对于暴露于基底的含钛前体形成结构。这样的TiN层具有多种用途，包括但不限于在另一导体下方作为扩散阻挡层使用，或者用作导电体顶部的防电镀层。这种沉积的TiN材料可以具有与低电阻率，平滑拓扑结构，高沉积速率，优异的台阶覆盖和电连续性相关联的特性。

8. 发明申请

US20110278661A1 APPARATUS INCLUDING RHODIUM-BASED CHARGE TRAPS 有权
标题翻译：装置包括基于RHODIUM的充电手段
公开(公告)号：US20110278661A1
公开(公告)日：2011-11-17
申请号：US13194188
申请日：2011-07-29
申请人： Eugene P. Marsh , Brenda D. Kraus
发明人： Eugene P. Marsh , Brenda D. Kraus
IPC分类号： H01L27/105 , B82Y10/00 , H01L29/792
CPC分类号： H01L29/42332 , B22F9/12 , B22F2998/00 , B22F2999/00 , B82Y10/00 , B82Y30/00 , H01L21/28273 , H01L29/7881 , B22F1/0018 , B22F2202/13
摘要： Isolated conductive nanoparticles on a dielectric layer and methods of fabricating such isolated conductive nanoparticles provide charge traps in electronic structures for use in a wide range of electronic devices and systems. In an embodiment, conductive nanoparticles are deposited on a dielectric layer by a plasma-assisted deposition process such that each conductive nanoparticle is isolated from the other conductive nanoparticles to configure the conductive nanoparticles as charge traps.
摘要翻译：电介质层上的隔离导电纳米颗粒和制造这种隔离导电纳米颗粒的方法在电子结构中提供电荷陷阱，用于广泛的电子设备和系统。在一个实施例中，通过等离子体辅助沉积工艺将导电纳米颗粒沉积在电介质层上，使得每个导电纳米颗粒与其它导电纳米颗粒分离，以将导电纳米颗粒配置为电荷陷阱。

9. 发明授权

US06462367B2 RuSixOy-containing adhesion layers 有权
标题翻译：含RuSixOy的粘附层
公开(公告)号：US06462367B2
公开(公告)日：2002-10-08
申请号：US09888891
申请日：2001-06-25
申请人： Eugene P. Marsh , Brenda D. Kraus
发明人： Eugene P. Marsh , Brenda D. Kraus
IPC分类号： H01L2976
CPC分类号： H01L28/75 , H01L21/76843 , H01L28/55
摘要： A method for use in the fabrication of integrated circuits includes providing a substrate assembly having a surface. An adhesion layer is formed over at least a portion of the surface. The adhesion layer is formed of RuSixOy, where x and y are in the range of about 0.01 to about 10. The adhesion layer may be formed by depositing RuSixOy by chemical vapor deposition, atomic layer deposition, or physical vapor deposition or the adhesion layer may be formed by forming a layer of ruthenium or ruthenium oxide over a silicon-containing region and performing an anneal to form RuSixOy from the layer of ruthenium and silicon from the adjacent silicon-containing region. Capacitor electrodes, interconnects or other structures may be formed with such an adhesion layer. Semiconductor structures and devices can be formed to include adhesion layers formed of RuSixOy.
摘要翻译：用于制造集成电路的方法包括提供具有表面的基板组件。在表面的至少一部分上形成粘合层。粘合层由RuSixOy形成，其中x和y在约0.01至约10的范围内。粘合层可以通过通过化学气相沉积，原子层沉积或物理气相沉积沉积RuSixOy而形成，或者粘合层可以通过在含硅区域上形成钌或氧化钌层并进行退火以从相邻的含硅区域的钌和硅层形成RuSixOy。电容器电极，互连或其他结构可以用这种粘合层形成。半导体结构和器件可以形成为包括由RuSixOy形成的粘附层。

10. 发明授权

US6057231A Method for improved metal fill by treatment of mobility layers 有权
标题翻译：通过处理迁移率层改善金属填充的方法
公开(公告)号：US6057231A
公开(公告)日：2000-05-02
申请号：US248499
申请日：1999-02-10
申请人： John H. Givens , Russell C. Zahorik , Brenda D. Kraus
发明人： John H. Givens , Russell C. Zahorik , Brenda D. Kraus
IPC分类号： H01L23/485 , H01L23/532 , H01L21/44
CPC分类号： H01L23/485 , H01L23/53223 , H01L2924/0002
摘要： A recess having a height-to-width aspect ratio from about 6:1 to about 10:1 in a semiconductor structure is taught with a method of forming the same. In a first embodiment, a refractory metal layer is formed in the recess, which can be a trench, a contact hole, or a combination thereof. A refractory metal nitride layer is then formed on the refractory metal layer. A heat treatment, preferably RTP, is used to form a metal silicide contact at the bottom of the contact hole upon semiconductor material. In a first alternative method, an ammonia high-temperature treatment is conducted to remove undesirable impurities within the refractory metal nitride layer lining the contact hole and to replace the impurities with more nitrogen. In a second alternative method, a second refractory metal nitride layer is formed by PVD upon the first refractory metal nitride layer. In either alternative, a metallization layer is deposited with the recess. High pressure and temperature are used to substantially fill the recess with the metallization layer. In a preferred embodiment, deposition of the first refractory metal nitride layer is accomplished using trimethylethylenediamine tris (dimethylamino) titanium (TMEDT). The aspect ratio of a recess that can be substantially filled can exceed 8:1 when using a TMEDT-deposited refractory metal nitride layer and a subsequent deposition of a second refractory metal nitride layer by PVD. Following the substantially filling of the recess, residual surface metallization may be at least partially removed by such techniques as etch back or CMP.
摘要翻译：通过形成半导体结构的方法，教导了半导体结构中的高度 - 宽度纵横比为约6:1至约10:1的凹槽。在第一实施例中，难熔金属层形成在凹槽中，其可以是沟槽，接触孔或其组合。然后在难熔金属层上形成难熔金属氮化物层。在半导体材料上的接触孔的底部使用热处理（优选RTP）来形成金属硅化物接触。在第一替代方法中，进行氨高温处理以除去在接触孔内衬的难熔金属氮化物层内的不期望的杂质，并用更多的氮替代杂质。在第二替代方法中，通过PVD在第一难熔金属氮化物层上形成第二难熔金属氮化物层。在任一替代方案中，金属化层与凹槽沉积。高压和高温用于基本上用金属化层填充凹槽。在优选的实施方案中，使用三甲基乙二胺三（二甲基氨基）钛（TMEDT）完成第一难熔金属氮化物层的沉积。当使用TMEDT沉积的难熔金属氮化物层和随后通过PVD沉积第二难熔金属氮化物层时，可以基本上填充的凹槽的纵横比可以超过8:1。在基本上填充凹部之后，残余表面金属化可以通过诸如回蚀刻或CMP之类的技术至少部分去除。

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