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    • 3. 发明授权
    • Transactional memory preemption mechanism
    • 事务记忆抢占机制
    • US08544022B2
    • 2013-09-24
    • US13465115
    • 2012-05-07
    • Richard L. ArndtHarold W. Cain, IIIBradly G. FreyCathy May
    • Richard L. ArndtHarold W. Cain, IIIBradly G. FreyCathy May
    • G06F9/46G06F15/00G06F11/00G06F13/24
    • G06F9/466G06F9/3004G06F9/30087G06F9/3834G06F9/3859G06F9/3863
    • Mechanisms for executing a transaction in the data processing system are provided. A transaction checkpoint data structure is generated in internal registers of a processor. The transaction checkpoint data structure stores transaction checkpoint data representing a state of program registers at a time prior to execution of a corresponding transaction. The transaction, which comprises a first portion of code that is to be executed by the processor, is executed. An interrupt of the transaction is received while executing the transaction and, as a result, the transaction checkpoint data is stored to a data structure in a memory of the data processing system. A second portion of code is then executed. A state of the program registers is restored using the data structure in the memory of the data processing system in response to an event occurring causing a switch of execution of the processor back to execution of the transaction.
    • 提供了在数据处理系统中执行事务的机制。 在处理器的内部寄存器中生成事务检查点数据结构。 事务检查点数据结构存储表示执行相应事务之前的时间的程序寄存器的状态的事务检查点数据。 执行包括由处理器执行的代码的第一部分的事务。 在执行事务时接收事务的中断,结果,事务检查点数据被存储到数据处理系统的存储器中的数据结构。 然后执行第二部分代码。 响应于发生的事件导致处理器的执行切换返回到事务的执行,使用数据处理系统的存储器中的数据结构恢复程序寄存器的状态。
    • 4. 发明授权
    • Specifying an access hint for prefetching limited use data in a cache hierarchy
    • 指定在缓存层次结构中预取有限使用数据的访问提示
    • US08176254B2
    • 2012-05-08
    • US12424681
    • 2009-04-16
    • Bradly G. FreyGuy L. GuthrieCathy MayBalaram SinharoyPeter K. Szwed
    • Bradly G. FreyGuy L. GuthrieCathy MayBalaram SinharoyPeter K. Szwed
    • G06F13/00
    • G06F12/0862G06F12/0897G06F2212/6028
    • A system and method for specifying an access hint for prefetching limited use data. A processing unit receives a data cache block touch (DCBT) instruction having an access hint indicating to the processing unit that a program executing on the data processing system may soon access a cache block addressed within the DCBT instruction. The access hint is contained in a code point stored in a subfield of the DCBT instruction. In response to detecting that the code point is set to a specific value, the data addressed in the DCBT instruction is prefetched into an entry in the lower level cache. The entry may then be updated as a least recently used entry of a plurality of entries in the lower level cache. In response to a new cache block being fetched to the cache, the prefetched cache block is cast out of the cache.
    • 一种用于指定预取有限使用数据的访问提示的系统和方法。 处理单元接收具有指示给处理单元的访问提示的数据高速缓存块触摸(DCBT)指令,即在数据处理系统上执行的程序可以很快访问在DCBT指令内寻址的高速缓存块。 访问提示包含在存储在DCBT指令的子字段中的代码点中。 响应于检测到代码点被设置为特定值,DCBT指令中寻址的数据被预取到低级缓存中的条目中。 然后可以将条目作为较低级别高速缓存中的多个条目的最近最少使用的条目来更新。 响应于将新的高速缓存块提取到高速缓存,预取的高速缓存块被抛出高速缓存。