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    • 3. 发明申请
    • Semiconductor structure for draining an overvoltage pulse, and method for manufacturing same
    • 用于排出过电压脉冲的半导体结构及其制造方法
    • US20070085143A1
    • 2007-04-19
    • US11540489
    • 2006-09-29
    • Bernd EisenerHubert Werthmann
    • Bernd EisenerHubert Werthmann
    • H01L23/62
    • H01L29/861H01L27/0255H01L29/0692
    • A semiconductor structure for draining an overvoltage pulse comprises a first semiconductor region having a first doping type and a semiconductor layer arranged adjacent the first semiconductor region. The semiconductor layer includes an isolation structure configured to electrically isolate a second semiconductor region from a surrounding region. The second semiconductor region has a second doping type. A third semiconductor region having the first doping type is arranged adjacent the second semiconductor region and is disposed within an area limited by the isolation structure. A first contacting structure is configured to provide an electrical contact with the first semiconductor region, and a second contacting structure is configured to provide an electrical contact with the third semiconductor region. The first and second semiconductor regions are more highly doped than the second semiconductor region.
    • 用于排出过电压脉冲的半导体结构包括具有第一掺杂类型的第一半导体区域和邻近第一半导体区域布置的半导体层。 半导体层包括被配置为将第二半导体区域与周围区域电隔离的隔离结构。 第二半导体区域具有第二掺杂型。 具有第一掺杂类型的第三半导体区域被布置成与第二半导体区域相邻并且被布置在由隔离结构限制的区域内。 第一接触结构被配置为提供与第一半导体区域的电接触,并且第二接触结构被配置为提供与第三半导体区域的电接触。 第一和第二半导体区域比第二半导体区域更高掺杂。