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    • 1. 发明申请
    • OPERATING SYSTEM BOOTING METHOD, COMPUTER, AND COMPUTER PROGRAM PRODUCT
    • 操作系统打印方法,计算机和计算机程序产品
    • US20110066836A1
    • 2011-03-17
    • US12876452
    • 2010-09-07
    • Akira IguchiKenichi NagaiKonosuke WatanabeKen KawakamiJiro Amemiya
    • Akira IguchiKenichi NagaiKonosuke WatanabeKen KawakamiJiro Amemiya
    • G06F15/177
    • G06F9/4406
    • According to one embodiment, a CPU boots a small OS having a function of executing a target application, boots the target application on the booted small OS, and boots a CPU dispatcher for switching an execution OS. The CPU boots a rich OS capable of executing applications larger in number than applications executed by the small OS by using the CPU dispatcher, in a background of the small OS, while causing the target application booted on the small OS to run. After the rich OS is booted, the CPU boots the target application on the booted OS separately from the target application running on the small OS. The CPU passes an execution state of the target application running on the small OS to the target application booted on the rich OS and shifting the execution OS from the small OS to the rich OS.
    • 根据一个实施例,CPU启动具有执行目标应用程序的功能的小型OS,在引导的小型OS上引导目标应用程序,并引导用于切换执行OS的CPU调度器。 CPU引导一个丰富的操作系统,能够在小型操作系统的后台执行使用CPU调度程序,同时使小型操作系统上启动的目标应用程序运行,从而执行数量大于小型操作系统执行的应用程序的应用程序。 丰富操作系统启动后,CPU将从引导的操作系统上的目标应用程序与小型操作系统上运行的目标应用程序分开启动。 CPU将在小型操作系统上运行的目标应用程序的执行状态传递到在富OS上启动的目标应用程序,并将执行OS从小操作系统转移到富OS。
    • 4. 发明申请
    • SEMICONDUCTOR INTEGRATED CIRCUIT AND ADDRESS TRANSLATION METHOD
    • 半导体集成电路和地址转换方法
    • US20100185831A1
    • 2010-07-22
    • US12689625
    • 2010-01-19
    • Akira Iguchi
    • Akira Iguchi
    • G06F12/10G06F12/00
    • G06F12/1027G06F2212/681
    • A semiconductor integrated circuit incorporating an address translation section has a micro TLB, a main TLB and a CPU. The CPU reads out, at the time of process switching, a TLB entry having a private mapping of a pre-switching process from the micro TLB, stores the read TLB entry in a corresponding TLB entry storage area in a TLB context storage section having a plurality of TLB context storage areas in each of which a TLB entry having a private mapping of each of a plurality of processes is stored as a context of a TLB, reads out a TLB entry having a private mapping of a post-switching process from the TLB context storage section, and writes the read TLB entry into the main TLB.
    • 并入地址转换部分的半导体集成电路具有微型TLB,主TLB和CPU。 CPU在处理切换时读出具有来自微型TLB的预切换处理的私有映射的TLB条目,将读取的TLB条目存储在TLB上下文存储部分中的相应TLB条目存储区域中,该TLB条目存储部分具有 多个TLB上下文存储区域,其中具有多个进程中的每一个的私有映射的TLB条目被存储为TLB的上下文,读出具有切换后处理的私有映射的TLB条目, TLB上下文存储部分,并将读TLB条目写入主TLB。
    • 9. 发明申请
    • Hardware Monitor Managing Apparatus and Method of Executing Hardware Monitor Function
    • 硬件监控管理装置及执行硬件监控功能的方法
    • US20080235700A1
    • 2008-09-25
    • US12043329
    • 2008-03-06
    • Akira Iguchi
    • Akira Iguchi
    • G06F9/30G06F9/50
    • G06F9/5077G06F9/45558G06F11/3404G06F11/3466G06F2009/45591G06F2201/86G06F2201/88
    • A hypervisor OS includes a monitor context table in which plural monitor contexts each including monitor operation conditions and information concerning priority are set in order to set a hardware monitor function for monitoring operation states of plural physical processors that execute plural processes in parallel. The hypervisor OS causes the hardware monitor function to execute on a monitor context with high priority satisfying a monitor operation condition, for acquiring monitor data and outputting the monitor data together with timing data indicating time when the monitor operation condition is satisfied and outputs timing data indicating time when the monitor operation condition is satisfied, on a monitor context satisfying a monitor operation condition but having low priority.
    • 管理程序OS包括监视器上下文表,其中设置了包括监视操作条件和关于优先级的信息的多个监视器上下文,以便设置用于监视并行执行多个处理的多个物理处理器的操作状态的硬件监视功能。 管理程序OS使得硬件监视功能在满足监视操作条件的高优先级的监视器上下文上执行,用于获取监视数据并输出监视数据以及指示监视操作条件满足时的时间的定时数据,并输出指示 在满足监视操作条件但具有低优先级的监视器上下文中满足监视操作条件的时间。