专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US07165209B2 System and method for use of shortening and puncturing in an adapative code for band and time-selective communications 失效
标题翻译：用于频段和时间选择性通信的适应代码中的缩短和删截的系统和方法
公开(公告)号：US07165209B2
公开(公告)日：2007-01-16
申请号：US10754570
申请日：2004-01-12
申请人： E. F. Charles LaBerge
发明人： E. F. Charles LaBerge
IPC分类号： H03M13/03
CPC分类号： H04L1/0068 , H04L1/0009
摘要： A method for encoding a data communication includes measuring a communications channel to determine available time slots and available bandwidth, and determining puncturing and shortening information from the available time slots and the available bandwidth. Puncturing information includes a number of bits p to be punctured and an identity of bits to be punctured and shortening information; whereas, shortening information includes a number of bits s to be shortened and an identity of bits to be shortened. Puncturing is performed on a first dimension, and shortening is performed on a second dimension.
摘要翻译：一种用于对数据通信进行编码的方法包括测量通信信道以确定可用时隙和可用带宽，以及从可用时隙和可用带宽确定穿孔和缩短信息。穿刺信息包括要被穿孔的位数p和要被穿孔的位的标识和缩短信息; 而缩短信息包括要缩短的比特数s和要缩短的比特的身份。在第一维度上执行穿刺，并且在第二维度上执行缩短。

2. 发明授权

US07161223B2 Integrated circuit with a PN junction diode 有权
标题翻译：具有PN结二极管的集成电路
公开(公告)号：US07161223B2
公开(公告)日：2007-01-09
申请号：US10950085
申请日：2004-09-24
申请人： James D. Beasom
发明人： James D. Beasom
IPC分类号： H01L23/58
CPC分类号： H01L29/0847 , H01L29/0615 , H01L29/0619 , H01L29/0634 , H01L29/0696 , H01L29/402 , H01L29/66659 , H01L29/735 , H01L29/7835 , H01L29/8611 , H01L2924/0002 , H03K17/941 , H01L2924/00
摘要： Apparatus and Methods for the self-alignment of separated regions in a lateral MOSFET of an integrate circuit. In one embodiment, a method comprising, forming a relatively thin dielectric layer on a surface of a substrate. Forming a first region of relatively thick material having a predetermined lateral length on the surface of the substrate adjacent the relatively thin dielectric layer. Implanting dopants to form a top gate using a first edge of the first region as a mask to define a first edge of the top gate. Implanting dopants to form a drain contact using a second edge of the first region as a mask to define a first edge of the drain contact, wherein the distance between the top gate and drain contact is defined by the lateral length of the first region.
摘要翻译：用于集成电路的横向MOSFET中分离区域的自对准的装置和方法。在一个实施例中，一种方法包括：在衬底的表面上形成相对薄的电介质层。在相邻较薄的电介质层的基板的表面上形成具有预定横向长度的较厚材料的第一区域。使用第一区域的第一边缘作为掩模将植入掺杂剂形成顶部栅极以限定顶部栅极的第一边缘。使用第一区域的第二边缘作为掩模来植入掺杂剂以形成漏极接触，以限定漏极接触的第一边缘，其中顶部栅极和漏极接触之间的距离由第一区域的横向长度限定。

3. 发明授权

US07141941B2 Staggering switching signals for multiple cold cathode fluorescent lamp backlighting system to reduce electromagnetic interference 失效
标题翻译：多个冷阴极荧光灯背光系统的切换信号交错，以减少电磁干扰
公开(公告)号：US07141941B2
公开(公告)日：2006-11-28
申请号：US10968480
申请日：2004-10-19
申请人： Robert L. Lyle, Jr. , Lawrence George Pearce
发明人： Robert L. Lyle, Jr. , Lawrence George Pearce
IPC分类号： H05B37/00 , H05B39/00 , H05B41/00 , H05B37/02 , H05B39/04 , H05B41/36 , G05F1/00
CPC分类号： H05B41/2824
摘要： In order to minimize switching-induced electromagnetic interference in a power supply switching circuit of the type used to control the AC power for multiple high voltage devices, such as cold cathode fluorescent lamps employed for backlighting a large scale liquid crystal display, the gating signals that are used to switch lamp-driving inverter circuits ON and OFF are staggered, or slightly offset in time, so that no two switching devices will be switched at the same time. By slightly offset in time is meant that the time differential between any pair of switching signals is relatively small compared to the period of the switching signal frequency. This has the effect of spreading out and thereby diminishing the magnitude of the spectral content of both capacitively and inductively coupled transients that are produced at switching times of the inverter circuits.
摘要翻译：为了最小化用于控制多个高压装置（例如用于背光大规模液晶显示器的冷阴极荧光灯）的AC电源的电源开关电路中的开关感应电磁干扰，门控信号用于开关灯驱动逆变器电路的ON和OFF交错，或稍微偏移时间，因此不会同时切换两个开关装置。通过稍微偏移的时间是指任何一对开关信号之间的时间差与切换信号频率的周期相比相对较小。这具有扩展并因此减小在逆变器电路的开关时间产生的电容和电感耦合瞬变的频谱含量的大小。

4. 发明授权

US07133367B2 Embedded cell loopback method and system for testing in ATM networks 有权
公开(公告)号：US07133367B2
公开(公告)日：2006-11-07
申请号：US11069271
申请日：2005-03-01
申请人： Randall L. Powers , Robert S. Kroninger , Melvin R. Phillips , Dieter H. Nattkemper
发明人： Randall L. Powers , Robert S. Kroninger , Melvin R. Phillips , Dieter H. Nattkemper
IPC分类号： H04J3/14
CPC分类号： H04L43/50 , H04L49/254 , H04L2012/5628
摘要： The present invention relates to a method and apparatus for testing components in ATM networks utilizing loop-back based ATM layer testing. The method and apparatus utilize interfaces and identifier codes to send and loop-back test cells along portions of virtual channels to test the virtual channels.

5. 发明授权

US07112463B2 Method for making devices using ink jet printing 有权
标题翻译：使用喷墨印刷制造装置的方法
公开(公告)号：US07112463B2
公开(公告)日：2006-09-26
申请号：US10713329
申请日：2003-11-13
申请人： Robert Horning , Thomas Ohnstein , Daniel Youngner
发明人： Robert Horning , Thomas Ohnstein , Daniel Youngner
IPC分类号： H01L21/00
CPC分类号： H01L21/00 , B41M3/006 , G02B5/201
摘要： Methods for using ink-jet printing to deposit various layers of micro-structure devices are provided. A wide variety of micro-structures may be formed using these techniques including, for example, many forms of MEMs structures as well as other structures.
摘要翻译：提供了使用喷墨印刷来沉积各种微结构器件层的方法。可以使用这些技术形成各种微结构，包括例如许多形式的MEM结构以及其它结构。

6. 发明授权

US07097714B2 Particulate removal from an electrostatic chuck 失效
标题翻译：从静电吸盘去除颗粒
公开(公告)号：US07097714B2
公开(公告)日：2006-08-29
申请号：US10740171
申请日：2003-12-18
申请人： John J. Hackenberg
发明人： John J. Hackenberg
IPC分类号： B08B5/04
CPC分类号： H01L21/67028 , B08B5/02 , H01L21/6831
摘要： The cleaning of particles from an electrostatic chuck. In one embodiment, a method of cleaning an electrostatic chuck in a processing chamber is disclosed. The method comprises directing a flow of gas across the electrostatic chuck to dislodge particles from the electrostatic chuck and removing the flow of gas and particles through an exhaust port in the processing chamber. In this embodiment, the vacuum integrity of the chamber is not compromised during the cleaning of the electrostatic chuck.
摘要翻译：从静电吸盘清洁颗粒。在一个实施例中，公开了一种在处理室中清洁静电卡盘的方法。该方法包括引导气流穿过静电吸盘以从静电吸盘排出颗粒，并通过处理室中的排气口去除气体和颗粒的流动。在该实施例中，在清洁静电卡盘期间腔室的真空完整性不受影响。

7. 发明授权

US07075789B2 Mechanical housing 有权
公开(公告)号：US07075789B2
公开(公告)日：2006-07-11
申请号：US10673739
申请日：2003-09-29
申请人： Gary Gustine , Charles G. Ham , Michael Sawyer , Frederick Daniels , Michelle Bishop , Lane King , Matthew Kusz
发明人： Gary Gustine , Charles G. Ham , Michael Sawyer , Frederick Daniels , Michelle Bishop , Lane King , Matthew Kusz
IPC分类号： H05K7/20
CPC分类号： H05K7/20409 , H04Q1/035 , H04Q1/09 , H04Q2201/06 , H04Q2201/10 , H04Q2201/12 , H05K7/20418 , H05K7/20445
摘要： An apparatus for containing objects, such as electronic circuit cards, and a method for making the same, the apparatus having a housing; at least one case disposed within the housing, the case adapted to confine the objects to different locations within the housing and comprising a frame, the region within the frame divided into two regions by a first partition, each of the two regions divided into a plurality of sections by a plurality of second partitions, each of the second partitions thermally coupled to the frame and the first partition, each of the sections divided into a plurality of slots, each slot having an object disposed therein for thermal contact between the first partition, a second partition, and one of a second partition and the frame; and at least one heat sink adapted to absorb heat from the case, the heat sink thermally coupled to the case and the housing.

8. 发明授权

US07063987B2 Backside failure analysis of integrated circuits 失效
标题翻译：集成电路的背面故障分析
公开(公告)号：US07063987B2
公开(公告)日：2006-06-20
申请号：US10738144
申请日：2003-12-17
申请人： Walter J. Rowe, Jr. , Isaiah McDonald , Malcolm P. Cambra, Jr.
发明人： Walter J. Rowe, Jr. , Isaiah McDonald , Malcolm P. Cambra, Jr.
IPC分类号： H01L21/00 , H01L21/44 , H01L21/48 , H01L21/50 , G01R31/26
CPC分类号： G01R31/303 , G01R31/2898 , H01L2224/49171
摘要： Backside failure analysis of integrated circuits. In one embodiment, a method of preparing a device under test (DUT) for an image based diagnostic testing is disclosed. The method comprises removing a portion of the backside package of the DUT to allow for the implementation of an image based diagnostic test through the backside of the DUT. The functionality of DUT is destroyed by the removal of the portion of the backside package of the DUT. Further, restoring the functionality of the DUT with an interface carrier before an image based diagnostic test is conducted.
摘要翻译：集成电路的背面故障分析。在一个实施例中，公开了一种准备用于基于图像的诊断测试的被测器件（DUT）的方法。该方法包括去除DUT的背面封装的一部分，以允许通过DUT的背面执行基于图像的诊断测试。通过去除DUT的背面封装的部分来破坏DUT的功能。此外，在执行基于图像的诊断测试之前，使用接口载体恢复DUT的功能。

9. 发明授权

US07002898B1 Asymmetrical transport of data 失效
标题翻译：数据的不对称传输
公开(公告)号：US07002898B1
公开(公告)日：2006-02-21
申请号：US09629782
申请日：2000-07-31
申请人： Heng Lou
发明人： Heng Lou
IPC分类号： H04J9/00
CPC分类号： H04W24/00 , G06F17/14 , G06F17/142 , H03M13/1515 , H03M13/356 , H04B10/272 , H04H20/69 , H04H20/77 , H04H20/78 , H04H20/79 , H04H20/80 , H04H60/11 , H04H60/86 , H04H60/96 , H04H60/97 , H04J3/14 , H04J14/0298 , H04K1/00 , H04K3/226 , H04K3/255 , H04L1/004 , H04L1/0045 , H04L1/0057 , H04L1/0071 , H04L1/24 , H04L5/0007 , H04L5/0037 , H04L5/0044 , H04L5/023 , H04L5/14 , H04L5/143 , H04L5/1484 , H04L12/10 , H04L12/12 , H04L12/2801 , H04L12/44 , H04L25/03866 , H04L27/2601 , H04L27/2608 , H04L27/2614 , H04L27/2626 , H04L27/2628 , H04L27/2634 , H04L27/2647 , H04L27/265 , H04L27/2652 , H04L27/2655 , H04L27/2657 , H04L27/2662 , H04L27/34 , H04L41/0213 , H04L41/064 , H04L41/0896 , H04L43/00 , H04L43/022 , H04L43/067 , H04L43/0811 , H04L43/0817 , H04L43/0823 , H04L43/0829 , H04L43/0847 , H04L43/0852 , H04L43/0858 , H04L43/0864 , H04L43/0882 , H04L43/16 , H04L2001/0093 , H04L2027/0036 , H04L2027/0057 , H04L2027/0067 , H04M7/006 , H04M9/027 , H04N7/17309 , H04N7/22 , H04N21/2221 , H04N21/2383 , H04N21/2385 , H04N21/2402 , H04N21/4382 , H04N21/6118 , H04N21/6137 , H04N21/6168 , H04W24/08 , Y02D50/40 , Y02D50/42
摘要： A system is described which provides bidirectional transport of data at different data rates for each direction over a shared medium. In one embodiment, the different data rates are accomplished using different modulation techniques. For example, in the downstream direction, quadrature amplitude modulation (QAM) 64 is used and in the upstream direction orthogonal frequency division multiplexing (OFDM) is used. The QAM 64 modulation provides for a higher number of bits per hertz in a transmission channel. By using QAM 64 modulation, down stream transmission rates on the order of 30 megabits per second (Mbps) in a 6 MHz channel can be achieved. A number of 6 MHz channels can be combined to provide for even higher data rates.
摘要翻译：描述了以共享介质上的每个方向提供不同数据速率的数据的双向传输的系统。在一个实施例中，使用不同的调制技术来实现不同的数据速率。例如，在下游方向，使用正交幅度调制（QAM）64，在上行方向使用正交频分复用（OFDM）。 QAM64调制在传输信道中提供每赫兹更高数量的比特。通过使用QAM64调制，可以实现6MHz信道中的每秒30兆比特（Mbps）的下行传输速率。可以组合多个6 MHz信道以提供更高的数据速率。

10. 再颁专利

USRE38940E1 Synchronous-rectified DC to DC converter with improved current sensing 有权
标题翻译：具有改进电流检测功能的同步整流DC-DC转换器
公开(公告)号：USRE38940E1
公开(公告)日：2006-01-24
申请号：US10282753
申请日：2002-10-29
申请人： Robert H. Isham , Charles E. Hawkes , Michael M. Walters
发明人： Robert H. Isham , Charles E. Hawkes , Michael M. Walters
IPC分类号： G05F1/613
CPC分类号： H02M3/1588 , H02M2001/0009 , Y02B70/1466
摘要： A DC to DC buck pulse width modulator converter circuit includes an input, a high side output and a low side output. A high side switch is electrically connected between a common output node and a voltage supply, and controls a flow of current therethrough dependent upon the high side output. A low side switch is electrically connected between the common output node and ground, and controls a flow of current therethrough dependent upon the low side output. A virtual ground amplifier includes a second input electrically connected to ground. A current feedback resistor is electrically connected intermediate the common output node and a first input of the virtual ground amplifier. A variable impedance component is electrically connected to an output of the virtual ground amplifier and to the first input of the virtual ground amplifier. The impedance of the variable impedance component is varied dependent upon the output of the virtual ground amplifier. A sample and hold circuit is electrically connected intermediate the input of the pulse width modulator converter circuit and the variable impedance component. The sample and hold circuit sources a virtual ground current through the variable impedance component, and samples the virtual ground current.
摘要翻译： DC至DC降压脉宽调制器转换器电路包括输入端，高端输出端和低端输出端。高侧开关电连接在公共输出节点和电压源之间，并根据高侧输出控制电流流过。低侧开关电连接在公共输出节点和地之间，并根据低端输出控制电流流过。虚拟地面放大器包括电连接到地的第二输入端。电流反馈电阻器电连接在公共输出节点和虚拟接地放大器的第一输入端之间。可变阻抗分量电连接到虚拟接地放大器的输出端和虚拟接地放大器的第一输入端。可变阻抗分量的阻抗取决于虚拟接地放大器的输出而变化。采样和保持电路电连接在脉宽调制器转换器电路的输入端和可变阻抗部件之间。采样和保持电路通过可变阻抗分量产生虚拟接地电流，并对虚拟接地电流进行采样。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式