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    • 1. 发明授权
    • Structure for detecting charging effects in device processing
    • 用于检测设备处理中的充电效果的结构
    • US06703641B2
    • 2004-03-09
    • US09991507
    • 2001-11-16
    • Terence L. KaneYun Yu WangMalcolm P. Cambra, Jr.Michael P. Tenney
    • Terence L. KaneYun Yu WangMalcolm P. Cambra, Jr.Michael P. Tenney
    • H01L2358
    • H01L22/34H01L2924/0002Y10S257/903H01L2924/00
    • A semiconductor device monitor structure is described which can detect localized defects due to floating-body effects, particularly on SOI device wafers. The monitor structure includes a plurality of cells containing PFET or NFET devices, disposed at a perimeter of the structure which is bordered by an insulating region such as shallow trench isolation (STI). Each cell includes polysilicon gate structures having a characteristic spacing given by a first distance, and a portion extending beyond the perimeter a second distance. The cells are constructed in accordance with progressively varying ground rules, so that the first distance and second distance are non-uniform between cells. The cells may be bit fail mapped for single-cell failures, thereby enabling detection of localized defects due to floating-body effects.
    • 描述了可以检测由于浮体效应引起的局部缺陷的半导体器件监视器结构,特别是在SOI器件晶片上。 监视器结构包括多个包含PFET或NFET器件的单元,该单元设置在由诸如浅沟槽隔离(STI)之类的绝缘区域界定的结构的周边。 每个单元包括具有由第一距离给出的特征间隔的多晶硅栅极结构,以及延伸超过周边第二距离的部分。 细胞根据逐渐变化的基本规则构造,使得细胞之间的第一距离和第二距离是不均匀的。 这些单元可能被单位故障映射成位故障,从而能够检测由于浮体效应引起的局部缺陷。