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81. 发明申请

US20060124983A1 Semiconductor device and method for fabricating the same 审中-公开
标题翻译：半导体装置及其制造方法
公开(公告)号：US20060124983A1
公开(公告)日：2006-06-15
申请号：US11346207
申请日：2006-02-03
申请人： Toshie Kutsunai , Takumi Mikawa , Yuji Judai
发明人： Toshie Kutsunai , Takumi Mikawa , Yuji Judai
IPC分类号： H01L21/8242 , H01L29/94
CPC分类号： H01L27/11507 , H01L21/28568 , H01L27/11502 , H01L28/55 , H01L28/65 , H01L28/75
摘要： A semiconductor device has contact plugs each for electrically connecting a capacitor element to the source/drain region of a transistor, conductive layers formed on the contact plugs and made of titanium nitride which is a nitride only of a refractory metal, and polycrystalline conductive oxygen barrier layers each composed of a multilayer structure consisting of a titanium aluminum nitride film, an iridium film, and an iridium oxide film to prevent the diffusion of oxygen. Since the conductive layers made of titanium nitride which is low in crystal orientation is provided under the oxygen barrier films, the titanium aluminum nitride films formed as the oxygen barrier films directly on the conductive layers have a compact film structure so that the penetration of oxygen is prevented effectively.
摘要翻译：半导体器件具有用于将电容器元件电连接到晶体管的源极/漏极区域的接触插塞，形成在接触插塞上的导电层和仅由耐火金属制成的氮化钛制成的多晶导电氧气阻挡层各层由由氮化铝钛膜，铱膜和氧化铱膜构成的多层结构构成，以防止氧的扩散。由于在氧阻隔膜下面设置由结晶取向低的氮化钛制成的导体层，所以直接在导电层上形成为氧阻隔膜的氮化铝钛膜具有致密的膜结构，使得氧的渗透为有效防范。

82. 发明申请

US20060060908A1 Semiconductor device and method for manufacturing the same 有权
公开(公告)号：US20060060908A1
公开(公告)日：2006-03-23
申请号：US11270156
申请日：2005-11-09
申请人： Takumi Mikawa , Yuuji Jyuudai , Shinya Natsume
发明人： Takumi Mikawa , Yuuji Jyuudai , Shinya Natsume
IPC分类号： H01L27/108
CPC分类号： H01L28/60 , H01L21/31053 , H01L27/11502 , H01L27/11507
摘要： A method for manufacturing a semiconductor device includes the steps of forming a conductive layer over a first insulating layer formed on a substrate, and over a plurality of contact plugs formed in the first insulating layer; forming a plurality of capacitor element lower electrodes by patterning the conductive layer; forming a second insulating layer on the first insulating layer and the capacitor element lower electrodes; forming recesses in the second insulating layer at a region above the capacitor element lower electrodes; planarizing the second insulating layer by polishing; exposing the capacitor element lower electrodes; and forming a capacitive insulating film and capacitor element upper electrodes above the capacitor element lower electrodes. In polishing the second insulating layer, leveling of steps can be accelerated, insufficient polishing, peeling of the lower electrodes and generation of scratches can be suppressed, and the global step difference can be reduced.

83. 发明授权

US06972449B2 Ferroelectric memory having a hydrogen barrier film which continuously covers a plurality of capacitors in a capacitor line 有权
标题翻译：铁电存储器，其具有连续地覆盖电容器线路中的多个电容器的氢阻挡膜
公开(公告)号：US06972449B2
公开(公告)日：2005-12-06
申请号：US10943125
申请日：2004-09-17
申请人： Takafumi Yoshikawa , Takumi Mikawa
发明人： Takafumi Yoshikawa , Takumi Mikawa
IPC分类号： G11C7/00 , H01L21/00 , H01L21/02 , H01L21/8239 , H01L21/8246 , H01L27/10 , H01L27/115 , H01L29/76 , H01L29/94
CPC分类号： H01L27/11502 , H01L27/11507 , H01L28/55
摘要： A first insulating hydrogen barrier film is filled between lower electrodes of some ferroelectric capacitors arranged along one direction out of a word line direction and a bit line direction among a plurality of ferroelectric capacitors included in a ferroelectric memory of this invention. A common capacitor dielectric film commonly used by the some ferroelectric capacitors arranged along the one direction is formed on the lower electrodes of the some ferroelectric capacitors arranged along the one direction and on the first insulating hydrogen barrier film. A common upper electrode commonly used by the some ferroelectric capacitors arranged along the one direction is formed on the common capacitor dielectric film. A second insulating hydrogen barrier film is formed so as to cover the common upper electrode.
摘要翻译：第一绝缘氢阻挡膜被填充在本发明的强电介质存储器中所包含的多个铁电电容器之中的沿着字线方向的一个方向排列的一些铁电电容器的下电极和位线方向之间。在沿着一个方向布置的一些铁电电容器的下电极和第一绝缘氢阻挡膜上形成沿着一个方向布置的一些铁电电容器通常使用的公共电容器电介质膜。在公共电容器电介质膜上形成沿着一个方向布置的一些铁电电容器通常使用的公共上电极。形成第二绝缘氢阻挡膜以覆盖公共上电极。

84. 发明申请

US20050242383A1 Ferroelectric memory and method for manufacturing the same 审中-公开
公开(公告)号：US20050242383A1
公开(公告)日：2005-11-03
申请号：US11175451
申请日：2005-07-07
申请人： Takumi Mikawa
发明人： Takumi Mikawa
IPC分类号： H01L21/02 , H01L21/285 , H01L21/768 , H01L21/8239 , H01L21/8246 , H01L27/105 , H01L27/115 , H01L29/76
CPC分类号： H01L27/11509 , H01L21/28568 , H01L21/76895 , H01L27/105 , H01L27/1052 , H01L27/11502 , H01L27/11507 , H01L28/55 , H01L28/60 , H01L28/75
摘要： A capacitor upper electrode and a wiring are electrically connected to each other by using a plug and a conductive layer formed below a capacitive element without using a plug that directly connects the capacitor upper electrode to the wiring provided thereon via an interlayer insulating film therebetween. Alternatively, the capacitor upper electrode is covered by a conductive hydrogen barrier film, and the capacitor upper electrode and the wiring are electrically connected to each other via both a plug connecting the wiring and the conductive hydrogen barrier film to each other and the conductive hydrogen barrier film.

85. 发明申请

US20050104113A1 Electrode forming method, capacitor element and fabricating method therefor 审中-公开
标题翻译：电极形成方法，电容器元件及其制造方法
公开(公告)号：US20050104113A1
公开(公告)日：2005-05-19
申请号：US10986316
申请日：2004-11-12
申请人： Takumi Mikawa , Hiroshige Hirano
发明人： Takumi Mikawa , Hiroshige Hirano
IPC分类号： H01L21/768 , H01L21/02 , H01L21/8246 , H01L27/105 , H01L21/00 , H01L21/8242 , H01L27/108 , H01L29/76
CPC分类号： H01L28/92 , H01L28/56 , H01L28/65
摘要： An electrode forming method includes the steps of: forming a conductive film on a substrate; forming, on the conductive film, a first mask pattern extending in a first direction; forming a conductive film pattern by etching the conductive film using the first mask pattern; removing the first mask pattern existing on the conductive film pattern; forming, on the substrate and on the conductive film pattern, a second mask pattern extending in a second direction different from the first direction; and forming an electrode by etching the conductive film pattern using the second mask pattern.
摘要翻译：电极形成方法包括以下步骤：在基板上形成导电膜; 在导电膜上形成沿第一方向延伸的第一掩模图案; 通过使用第一掩模图案蚀刻导电膜形成导电膜图案; 去除存在于导电膜图案上的第一掩模图案; 在所述基板上和所述导电膜图案上形成沿与所述第一方向不同的第二方向延伸的第二掩模图案; 以及通过使用第二掩模图案蚀刻导电膜图案形成电极。

86. 发明授权

US06794199B2 Ferroelectric memory and method for fabricating the same 有权
标题翻译：铁电存储器及其制造方法
公开(公告)号：US06794199B2
公开(公告)日：2004-09-21
申请号：US10750862
申请日：2004-01-05
申请人： Takafumi Yoshikawa , Takumi Mikawa
发明人： Takafumi Yoshikawa , Takumi Mikawa
IPC分类号： H01L2100
CPC分类号： H01L27/11502 , H01L27/11507 , H01L28/55
摘要： A first insulating hydrogen barrier film is filled between lower electrodes of some ferroelectric capacitors arranged along one direction out of a word line direction and a bit line direction among a plurality of ferroelectric capacitors included in a ferroelectric memory of this invention. A common capacitor dielectric film commonly used by the some ferroelectric capacitors arranged along the one direction is formed on the lower electrodes of the some ferroelectric capacitors arranged along the one direction and on the first insulating hydrogen barrier film. A common upper electrode commonly used by the some ferroelectric capacitors arranged along the one direction is formed on the common capacitor dielectric film. A second insulating hydrogen barrier film is formed so as to cover the common upper electrode.
摘要翻译：第一绝缘氢阻挡膜被填充在本发明的强电介质存储器中所包含的多个铁电电容器之中的沿着字线方向的一个方向排列的一些铁电电容器的下电极和位线方向之间。在沿着一个方向布置的一些铁电电容器的下电极和第一绝缘氢阻挡膜上形成沿着一个方向布置的一些铁电电容器通常使用的公共电容器电介质膜。在公共电容器电介质膜上形成沿着一个方向布置的一些铁电电容器通常使用的公共上电极。形成第二绝缘氢阻挡膜以覆盖公共上电极。

87. 发明授权

US08927331B2 Method of manufacturing nonvolatile memory device 有权
标题翻译：制造非易失性存储器件的方法
公开(公告)号：US08927331B2
公开(公告)日：2015-01-06
申请号：US13997818
申请日：2012-03-09
申请人： Ichirou Takahashi , Takumi Mikawa
发明人： Ichirou Takahashi , Takumi Mikawa
IPC分类号： H01L21/00 , H01L45/00
CPC分类号： H01L45/1641 , H01L45/04 , H01L45/08 , H01L45/1233 , H01L45/146 , H01L45/1625 , H01L45/1675
摘要： A method of manufacturing a nonvolatile memory device includes: forming a tantalum oxide material layer including an oxygen-deficient transition metal oxide; forming a tantalum oxide material layer including a transition metal oxide and having a degree of oxygen deficiency lower than a degree of oxygen deficiency of the tantalum oxide material layer; and exposing, after the forming of a tantalum oxide material layer, the tantalum oxide material layer to plasma generated from a noble gas.
摘要翻译：一种制造非易失性存储器件的方法包括：形成包含缺氧过渡金属氧化物的氧化钽材料层; 形成包含过渡金属氧化物并且氧缺乏程度低于氧化钽材料层的缺氧程度的氧化钽材料层; 在氧化钽材料层形成之后，将氧化钽材料层暴露于由稀有气体产生的等离子体。

88. 发明授权

US08900965B2 Nonvolatile memory device manufacturing method 有权
标题翻译：非易失性存储器件制造方法
公开(公告)号：US08900965B2
公开(公告)日：2014-12-02
申请号：US13884630
申请日：2012-03-21
申请人： Haruyuki Sorada , Takumi Mikawa , Kenji Tominaga , Kiyotaka Tsuji
发明人： Haruyuki Sorada , Takumi Mikawa , Kenji Tominaga , Kiyotaka Tsuji
IPC分类号： H01L45/00 , H01L27/24 , H01L27/10
CPC分类号： H01L45/16 , H01L27/101 , H01L27/2409 , H01L27/2418 , H01L27/2463 , H01L45/04 , H01L45/1683
摘要： A method of manufacturing a nonvolatile memory device that is a variable resistance nonvolatile memory device, which has good consistency with a dual damascene process that is suitable for the formation of fine copper lines and which enables large capacity and high integration. This method includes: forming a variable resistance element, a contact hole and a line groove; and forming a current steering layer of a bidirectional diode element above interlayer insulating layers and a variable resistance layer to cover the line groove without covering a bottom surface of the contact hole.
摘要翻译：一种制造非易失性存储器件的方法，其是可变电阻非易失性存储器件，其与适合于形成细铜线的双镶嵌工艺具有良好的一致性，并且能够实现大容量和高集成度。该方法包括：形成可变电阻元件，接触孔和线槽; 并且在层间绝缘层之上形成双向二极管元件的电流转向层和可变电阻层以覆盖线槽而不覆盖接触孔的底表面。

89. 发明授权

US08785238B2 Nonvolatile memory element and method for manufacturing same 有权
标题翻译：非易失存储元件及其制造方法
公开(公告)号：US08785238B2
公开(公告)日：2014-07-22
申请号：US13704663
申请日：2011-06-30
申请人： Yoshio Kawashima , Takumi Mikawa
发明人： Yoshio Kawashima , Takumi Mikawa
IPC分类号： H01L29/02
CPC分类号： H01L45/1666 , H01L27/2436 , H01L45/08 , H01L45/10 , H01L45/1233 , H01L45/146 , H01L45/1675
摘要： The method includes: forming a lower electrode layer above a substrate; forming a variable resistance layer on the lower electrode layer; forming an upper electrode layer on the variable resistance layer; forming a hard mask layer on the upper electrode layer; forming a photoresist mask on the hard mask layer; forming a hard mask by performing etching on the hard mask layer using the photoresist mask; and forming a nonvolatile memory element by performing etching on the upper electrode layer, the variable resistance layer, and the lower electrode layer, using the hard mask. In the forming of a photoresist mask, the photoresist mask is formed to have corner portions which recede toward the center portion in planar view.
摘要翻译：该方法包括：在基板上形成下电极层; 在下电极层上形成可变电阻层; 在所述可变电阻层上形成上电极层; 在上电极层上形成硬掩模层; 在硬掩模层上形成光刻胶掩模; 通过使用光致抗蚀剂掩模在硬掩模层上进行蚀刻来形成硬掩模; 以及通过使用硬掩模对上电极层，可变电阻层和下电极层进行蚀刻来形成非易失性存储元件。在光致抗蚀剂掩模的形成中，光致抗蚀剂掩模形成为具有在平面视图中朝向中心部分后退的角部。

90. 发明授权

US08624214B2 Semiconductor device having a resistance variable element and a manufacturing method thereof 有权
标题翻译：具有电阻可变元件的半导体器件及其制造方法
公开(公告)号：US08624214B2
公开(公告)日：2014-01-07
申请号：US12866359
申请日：2009-06-08
申请人： Takumi Mikawa , Kazuhiko Shimakawa
发明人： Takumi Mikawa , Kazuhiko Shimakawa
IPC分类号： H01L29/02 , H01L47/00 , H01L21/00
CPC分类号： H01L27/101 , G11C13/0007 , G11C2213/32 , G11C2213/34 , H01L27/24
摘要： A semiconductor device (100) of the present invention has a structure in which an interlayer insulating layer (115) is formed on an uppermost wire (114), contacts (116, 117) penetrate the interlayer insulating layer (115), a lower electrode (118a) of the resistance variable element is formed on the interlayer insulating layer (115) to cover the contact (116), and resistance variable layer (119) is formed on the interlayer insulating layer (115) to cover the lower electrode (118a) and the contact (117). The contact (116) and the lower electrode (118a) serve as a first terminal, while the contact (117) serves as a second terminal.
摘要翻译：本发明的半导体器件（100）具有层间绝缘层（115）形成在最上层导线（114）上的结构，触点（116,117）穿过层间绝缘层（115），下电极在层间绝缘层（115）上形成电阻可变元件（118a）以覆盖触点（116），并且在层间绝缘层（115）上形成电阻变化层（119）以覆盖下电极（118a））和触点（117）。触点（116）和下电极（118a）用作第一端子，而触头（117）用作第二端子。

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