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81. 发明授权

US07898486B2 Fractal antenna for vehicle 失效
标题翻译：车用分形天线
公开(公告)号：US07898486B2
公开(公告)日：2011-03-01
申请号：US12183060
申请日：2008-07-30
申请人： Jin-Ho Kim , Dong-Won Lee
发明人： Jin-Ho Kim , Dong-Won Lee
IPC分类号： H01Q1/32 , H01Q1/38 , H01Q1/42
CPC分类号： H01Q1/36
摘要： Disclosed herein is a fractal antenna for a vehicle. First and second radiation elements are downwardly inclined from an apex ridge, and disposed opposite each other on the left and right sides inside a radome for protecting the antenna. First and second parasitic elements are formed in an inner space which is formed by the first and second radiation elements. Further, the first and second parasitic elements are disposed to be parallel to and spaced apart from the respective first and second radiation elements at regular intervals, are downwardly inclined from an apex ridge, and are disposed opposite each other on the left and right sides. The first and second radiation elements are respectively formed on part of the upper surface of a first substrate and part of the upper surface of a second substrate in patterns each having a predetermined shape.
摘要翻译：这里公开了一种用于车辆的分形天线。第一和第二辐射元件从顶点脊向下倾斜，并且在雷达罩内的左侧和右侧彼此相对地设置，用于保护天线。第一和第二寄生元件形成在由第一和第二辐射元件形成的内部空间中。此外，第一和第二寄生元件以规则的间隔设置成与相应的第一和第二辐射元件平行并间隔开，从顶点脊向下倾斜，并且在左侧和右侧彼此相对设置。第一和第二辐射元件分别形成在第一基板的上表面的一部分上，第二基板的上表面的一部分具有预定形状。

82. 发明申请

US20100238316A1 APPARATUS AND METHOD FOR CLASSIFYING IMAGES 有权
标题翻译：用于分类图像的装置和方法
公开(公告)号：US20100238316A1
公开(公告)日：2010-09-23
申请号：US12704291
申请日：2010-02-11
申请人： Ji-Hye KIM , Sung-Dae Cho , Min-Kyu Park , Hee-Chan Park , Jin-Ho Kim , Yun-Je Oh , Kyoung-Tae Kim , Choon-Woo Kim , Seul-Ki Jang
发明人： Ji-Hye KIM , Sung-Dae Cho , Min-Kyu Park , Hee-Chan Park , Jin-Ho Kim , Yun-Je Oh , Kyoung-Tae Kim , Choon-Woo Kim , Seul-Ki Jang
IPC分类号： H04N9/73 , G06K9/00
CPC分类号： H04N9/735
摘要： An image classification apparatus and method for Automatic White Balance (AWB) are provided. An input image is divided into blocks including pluralities of pixels. A hue value and a chroma value are calculated for each of the blocks. A color-changed block is detected by calculating, for each one of the blocks, differences between the hue and chroma values calculated for all blocks adjacent to the one of the blocks and the hue and chroma values calculated for the one of the blocks. A hue variance and a chroma variance are calculated for the entire input image if a number of the detected color-changed blocks is greater than or equal to a first threshold. The input image is determined as a non-monochromatic image, if the hue variance is greater than or equal to a second threshold or the chroma variance is greater than or equal to a third threshold.
摘要翻译：提供了一种用于自动白平衡（AWB）的图像分类装置和方法。输入图像被分成包括多个像素的块。为每个块计算色调值和色度值。通过针对每个块计算针对与该一个块相邻的所有块计算的色调和色度值之间的差异以及为该块中的一个块计算的色调和色度值来检测颜色变化块。如果检测到的颜色变化块的数量大于或等于第一阈值，则针对整个输入图像计算色调方差和色度方差。如果色调方差大于或等于第二阈值或色度方差大于或等于第三阈值，则输入图像被确定为非单色图像。

83. 发明授权

US07719033B2 Semiconductor devices having thin film transistors and methods of fabricating the same 有权
标题翻译：具有薄膜晶体管的半导体器件及其制造方法
公开(公告)号：US07719033B2
公开(公告)日：2010-05-18
申请号：US11364773
申请日：2006-02-28
申请人： Jae-Hun Jeong , Soon-Moon Jung , Hoon Lim , Won-Seok Cho , Jin-Ho Kim , Chang-Min Hong , Jong-Hyuk Kim , Kun-Ho Kwak
发明人： Jae-Hun Jeong , Soon-Moon Jung , Hoon Lim , Won-Seok Cho , Jin-Ho Kim , Chang-Min Hong , Jong-Hyuk Kim , Kun-Ho Kwak
IPC分类号： H01L29/74
CPC分类号： H01L27/0688 , H01L23/485 , H01L29/78 , H01L2924/0002 , H01L2924/00
摘要： Semiconductor devices having thin film transistors (TFTs) and methods of fabricating the same are provided. The semiconductor devices include a semiconductor substrate and a lower interlayer insulating layer disposed on the semiconductor substrate. A lower semiconductor body disposed on or in the lower interlayer insulating layer. A lower TFT includes a lower source region and a lower drain region, which are disposed in the lower semiconductor body, and a lower gate electrode, which covers and crosses at least portions of at least two surfaces of the lower semiconductor body disposed between the lower source and drain regions.
摘要翻译：提供具有薄膜晶体管（TFT）的半导体器件及其制造方法。半导体器件包括设置在半导体衬底上的半导体衬底和下层间绝缘层。下部半导体本体设置在下部层间绝缘层上或下部层间绝缘层中。下部TFT包括设置在下部半导体本体中的下部源极区域和下部漏极区域以及下部栅极电极，该下部栅极电极覆盖并交叉配置在下部半导体本体的下侧半导体本体的至少两个表面的至少一部分源极和漏极区域。

84. 发明申请

US20090176320A1 METHOD FOR FABRICATION OF FLOATING GATE IN SEMICONDUCTOR DEVICE 审中-公开
标题翻译：用于制造半导体器件中浮动栅的方法
公开(公告)号：US20090176320A1
公开(公告)日：2009-07-09
申请号：US12344504
申请日：2008-12-27
申请人： Jin-Ho Kim , Ki-Min Lee
发明人： Jin-Ho Kim , Ki-Min Lee
IPC分类号： H01L21/66 , H01L21/28 , H01L21/3065
CPC分类号： H01L21/32139 , H01L21/0271 , H01L21/28035 , H01L21/32137
摘要： A method for manufacturing a floating gate includes: forming a tunnel oxide film on a semiconductor substrate; forming a polysilicon layer on a surface of the tunnel oxide film; forming a photosensitive film pattern on a surface of the polysilicon layer; depositing a by-product on the photosensitive film to generate a by-product mask; and using the by-product mask as an etching mask to etch the polysilicon layer, completing fabrication of the floating gate. The polysilicon layer may be etched by a simplified process using a by-product mask so as to fabricate the floating gate, the etch rate of the polysilicon layer may be increased to improve productivity, poly bridge problems may be eliminated, and total amount of a gas used in etching the polysilicon layer may be reduced, resulting in an increase in hardware margin and a decrease in the amount of the gas used in this method.
摘要翻译：制造浮栅的方法包括：在半导体衬底上形成隧道氧化膜; 在隧道氧化膜的表面上形成多晶硅层; 在所述多晶硅层的表面上形成感光膜图案; 在感光膜上沉积副产物以产生副产物掩模; 并且使用副产物掩模作为蚀刻掩模来蚀刻多晶硅层，完成浮栅的制造。可以通过使用副产品掩模的简化工艺来蚀刻多晶硅层，以便制造浮栅，可以增加多晶硅层的蚀刻速率以提高生产率，可以消除多桥问题，并且总量用于蚀刻多晶硅层的气体可能会降低，从而导致硬度裕度的增加和在该方法中使用的气体量的减少。

85. 发明授权

US07485959B2 Structure for joining a semiconductor package to a substrate using a solder column 有权
标题翻译：使用焊料柱将半导体封装与基板接合的结构
公开(公告)号：US07485959B2
公开(公告)日：2009-02-03
申请号：US11330773
申请日：2006-01-11
申请人： Cheol-Joon Yoo , Jin-Ho Kim , Hee-Jin Park , Tae-Sung Yoon , Chan-Suk Lee
发明人： Cheol-Joon Yoo , Jin-Ho Kim , Hee-Jin Park , Tae-Sung Yoon , Chan-Suk Lee
IPC分类号： H01L23/48 , H01L21/44
CPC分类号： H05K3/3436 , H01L23/3128 , H01L24/10 , H01L24/13 , H01L24/48 , H01L2224/13 , H01L2224/13099 , H01L2224/48091 , H01L2924/00011 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01078 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/351 , H05K3/3452 , H05K3/3484 , H05K2201/10977 , H05K2203/0568 , Y02P70/613 , H01L2924/00 , H01L2224/0401 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A semiconductor package and a package mounting substrate can be joined using a conductive material column. Each of the semiconductor package and the package mounting substrate include an insulating protective opening exposing a wiring layer therein. The solder column resides within the insulating protective openings to electrically couple the wiring layers. The insulating protective openings protect the solder column against stress faults to form reliable electrical connections and to support high-density electrical connections between the semiconductor package and the package mounting substrate.
摘要翻译：半导体封装和封装安装基板可以使用导电材料柱接合。半导体封装和封装安装衬底中的每一个包括暴露其中的布线层的绝缘保护开口。焊料柱位于绝缘保护开口内，以电连接布线层。绝缘保护开口保护焊料柱免受应力故障的影响，形成可靠的电连接并支持半导体封装和封装安装基板之间的高密度电连接。

86. 发明授权

US07485955B2 Semiconductor package having step type die and method for manufacturing the same 有权
标题翻译：具有步进式模具的半导体封装及其制造方法
公开(公告)号：US07485955B2
公开(公告)日：2009-02-03
申请号：US11077235
申请日：2005-03-11
申请人： In-Ku Kang , Seok Goh , Jin-Ho Kim , Tae-Gyeong Chung , Yong-Jae Lee
发明人： In-Ku Kang , Seok Goh , Jin-Ho Kim , Tae-Gyeong Chung , Yong-Jae Lee
IPC分类号： H01L23/12 , H01L23/053
CPC分类号： H01L24/32 , H01L21/78 , H01L23/3128 , H01L24/05 , H01L24/48 , H01L24/49 , H01L24/73 , H01L25/0655 , H01L25/0657 , H01L25/50 , H01L29/0657 , H01L2224/0401 , H01L2224/04042 , H01L2224/05553 , H01L2224/05554 , H01L2224/05556 , H01L2224/05599 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48095 , H01L2224/48227 , H01L2224/48247 , H01L2224/48465 , H01L2224/48471 , H01L2224/48479 , H01L2224/49175 , H01L2224/4945 , H01L2224/73204 , H01L2224/73265 , H01L2224/85051 , H01L2224/85191 , H01L2224/85399 , H01L2224/85986 , H01L2224/92247 , H01L2225/0651 , H01L2225/06555 , H01L2225/06562 , H01L2225/06582 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01019 , H01L2924/01023 , H01L2924/01027 , H01L2924/01033 , H01L2924/01051 , H01L2924/01057 , H01L2924/01068 , H01L2924/01074 , H01L2924/01078 , H01L2924/01082 , H01L2924/014 , H01L2924/10158 , H01L2924/12042 , H01L2924/14 , H01L2924/15311 , H01L2924/15787 , H01L2924/181 , H01L2924/1815 , H01L2924/19041 , H01L2224/85186 , H01L2224/45099 , H01L2924/00 , H01L2924/3512 , H01L2924/00012 , H01L2224/4554
摘要： A variety of non-rectangular IC chips having a stepped or modified periphery or edge profile including one or more recessed or indented peripheral regions are provided for incorporation in modified package configurations, single chip packages and multi-chip assemblies, both stacked and/or planar. In the planar configurations, the recessed regions may be utilized, in cooperation with another appropriately sized IC chip, to increase the packing density of the resulting device. Similarly, in the stacked configuration, the recessed regions may be utilized to provide access to bond pads of lower chips and thereby reduce the need for spacers or peripheral thinning techniques and thereby improve the strength of the resulting assembly and/or reduce the overall height of the stacked structure.
摘要翻译：提供了具有包括一个或多个凹陷或凹入周边区域的阶梯状或改进的周边或边缘轮廓的各种非矩形IC芯片，用于结合到改进的封装结构，单个芯片封装和多芯片组件中，堆叠和/或平面。在平面构造中，可以与另一适当尺寸的IC芯片配合使用凹陷区域，以增加所得器件的封装密度。类似地，在堆叠构造中，凹陷区域可以用于提供对下部芯片的接合焊盘的访问，从而减少对间隔件或外围变薄技术的需要，从而提高所得组件的强度和/或降低总体高度堆叠结构。

87. 发明授权

US07419909B2 Methods of forming a semiconductor device that allow patterns in different regions that have different pitches to be connected 有权
标题翻译：形成允许具有不同间距的不同区域中的图案被连接的半导体器件的方法
公开(公告)号：US07419909B2
公开(公告)日：2008-09-02
申请号：US11647722
申请日：2006-12-29
申请人： Jin-Ho Kim , Jae-Kwan Park , Dong-Hwa Kwak , Su-Jin Ahn , Yoon-Moon Park , Jue-Hwang Sim , Jang-Ho Park , Sang-Yong Park
发明人： Jin-Ho Kim , Jae-Kwan Park , Dong-Hwa Kwak , Su-Jin Ahn , Yoon-Moon Park , Jue-Hwang Sim , Jang-Ho Park , Sang-Yong Park
IPC分类号： H01L21/302
CPC分类号： H01L27/11568 , H01L21/0337 , H01L21/0338 , H01L21/32139 , H01L27/105
摘要： Patterns are formed in a semiconductor device by defining a lower layer that includes a first region and a second region on a semiconductor substrate, forming first patterns with a first pitch that extend to the first and second regions, forming second patterns with a second pitch in the second region that are alternately arranged with the first patterns, forming a space insulating layer that covers the first and second patterns and comprises gap regions that are alternately arranged with the first patterns so as to correspond with the second patterns, forming third patterns that correspond to the second patterns in the gap regions, respectively, etching the space insulating layer between the first and second patterns and between the first and third patterns, such that the space insulating layer remains between the second patterns and the third patterns, and etching the lower layer using the first, second, and third patterns and the remaining space insulating layer between the second and third patterns as an etching mask.
摘要翻译：通过在半导体衬底上限定包括第一区域和第二区域的下层形成半导体器件中的图案，形成具有延伸到第一和第二区域的第一间距的第一图案，以第二间距形成第二图案所述第二区域与所述第一图案交替布置，形成覆盖所述第一图案和所述第二图案的间隔绝缘层，并且包括与所述第一图案交替布置以与所述第二图案对应的间隙区域，形成与所述第二图案对应的第三图案分别在间隙区域中蚀刻第一和第二图案之间以及第一和第三图案之间的空间绝缘层，使得空间绝缘层保留在第二图案和第三图案之间，并蚀刻下部使用第一，第二和第三图案和第二个之间的剩余空间绝缘层 nd第三图案作为蚀刻掩模。

88. 发明申请

US20080102904A1 MOBILE COMMUNICATION DEVICE 有权
标题翻译：移动通信设备
公开(公告)号：US20080102904A1
公开(公告)日：2008-05-01
申请号：US11734164
申请日：2007-04-11
申请人： Jeong-Hoon Kang , Jin-Ho Kim , Sung-Tae Lee
发明人： Jeong-Hoon Kang , Jin-Ho Kim , Sung-Tae Lee
IPC分类号： H04M1/00
CPC分类号： H04R1/2857 , H04M1/035 , H04R1/2811 , H04R2499/11
摘要： A mobile communication device is provided. The mobile communication device includes a terminal body, and a speaker module located in the terminal body. The speaker module includes an enclosure located in the terminal body, the enclosure defining a chamber therein, and a speaker having a front surface and a rear surface, the speaker being located in the enclosure such that the front surface of the speaker is exposed from the enclosure and the rear surface thereof is positioned within the chamber, to allow a sound generated from the rear surface to resonate within the chamber. A mutual interference between the sound generated from the front side of the sound emission part and the sound emitted from the rear side thereof can be reduced to thereby improve the performance of the middle and low sound.
摘要翻译：提供了一种移动通信设备。移动通信设备包括终端主体和位于终端主体中的扬声器模块。扬声器模块包括位于终端主体中的外壳，外壳在其中限定一个室，以及具有前表面和后表面的扬声器，扬声器位于外壳中，使扬声器的前表面从外壳并且其后表面位于室内，以允许从后表面产生的声音在腔室内共振。可以减少从声音发射部分的前侧产生的声音与从其后侧发出的声音之间的相互干扰，从而提高中低音的性能。

89. 发明申请

US20080011911A1 Bracket For Illumination Device In Optical Engine 审中-公开
标题翻译：光引擎中的照明装置支架
公开(公告)号：US20080011911A1
公开(公告)日：2008-01-17
申请号：US11623329
申请日：2007-01-16
申请人： Dong-Hwan Kim , Jin-Ho Kim , Jong-Kyu Hong
发明人： Dong-Hwan Kim , Jin-Ho Kim , Jong-Kyu Hong
IPC分类号： F16L3/00
CPC分类号： H04N9/315 , H04N9/3141
摘要： Provided is a bracket for an illumination device in an optical engine. The bracket, which includes a body to be fixed to a light tunnel, and fixing pieces, connected to but spaced apart from the body, to be fixed to a barrel, comprises: arm parts which independently protrude from both side ends of the body, each arm part being bent to form a step and to be connected to either side of the fixing piece. In the bracket according to the present invention, since the arm parts have the resilience, the light tunnel is easily controlled by the resilience of the arm parts in addition to the elasticity of springs, and the reliability of the product is improved by reducing a failure ratio of the product.
摘要翻译：提供了一种用于光学引擎中的照明装置的支架。包括固定在光通道上的主体的支架以及与主体连接但与主体间隔开的固定件固定到一个筒体上，包括：从主体的两侧端部分别突出的臂部，每个臂部分被弯曲以形成台阶并连接到固定片的任一侧。在根据本发明的支架中，由于臂部具有回弹性，除了弹簧的弹性之外，通过臂部的弹性容易地控制光通道，并且通过减少故障来提高产品的可靠性产品比例。

90. 发明授权

US07300745B2 Use of pedestals to fabricate contact openings 失效
标题翻译：使用基座制作接触孔
公开(公告)号：US07300745B2
公开(公告)日：2007-11-27
申请号：US10772520
申请日：2004-02-04
申请人： Chia-Shun Hsiao , Chunchieh Huang , Jin-Ho Kim , Kuei-Chang Tsai , Barbara Haselden , Daniel C. Wang
发明人： Chia-Shun Hsiao , Chunchieh Huang , Jin-Ho Kim , Kuei-Chang Tsai , Barbara Haselden , Daniel C. Wang
IPC分类号： H01L29/66 , H01L21/336
CPC分类号： H01L27/11539 , H01L27/115 , H01L27/11526
摘要： Nonvolatile memory wordlines (160) are formed as sidewall spacers on sidewalls of control gate structures (280). Each control gate structure may contain floating and control gates (120, 140), or some other elements. Pedestals (340) are formed adjacent to the control gate structures before the conductive layer (160) for the wordlines is deposited. The pedestals will facilitate formation of the contact openings (330.1) that will be etched in an overlying dielectric (310) to form contacts to the wordlines. The pedestals can be dummy structures. A pedestal can physically contact two wordlines.
摘要翻译：非易失性存储器字线（160）形成为控制栅极结构（280）的侧壁上的侧壁间隔物。每个控制栅极结构可以包含浮动和控制栅极（120,140）或一些其它元件。在用于字线的导电层（160）被沉积之前，基座（340）形成为与控制栅极结构相邻。基座将有助于形成将在上覆电介质（310）中蚀刻的接触开口（330.1），以形成与字线的接触。基座可以是虚拟结构。基座可以物理接触两个字线。

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